Prosecution Insights
Last updated: April 19, 2026
Application No. 18/382,685

LIGHT SOURCE MODULE AND XR GLASSES

Non-Final OA §103
Filed
Oct 23, 2023
Examiner
CONNELLY, MICHELLE R
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
TDK Corporation
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
94%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
808 granted / 1010 resolved
+12.0% vs TC avg
Moderate +14% lift
Without
With
+14.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
42 currently pending
Career history
1052
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
46.1%
+6.1% vs TC avg
§102
31.9%
-8.1% vs TC avg
§112
15.0%
-25.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1010 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The prior art documents submitted by applicant in the Information Disclosure Statement filed on October 23, 2023 have all been considered and made of record (note the attached copy of form PTO-1449). Drawings Eight (8) sheets of drawings were filed on October 23, 2023 and have been accepted by the examiner. Specification Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-6 and 12-15 are rejected under 35 U.S.C. 103 as being unpatentable over Itakura et al. (US 2022/0350097 A1), hereafter Itakura, in view of Goward et al. (WO 2023/014647 A1), hereafter Goward. Regarding claim 1; Itakura discloses a light source module (light-emitting device 200; see Figure 1) comprising: a chip-on-carrier having a base (mounting portions 8 form a base) and a laser diode (light-emitting elements 10 may be laser diodes; see paragraph 22) mounted on the base; a planar lightwave circuit (optical waveguide layer 5 forms a planar Lightwave circuit) having a substrate (substrate 1) bonded to the base (8) and an optical waveguide (the optical waveguide including core 4 and cladding 3) provided on the substrate (1) and to which light emitted from the laser diode (10) is input; and a package (substrate 1 and lid 11 form a package) having a housing portion (the substrate and the lid cooperate to house the planar lightwave circuit and the light-emitting elements) configured to house the chip-on-carrier (8) and the planar lightwave circuit (5), Itakura does not disclose: wherein the housing portion has a substructure configured to form a bottom surface, one or more thermal vias penetrating through the substructure, and one or more bumps provided on the substructure, wherein at least one of the bumps is arranged in contact with the planar lightwave circuit and arranged at a position at least partially overlapping the thermal vias when seen from above, and wherein the bumps come in contact with the thermal vias or the bumps and the thermal vias are bonded via a metallic pad. Goward et al. teaches that for a light-emitting device package (100; see the title and Figures 2 and 3) having laserdiodes (101, 102, 103) coupled to waveguides (210, 211, 212), thermal vias (308) may be provided to dissipate heat (see paragraph 26), wherein the housing portion (substrate 302 and lid 301) has a substructure configured to form a bottom surface (bottom of substrate 302), one or more thermal via (308) penetrating through the substructure, and one or more bumps (conductively connected pads; see Figure 3) arranged in contact with the planar light waveguide circuit (contacting the substrate 302 of the planar Lightwave circuit) and arranged at a position at least partially overlapping the thermal vias (308; see Figure 3) when seen from above, and wherein the bumps come into contact with the thermal vias or the bumps and the thermal vias are bonded via a metallic page (see Figure 3; the examiner notes that conductive vias, contact pads, and bumps are routinely used in cooperation to form conductive pathways and that such arrangements are elementary in the art). Thus, before the effective filing date of the present invention, a person of ordinary skill in the art would have found it obvious to further provide the housing of Itakura with thermal vias for the purpose of dissipating heat to prevent damage to the laserdiodes and planar Lightwave circuit, by providing the housing with a substructure configured to form a bottom surface, one or more thermal vias penetrating through the substructure, and one or more bumps provided on the substructure, wherein at least one of the bumps is arranged in contact with the planar lightwave circuit and arranged at a position at least partially overlapping the thermal vias when seen from above, and wherein the bumps come in contact with the thermal vias or the bumps and the thermal vias are bonded via a metallic pad, since all of these elements were known to be provided for this purpose in the prior art, and one of ordinary skill could have combined the elements by known coupling methods with no change in their respective functions to yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). Regarding claims 2-4 and 12-13; Itakura et al. and Goward et al. teach and/or suggest the light source module according to claim 1 as discussed above, and further suggest that: the base has a thermal conductivity of 120 W/mK to 170 W/mK (aluminum oxide base, taught by paragraph 23 of Itakura et al.), wherein the substrate has a thermal conductivity of 120 W/mK to 170 W/mK (silicon substrate 302, suggested by Goward et al.; see paragraph 25), but fail to disclose specific thermal conductivities of the materials used to form the substructure elements. The examiner takes Official notice that conductive materials, such as tungsten and molybdemum are known to for conductive substructures, including thermal vias and bumps in the art. Before the effective filing date of the present invention, a person of ordinary skill in the art would have found it obvious to select known materials to form the substructure, thermal vias, bumps, and pads for the purpose of efficiently dissipating heat, including selecting materials wherein the substructure has a thermal conductivity of 3 W/mK to 40 W/mK, the thermal via has a thermal conductivity of 135 W/mK to 210 W/mK, the bump has a thermal conductivity of 80 W/mK to 210 W/mK, and the metallic pad / metallic bonding layer has a thermal conductivity of 55 W/mK to 65 W/mK, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use (In re Leshin, 125 USPQ 416), and the selection of known materials used for the known purposes of forming conductive substructure elements, would not appear to result in an novel or unexpected advantages. (KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007)). Regarding claims 5 and 14; Itakura and Goward teach and/or suggest the light source module according to 1 as discussed above. Before the effective filing date of the present invention, a person of ordinary skill in the art would have found it obvious to incorporate thermal vias at any location on the substrate of Itakura where heat accumulates and needs to be removed, including providing the metallic pad coupled to the thermal via, such that it is arranged in at least a region where the planar lightwave circuit is arranged on the substructure when seen from above, and wherein the bump is arranged on the metallic pad in contact therewith for the purpose of providing a thermal via at that location to dissipate unwanted heat to prevent damage to the Lightwave circuit, since it’s known that optical waveguides may accumulate heat from the transmission of laser signals, since all the elements are known in the prior art, and one of ordinary skill could have combined the elements by known coupling methods with no change in their respective functions to yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). Regarding claims 6 and 15; Goward teaches that the metallic pad is provided to extend to a region where the chip-on-carrier is arranged on the substructure when seen from above, and wherein the chip-on-carrier is installed on the metallic pad (see Figure 3 of Goward). Additionally, a person of ordinary skill in the art would have found it obvious to use a conductivity adhesive layer, such as a solder, to install the chip-on-carrier of Itakura via the conductivity adhesive layer having a thermal conductivity of 1 W/mK to 50 W/mK, since conductive adhesives are routinely used to form stable connections to metallic pads, as understood by a person of ordinary skill in the art, and the use of elementary conductive adhesives would not provide an novel or unexpected results. Claims 7-11 and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Itakura et al. (US 2022/0350097 A1), hereafter Itakura, in view of Goward et al. (WO 2023/014647 A1), hereafter Goward, and in further view of Ogawa (WO 2021/140752 A1) and Kuriyama et al. (JP 2004-145367 A), hereafter Kuriyama. Regarding claims 7-11 and 16-20; Itakura and Goward teach and/or suggest light source module as discussed above, but fail to disclose XR glasses on which light source module is mounted. Ogawa teaches that XR glasses (head mounted display, eyewear display; see the background section of the specification and Figures 1 and 18) my including a light source (see Figures 2, 3, 6, 7) comprising laserdiodes (2-3G, 2-3R, 2-3B; 2-4G, 2-4R, 2-4B; 20, 20-7) coupled to optical waveguides (LG1/LG2, LR1/LR2, LB1/LB2; LR1, LR2, LR3, 11) for the purpose of providing a red, green and blue light source to form images and Kuriyama teaches that XR glasses (see Figures 1, 6, 7, 9) may include a light source with laser diodes (16; see Figure 5) coupled to waveguides (17). Therefore, before the effective filing date of the present invention, a person of ordinary skill in the art would have found it obvious to XR glasses on which the light source is mounted for the purpose of providing a red, green, and blue laserdiode light source to form an image in a head mounted display. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHELLE R CONNELLY whose telephone number is (571)272-2345. The examiner can normally be reached Monday-Friday, 9 AM to 5 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at 571-272-2397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHELLE R CONNELLY/Primary Examiner, Art Unit 2874
Read full office action

Prosecution Timeline

Oct 23, 2023
Application Filed
Mar 14, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
94%
With Interview (+14.1%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 1010 resolved cases by this examiner. Grant probability derived from career allow rate.

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