DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Reply Under 37 CFR 1.111
The submission of the reply filed on 04/06/2026 to the non-final Office action of 01/16/2026 is acknowledged. The Office action on the currently pending claims 1-19 follows.
Claim Objections
Claims 1-2 are objected to because of the following informalities:
Claims 1-2: the Office recommends amending the clauses “configured to conduct actively heat from the” and “configured to conduct actively the heat from” to recite “configured to conduct heat actively from the” and “configured to conduct the heat actively from”, or “configured to actively conduct heat from the” and “configured to actively conduct the heat from” for grammatical reasons.
The Office requests Applicant’s cooperation with reviewing the claims and correcting ALL remaining informalities present in the claims, but not made of record above. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Baek (US 20110032679) in view of Liu (US 20060156737).
Regarding claim 1, Baek discloses (Figs.1-2):
A memory package (See Fig.1) comprising: a substrate (2) and at least one memory chip (1) disposed on the substrate (2); an encapsulant layer (20) having a first side (bottom side of 20) and a second side (upper surface of 20 that has 20a), wherein the second side comprises an exterior package surface (20a) (as described in paragraphs [0037] and [0042] of Applicant’s specification, see US PG-Pub version of Applicant’s specification, the “first package surface” and “package surface” of the memory package can both be reference character “328”, which are both formed on the upper surface/outer side “326” of encapsulant layer 322, and thus the upper surface of 20 of Baek can define the “second side” of the encapsulant layer 20 of Baek which has 20a that can define both the “exterior package surface” and “first package surface” just like in Applicant’s invention) of the memory package (See Fig.1); and an active cooling device (40) disposed between the at least one memory chip (1) and a first package surface (20a) and configured to conduct actively heat from the at least one memory chip (1) to the first package surface (20a) (Fig.1, [0034], and [0038]: 40 is an active cooler that will actively conduct heat from 1 to 20a to dissipate heat generated by 1).
However, Baek does not disclose:
Wherein the first side is directly coupled to the substrate.
Liu however teaches (Fig.3D):
Wherein the first side (bottom side of 22a) is directly coupled to the substrate (32) (See Fig.3D: 22a is directly coupled to 32, and thus the first side of 22a is also directly coupled to 32).
It would have been obvious to one of ordinary skill in the pertinent arts before the effective filing date of the claimed invention to utilize the above teaching of Liu to modify the device of Baek such that the first side is directly coupled to the substrate, as claimed, in order to improve the overall heat dissipation capabilities since the encapsulation layer will be able to act as a heat dissipation layer for the whole package as taught by Liu ([0033]).
Regarding claim 2, Baek further discloses:
Wherein the active cooling device (40) comprises a thermoelectric device ([0038]-[0039]) configured to conduct actively the heat from a first device surface (bottom surface of 40 where 32 is located) to a second device surface (top surface of 40 where 33 is located).
Regarding claim 3, Baek further discloses:
Wherein the active cooling device (40) is electrically coupled to the substrate (2) ([0041]: "the power line 41 may be connected to the circuit board 2 so as to supply power to the thermoelectric device 40"- 40 is electrically coupled to 2 via 41).
Regarding claim 4, Baek further discloses:
Wherein the first device surface (bottom surface of 40 where 32 is located) of the active cooling device (40) is disposed on a first side (top side of 1) of the at least one memory chip (1), and the substrate (2) is disposed on a second side (bottom side of 1) of the at least one memory chip (1).
Regarding claim 5, Baek further discloses:
Wherein: the active cooling device (40) is disposed between (See Fig.1) the at least one memory chip (1) and the first side (bottom side of 20) of the encapsulant layer (20).
Regarding claim 6, Baek further discloses:
Wherein the active cooling device (40) is enclosed in a cavity (Fig.1: the cavity space created by 20 and 10 that 40 is placed in will define the "cavity", and the cavity is between 20 and 2) between the encapsulant layer (20) and the substrate (2).
Regarding claim 7, Baek further discloses:
Wherein the at least one memory chip (1) comprises a two-dimensional array of memory chips disposed on the substrate (2) (Figs.1-2: 1 defines a 2x8 two-dimensional array).
Regarding claim 8, modified Baek does not teach:
A second active cooling device enclosed in the cavity between the encapsulant layer and the substrate.
However, duplicating the active cooling device such that there is a desired number of active cooling devices that are in the cavity, including as claimed (i.e., two in the cavity), would have been an obvious modification that one of ordinary skill in the pertinent arts before the effective filing date of the claimed invention would do in order to further improve the heat dissipation capabilities due to the increased number of active cooling devices to cool the at least one memory chip, since it has been held that mere duplication of essential working parts of a device involves only routine skill in the art. St Regis Paper Co. V. Bemis Co., 193 USPQ 8.
Finally, all claimed elements were known in the prior art and one skilled in the art could have combined/modified the elements as claimed by known methods with no change in their respective functions, and the combination / modification would have yielded predictable results to one of ordinary skill in the art at the time of the invention. See KSR International Co. v. Teleflex Inc., 550 U.S._, 82 USPQ2d 1385 (2007).
Regarding claim 19, modified Baek further teaches:
A computer processing system comprising: a processor circuit (Baek: 200) configured to process data (Baek, [0026]: 200 is a microprocessor and will by definition process data); and the memory package of claim 1 (See Figure of Claim 1).
Claims 9 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Baek (US 20110032679) and Liu (US 20060156737) as applied to claim 1 above, and further in view of Subrahmanyam (US 20220077023).
Regarding claim 9, modified Baek does not explicitly teach:
A printed circuit board (PCB), wherein the substrate is coupled to a first surface of the PCB.
Subrahmanyam however teaches (Figs.1a-e):
A printed circuit board (PCB) (110), wherein the substrate (See Figure of Claim 1) is coupled to a first surface (Fig.1d: upper surface of 110) of the PCB (110) (Figs.1c-e: the substrate is coupled to the first surface of 110 via 109).
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It would have been obvious to one of ordinary skill in the pertinent arts before the effective filing date of the claimed invention to utilize the above teaching of Subrahmanyam to further modify the device of modified Baek such that it has a PCB that the substrate couples to so that the substrate is coupled to a first surface of the PCB, as claimed, in order to provide a simple and efficient means of transferring power to both the substrate and active cooling device (i.e., connecting the substrate to the PCB as suggested in [0041] of Baek provides a simple and efficient means of power and delivering power to both the substrate and active cooling device).
Finally, all claimed elements were known in the prior art and one skilled in the art could have combined/modified the elements as claimed by known methods with no change in their respective functions, and the combination / modification would have yielded predictable results to one of ordinary skill in the art at the time of the invention. See KSR International Co. v. Teleflex Inc., 550 U.S._, 82 USPQ2d 1385 (2007).
Regarding claim 18, modified Baek does not explicitly teach:
A dual in-line memory device.
Subrahmanyam however teaches (Figs.1a-e):
A dual in-line memory device (Fig.1c: "DIMM").
It would have been obvious to one of ordinary skill in the pertinent arts before the effective filing date of the claimed invention to utilize the above teaching of Subrahmanyam to further modify the device of modified Baek such that the memory device is a dual in-line memory device, as claimed, in order to achieve the improved heat dissipation capabilities disclosed by Baek ([0050]) for a DIMM.
Finally, all claimed elements were known in the prior art and one skilled in the art could have combined/modified the elements as claimed by known methods with no change in their respective functions, and the combination / modification would have yielded predictable results to one of ordinary skill in the art at the time of the invention. See KSR International Co. v. Teleflex Inc., 550 U.S._, 82 USPQ2d 1385 (2007).
Claims 1, 10-11, 13-14, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Im (KR 20150146365) in view of Liu (US 20060156737).
Regarding claim 1, Im discloses (Fig.12):
A memory package (9000B) comprising: a substrate (200) and at least one memory chip (1200) disposed on the substrate (200); and an active cooling device (100) disposed between the at least one memory chip (1200) and a first package surface (bottom surface of 200) and configured to conduct actively heat from the at least one memory chip (1200) to the first package surface (bottom surface of 200) ([0078] of Translation).
However, Im does not disclose:
An encapsulant layer having a first side and a second side, wherein the second side comprises an exterior package surface of the memory package and wherein the first side is directly coupled to the substrate.
Liu however teaches (Fig.3D):
An encapsulant layer (22a) having a first side (bottom side of 22a) and a second side (top side of 22a), wherein the second side comprises an exterior package surface (See Fig.3D: the top/second side of 22a is an exterior surface of the package) of the package (See Fig.3D) and wherein the first side is directly coupled to the substrate (32) (See Fig.3D: 22a is directly coupled to 32, and thus the first side of 22a is also directly coupled to 32).
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It would have been obvious to one of ordinary skill in the pertinent arts before the effective filing date of the claimed invention to utilize the above teaching of Liu to modify the device of Im such that it has an encapsulation layer that has a first side and a second side that is arranged such that the second side comprises an exterior package surface of the memory package, and that the first side is directly coupled to the substrate, as claimed, in order to further improve the overall heat dissipation capabilities due to the increased number of heat dissipation components.
Regarding claim 10, Im further discloses:
Wherein the first package surface (bottom surface of 200) comprises a first surface of the substrate (200) (Fig.1: the bottom surface of 200 that defines the “first package surface” will also define the “first surface of the substrate”- as claimed, the first package surface can be the same thing as the “first surface of the substrate”).
Regarding claim 11, Im further discloses:
Wherein the substrate (200) comprises a second surface (upper surface of 200) opposite to the first surface (bottom surface of 200) and the active cooling device (100) is disposed between (See Fig.12) the first surface (bottom surface of 200) and the second surface (upper surface of 200) of the substrate (200).
Regarding claim 13, Im further discloses:
Wherein the at least one memory chip (1200) is disposed on the second surface (upper surface of 200) of the substrate (200).
Regarding claim 14, Im further discloses:
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Wherein the substrate (200) comprises a printed circuit board (PCB) (See Abstract, [0006], [0008], and [0028] of translation: 200 is an insulating layer of the PCB, and thus still a PCB).
Regarding claim 16, Im further discloses:
The at least one memory chip (1200) disposed on the second surface (upper surface of 200) of the substrate (200); and the active cooling device (100) disposed between the first surface (bottom surface of 200) and the second surface (top surface of 200) of the substrate (200) and adjacent (See Fig.12: 100 is adjacent/close/proximate to 1200) to the at least one memory chip (1200).
However, modified Im does not teach:
A plurality of memory devices disposed on the second surface of the substrate; and a plurality of active cooling devices disposed between the first surface and the second surface of the substrate and adjacent to the plurality of memory devices; wherein one of the plurality of memory devices comprises the at least one memory chip.
However, modifying the number of memory devices on the second surface of the substrate and the number of active cooling devices that are between the first surface and second surface of the substrate such that there are a desired number of memory devices and number of active cooling devices, including as claimed (i.e., a plurality of memory devices so that one of the plurality of memory devices comprises the at least one memory chip, and a plurality of active cooling devices), would have been an obvious modification that one of ordinary skill in the pertinent arts before the effective filing date of the claimed invention would do in order to optimize the memory capabilities due to the increased number of memory devices, while also providing optimized cooling due to the increased number of active cooling devices (i.e., increasing the heat dissipation area that will provide optimized cooling in response to the increased number of memory devices provided), since it has been held that mere duplication of essential working parts of a device involves only routine skill in the art. St Regis Paper Co. V. Bemis Co., 193 USPQ 8.
Finally, all claimed elements were known in the prior art and one skilled in the art could have combined/modified the elements as claimed by known methods with no change in their respective functions, and the combination / modification would have yielded predictable results to one of ordinary skill in the art at the time of the invention. See KSR International Co. v. Teleflex Inc., 550 U.S._, 82 USPQ2d 1385 (2007).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Im (KR 20150146365) in view of Liu (US 20060156737), or alternatively over Im (KR 20150146365) in view of Liu (US 20060156737) and in further view of Bolle (US 20250056708).
Regarding claim 12, Im further discloses:
Wherein: the substrate (200) comprises a second surface (top surface of 200) opposite to the first surface (bottom surface of 200) and a cavity (the area that 100 occupies will define the “cavity”) in the second surface (top surface of 200) (Fig.12: at least the upper portion of 100 is in the second surface of 200); and the active cooling device (100) is disposed in the cavity (the area that 100 occupies will define the “cavity”).
Alternatively, Bolle teaches (Fig.1):
Wherein: the substrate (110) comprises a second surface (111) opposite to the first surface (112) and a cavity (Fig.1: cavity that 120 is provided in will define the “cavity”) in the second surface (111); and the active cooling device (120) is disposed in the cavity.
It would have been obvious to one of ordinary skill in the pertinent arts before the effective filing date of the claimed invention to utilize the above teaching of Bolle to further modify the device of modified Im such that the substrate has a cavity in a second surface that is opposite the first surface, as claimed, in order to provide a simple and efficient means of embedding the active cooling device in the substrate.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Im (KR 20150146365) and Liu (US 20060156737) as applied to claim 13 above, and further in view of Karalnik (US 11169583).
Regarding claim 15, modified Im does not teach:
A heat sink coupled to the first surface of the substrate opposite to the at least one memory chip.
Karalnik however teaches (Fig.2):
A heat sink (232) coupled to the first surface (bottom surface of 204) of the substrate (204) opposite to the at least one memory chip (212) (Fig.2: 232 and 212 are on opposite sides of 204).
It would have been obvious to one of ordinary skill in the pertinent arts before the effective filing date of the claimed invention to utilize the above teaching of Karalnik to further modify the device of modified Im such that it has a heat sink that is coupled to the first surface of the substrate opposite to the at last one memory chip, as claimed, in order to further improve the heat dissipating capabilities due to the increased number of components being utilized to dissipate heat from the at least one memory chip. Furthermore, utilizing the heat sink will also improve the heat dissipating capabilities due to the heat sink increasing the overall heat dissipation area.
Allowable Subject Matter
Claim 17 is allowed.
The following is an examiner’s statement of reasons for allowance: the allowability resides in the overall structure and functionality of the device as respectively recited in independent claim 17, and at least in part, for the reasons outlined in the non-final Office action of 01/16/2026.
In the amendments filed on 04/06/2026, Applicant amended independent claim 17 such that it recites the combined subject matter of claims 1-2, 4, and 17 in order to put the claim in condition for allowance, as outlined in the previous Office action. Therefore, independent claim 17 is now believed to be in condition for allowance for the reasons outlined in the non-final Office action of 01/16/2026.
Baek is believed to be the closest prior art reference. As outlined above, Baek discloses a device that is similar to that of the instant application. However, Baek fails to disclose, at least, the aforementioned allowable limitations of independent claim 17, as outlined in the previous Office action. Furthermore, none of the remaining prior art references, taken alone or in combination, are believed to teach and/or suggest the aforementioned allowable limitations of independent claim 17, as outlined in the previous Office action. Therefore, none of the prior art references, taken alone or in combination, are believed to render the claimed invention unpatentable as claimed.
Finally, the Office has not identified any double patenting issues. For all of the reasons outlined above, independent claim 17 is believed to be in condition for allowance.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Response to Arguments
Applicant’s arguments of 04/06/2026 have been fully considered, but notes that Applicant's arguments are directed to the claims as amended, and are thus moot since the rejection has been modified to meet the limitations of the amended claims (See rejection above).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 7436059: teaches a heat dissipation system that comprises a chip, TEC, and heatsink that dissipates heat generated from the chip.
US 6424533: teaches a heat dissipation unit that utilizes an active cooling device.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEPHEN S SUL whose telephone number is (571)270-1243. The examiner can normally be reached M-F 8-5 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jayprakash Gandhi can be reached at (571)272-3740. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/STEPHEN S SUL/Primary Examiner, Art Unit 2841
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