DETAILED ACTION
This Action is a response to the reply filed 21 November 2025. Claims 1-10 are amended; no claims are canceled or newly added. Claims 1-10 remain pending for examination. Although claim 8 is amended, the objection thereto is maintained.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Objections
Claim 8 is objected to because of the following informalities: at line 4, “the DS of the PS” should be corrected to “the DS of the PM.” Appropriate correction is required.
Allowable Subject Matter
Pending resolution of all other outstanding issues, claims 2-3, 5-6 and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: type system design unit and data structure (DS) implementation unit in claim 10.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
The Specification provides that a “processor of a non-volatile memory object design system 100 may include a type system design unit 1010 and a data structure (DS) implementation unit 1020. Such components of the processor may be representations of different functions performed by the processor in response to a control instruction provided from a program code stored in the non-volatile memory object design system” (Spec. at 26:13-17). The “processor and the components of the processor may be configured to execute an instruction according to a code of an OS included in the memory and a code of at least one program” (id. at 26:20-22). That is, each unit represents a function performed by the processor in response to a control instruction provided from program code. Examiner is therefore interpreting the claim to recite a system comprising a processor configured to implement a type system design unit configured to perform particular operations and a data structure (DS) implementation unit configured to perform particular operations.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-10 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
At Step 1, the claims must be evaluated for whether they fall within the statutory categories. Here, claims 1-8 are directed to a process, claim 9 is directed to an article of manufacture, and claim 10 is directed to a machine. The analysis proceeds to Step 2.
At Step 2A, Prong 1, the claims are evaluated for whether they recite (set forth or describe) a judicial exception, such as an abstract idea. Abstract idea concepts include mental processes such as thinking that can be performed in the human mind or by a human using pen and paper. Examples include observations, evaluations, judgments and opinions. Claim 1 recites (1) “designing a type system for a deterministic replay and a detectable operation using persistent memory (PM) language” and (2) wherein the designing comprises executing steps from the group consisting of the limitations previously presented in claims 2-6 or wherein implementing the data structure comprises executing steps from the group consisting of the limitations previously presented in claims 7-8.
Element (1) is a mental process step comprising an evaluation or judgment by a human user or engineer that a type system comprises a particular structure capable of providing persistent memory storage having particular characteristics. The Specification provides human-designed mathematical axioms and pseudocode for implementing the characteristics of the type system according to desired design principles. With respect to element (2), each of the alternatives presented in the first and second groups reads on the claim; that is, the claim recites designing comprising A or B or C or D or E, or implementing comprising F or G. As set forth below with respect to, e.g., claim 4, designing a type system including setting an operation descriptor that records a progress status and result of an operation in the PM comprises a design choice that is an evaluation, judgment or opinion that may be performed by a human designer to incorporate such a feature in the designed type system. The analysis thus proceeds to Step 2A, Prong 2.
At Step 2A, Prong 2, the claims must be evaluated for whether they recite additional elements that integrate the judicial exception into a practical application. Claim 1 additionally recites a method causing a non-volatile memory object design system to carry out an object design method of a non-volatile memory which causes the system to carry out the steps of designing the type system and implementing a data structure (DS) of the PM based on the designed type system. The first element provides the statutory category and describes that the method is performed by a non-volatile memory object design system, which merely describes that the method is performed in a general-purpose computing environment. That is, the claim sets forth that a non-volatile object design system carries out the operations, without providing any detail regarding the configuration, architecture, or features of the system. The implementing limitation represents mere instructions to apply the result of the mental process step (implement the DS of the PM based on the mental process step of designing the type system). Accordingly, claim 1 does not include additional elements, whether considered alone or in combination, that integrate the mental process into a practical application. The analysis thus proceeds to Step 2B.
At Step 2B, the claims must be evaluated for whether they recite additional elements that amount to significantly more than the judicial exception. The analysis at Step 2A, Prong 2 is incorporated, and any additional elements are further evaluated for whether they recite other than what is well-understood, routine or conventional in the field. As set forth above, the additional elements provide a general-purpose computing system for designing and implementing the type system, recited at a high level of generality. The claim thus does not recite an improvement in the functioning of a computer or a particular machine, nor does it provide other meaningful limitations, but instead recites the well-understood, routine and/or conventional activity of storing and retrieving information in memory (the DS being stored / configured in memory to store persistent memory data). In view of the foregoing, claim 1 is ineligible.
Claims 9 and 10 are ineligible for similar reasons as that of claim 1. Claim 9 further recites a non-transitory computer-readable recording medium storing processor-executable instructions to execute the method of claim 1; and claim 10 further recites a non-volatile object design system comprising a type system design unit and a data structure (DS) implementation unit configured to perform the method of claim 1. These recite the implementation of the method in a general-purpose computing environment, and therefore do not integrate the judicial exception into a practical application or recite significantly more.
Claim 2 recites that the designing provides a detectable checkpoint operation that records a read-only expression and verifies whether a value is recorded in memento mid and if not, records a result obtained by executing the read-only expression in the memento mid and returns the result. This is an additional mental process step whereby a human user or engineer makes design choices to implement code or pseudocode to implement the type system and data structure in a particular manner and to provide particular functions.
Claim 3 recites that the designing provides a detectable persistent CAS operation that compares a current value of loc against vold and if the values match updating the same to vnew and otherwise does not change the value of loc. This is an additional mental process step whereby a human user or engineer makes design choices to implement code or pseudocode to implement the type system and data structure in a particular manner and to provide particular functions.
Claim 4 recites that the designing comprises additionally setting an operation descriptor that records a progress status and result of an operation in the PM. This is an additional mental process step whereby a human user or engineer makes design choices to implement code or pseudocode to implement the type system and data structure in a particular manner and to provide particular functions.
Claim 5 recites that the designing comprises supporting a loop by efficiently distinguishing results of sub-operation from different iterations using timestamps and recording operation progress status. This is an additional mental process step whereby a human user or engineer makes design choices to implement code or pseudocode to implement the type system and data structure in a particular manner and to provide particular functions.
Claim 6 recites that the designing comprises supporting loop-carried dependence through checkpoint of dependent variables at a loop head, and when multiple dependent variables are present, merging them into a single tuple or struct and checkpointing the same at once. This is an additional mental process step whereby a human user or engineer makes design choices to implement code or pseudocode to implement the type system and data structure in a particular manner and to provide particular functions.
Claim 7 recites that the implementing comprises accessing PM locations with byte addressability through load, store, and CAS instructions. This is an additional mental process step whereby a human user or engineer makes design choices to implement code or pseudocode to implement the type system and data structure in a particular manner and to provide particular functions.
Claim 8 recites that the implementing comprises implementing in a DS of PM by adjusting a DS of volatile memory based on the design system, and the DS of the PM includes a CAS-based lock-free linked-list, CAS-based Treiber stack, CAS-based Michael-Scott queue, Michael-Scott queue based on Indel-mmt and Vol-mmt, combining queue based on Comb-mmt, and a CAS-based lock-free resizing hash table. This is an additional mental process step whereby a human user or engineer makes design choices to implement code or pseudocode to implement the type system and data structure in a particular manner and to provide particular functions.
In view of the foregoing, claims 2-10 are likewise ineligible.
In order to overcome these rejections, Examiner recommends amending the claims to affirmatively recite one or more of the following: (1) process steps detailing how, for example, the DS is implemented in the PM such as by providing a memory range structured in a way so as to implement the type design; (2) computer operations or instructions for affirmatively performing code execution resulting in affirmatively performed memory operations to carry out the design choices set forth in the claims; and/or (3) implementation and use of the DS in the PM during the execution of example code such that PM operations are carried out and provide a particular improvement in memory or computer technology.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4, 7 and 9-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Marathe et al., U.S. 2016/0314044 A1 (“Marathe”).
Regarding claim 1, Marathe teaches: A method comprising causing a non-volatile memory object design system to carry out [[An]] object design method of a non-volatile memory performed by a non-volatile memory object design system, the method comprising:, wherein causing the non-volatile memory object design system to carry out the object design method comprises causing the non-volatile memory object design system to carry out the steps of designing a type system for a deterministic replay and a detectable operation using persistent memory (PM) language (Marathe, e.g., ¶17, “a new technique that enables the construction of ad hoc persistent data structures on emerging byte-addressable persistent memory technologies …” See also, e.g., ¶19, “a ‘chronicle’ maintains a persistent history of operations invoked on a persistent data structure that can be replayed to recover the current consistent state of the data structure after a failure …”)[[;]] and
implementing a data structure (DS) of the PM based on the designed type system (Marathe, e.g., ¶53, “pseudo-code shown in lines 69-163 below depicts the example chronicle stack implementation …” and ¶54, “implementation may guarantee that if any operation has flushed … as part of persisting an operation for a thread …”),
wherein designing the type system for a deterministic replay and a detectable operation using persistent memory (PM) language comprises executing steps from the group consisting of:
providing a detectable checkpoint operation that records a result of read-only expression, wherein the checkpoint operation includes the steps of verifying whether a value is recorded in memento mid and if the value is not recorded in the memento mid, recording a result obtained by executing the read-only expression in the memento mid and returning the result;
providing a detectable, persistent compare-and-swap (CAS) operation that compares a current value of loc against vold and, if the values match, that updates the same to ‘vnew,’ and, if the values do not match, that does not change the current value of ‘loc’;
setting an operation descriptor that records a progress status and result of an operation in the PM (Marathe, e.g., ¶46, “in some embodiments of persistent data structures that employ the chronicle design pattern described herein, these CAS operations may be consolidated into a single location, contained within a State object … CAS operation may be used to create a new global state and append it to the previous version … ensure that all previous operations have linearized and persisted. By attaching all method call data to the State object associated with its linearization point, it may always be possible to determine the progress of any ongoing operation …” Examiner’s note: the claim recites “wherein designing the type system … comprises executing steps from the group consisting of” A or B or C or D or E, “or wherein implementing the data structure … comprises executing steps selected from the group consisting of” F or G. Each of the five alternatives for the designing or the two steps for the implementing can be considered “steps” individually; that is, each necessarily comprises and is interpreted as including at least a plurality of steps. Accordingly, by teaching that the designing may comprise setting an operation descriptor …, Marathe reads on the claim);
supporting a loop by efficiently distinguishing results of sub-operation from different iterations using timestamps and by recording an operation progress status; and
supporting loop-carried dependence through checkpoint of dependent variables at a loop head, and in the case of presence of multiple dependent variables at the loop head, merging all the variables into a single tuple or structure and checkpointing the same at once;
or
wherein implementing the data structure of the PM based on the designed type system comprises executing steps selected from the group consisting of:
accessing PM locations with byte addressability through load, store, and CAS instructions (Marathe, e.g., ¶20, ‘byte-addressability may enable a DRAM-like load/store interface to persistent memory …” See also, e.g., ¶46, “in some embodiments of persistent data structures that employ the chronicle design pattern described herein, these CAS operations may be consolidated into a single location, contained within a State object …”); and
implementing in a DS of PM by adjusting a DS of volatile memory based on the designed type system, and the DS of the PM includes a CAS-based lock-free linked-list, a CAS-based Treiber stack, a CAS-based Michael-Scott queue, Michael-Scott queue based on “Indel-mmt” and “Vol-mmt”, combining queue based on “Comb-mmt”, and a CAS-based lock-free resizing hash table.
Claims 9 and 10 are rejected for the reasons given in the rejection of claim 1 above. Examiner notes that with respect to claim 9, Marathe further teaches: A non-transitory computer-readable recording medium storing instructions that, when executed by a processor, cause the processor to execute an object design method of a non-volatile memory performed by a non-volatile memory object design system, wherein the object design method (Marathe, e.g., ¶81, “mechanisms … may include a non-transitory, computer-readable storage medium having stored thereon instructions, which may be used to program a computer system … to perform a process according to various embodiments …”) comprises: [[[the method of claim 1]]]; and with respect to claim 10, Marathe further teaches: A non-volatile memory object design system comprising: a type system design unit configured (Marathe, e.g., ¶83, “program instructions 620 … may also be configured to implement a persistent data structure recovery module or a persistent data structure support library … for implementing and/or operating on persistent data structures …”) to [[[perform the design limitation of claim 1]]]; and a data structure (DS) implementation unit (Marathe, e.g., ¶81, “mechanisms … may include a non-transitory, computer-readable storage medium having stored thereon instructions, which may be used to program a computer system … to perform a process according to various embodiments … medium may include any mechanism for storing information in a form … readable by a computer …”) configured to [[[perform the implement limitation of claim 1]]].
Regarding claim 4, the rejection of claim 1 is incorporated, and Marathe further teaches: wherein [[the]] designing the type system for a deterministic replay and a detectable operation using persistent memory (PM) language comprises additionally setting an operation descriptor that records a progress status and result of an operation in the PM (Marathe, e.g., ¶46, “in some embodiments of persistent data structures that employ the chronicle design pattern described herein, these CAS operations may be consolidated into a single location, contained within a State object … CAS operation may be used to create a new global state and append it to the previous version … ensure that all previous operations have linearized and persisted. By attaching all method call data to the State object associated with its linearization point, it may always be possible to determine the progress of any ongoing operation …”).
Regarding claim 7, the rejection of claim 1 is incorporated, and Marathe further teaches: wherein [[the]] implementing the data structure of the PM based on the designed type system comprises accessing PM locations with byte addressability through load, store, and CAS instructions (Marathe, e.g., ¶20, ‘byte-addressability may enable a DRAM-like load/store interface to persistent memory …” See also, e.g., ¶46, “in some embodiments of persistent data structures that employ the chronicle design pattern described herein, these CAS operations may be consolidated into a single location, contained within a State object …”).
Response to Arguments
In the Remarks, Applicant Argues: Claims 1, 9 and 10 have been amended to recite the subject matter of claims 2-8 in the alternative, comprising two valid Markush groups, and thus complying with 35 U.S.C. § 112(d) (Resp. at 8).
Examiner’s Response: Examiner acknowledges that the claims comply with 35 U.S.C. § 112(d).
Applicant Further Argues: Claim 8 has been canceled, rendering the objection thereto moot (Resp. at 8).
Examiner’s Response: The claims submitted with the 21 November 2025 reply do not indicate that claim 8 is canceled, and the objection thereto is accordingly maintained.
Applicant Further Argues: Applicant has amended claims 1, 9 and 10 to include selected limitations from the allowable claims in the alternative, thus rendering the rejections under 35 U.S.C. § 102 moot (Resp. at 8).
Examiner’s Response: As Applicant acknowledges in the comments regarding the amendments, these limitations are recited in the alternative. “In particular, for n is a member of the set {2, 3, 4, 5, 6, 7, 8}, claim 1 covers the case in which the subject matter of claim n is absent …” (Resp. at 8). As discussed above in the rejection of claim 1, a reference reading on each of 2, 3, 4, 5, 6, 7 and/or 8 reads on the claim. Accordingly, as currently presented, claims 1, 9 and 10 (as well as dependent claims 4 and 7) remain rejected under 35 U.S.C. § 102.
Applicant Further Argues: Claim 1 has been amended to limit it to the case in which the steps are carried out by a NMODS, which an ordinary artisan would not have considered to encompass a human being (Resp. at 8). A NMODS system is a special-purpose computing system rather than a general-purpose computing environment, and Applicant requests Examiner to articulate features which distinguish general purpose environments from special purpose environments (id. at 9). The claim in fact recites implementing a DS of the PM; the act thereof is an “application,” and Applicant asserts that such is a “practical” application rather than an “impractical” application (id. at 9). Applicant requests Examiner to articulate features that distinguish a “practical” application from an “impractical” one (id. at 9-10). To the extent the claim recites mental steps, Applicant asserts that steps that cannot be practically performed in the human mind are eligible (id. at 10). Claims 9 and 10 have been amended similarly, and the rejections of these and dependent claims 2-8 should be withdrawn (id. at 10-11).
Examiner’s Response: While Applicant has amended claim 1 to recite that the operations are carried out by a non-volatile memory object design system (NMODS), Examiner notes that no structure or architectural features are recited in the claim. That is, the NMODS is merely a system capable of carrying out the recited steps. Claim 9 recites a non-transitory computer-readable recording medium storing instructions that may be executed by the NMODS to cause the NMODS to carry out the recited steps. Claim 10 recites a NMODS comprising a type system design unit and a data structure (DS) implementation unit which are configured to carry out the recited steps. In each of these additional claims, the system is not defined by any structure or architectural features, and merely recites a NMODS capable of carrying out the recites steps. The Specification provides an example system implementation for the NMODS (see Spec. at 26:9 et seq. and FIG. 10). The NMODS may be a processor that includes a type system design unit 1010 and a data structure (DS) implementation unit 1020. “Such components of the processor may be representations of different functions performed by the processor in response to a control instruction provided from a program code stored in the [NMODS]” (Spec. 26:14-17). A processor storing functions that are executable in response to a control instruction provided from a program code stored in a system is representative of a general-purpose computing environment, using a generic computer, and/or merely using a computer as a tool to perform the judicial exception concept (see, e.g., MPEP § 2106.04(a)(2)(III)(C)). With respect to the argument that the NMODS does not encompass a human being, a claim that recites and requires a computer may still recite a mental process (id.). For guidance regarding features which may distinguish a special-purpose computing environment from a general-purpose one, see, e.g., MPEP §§ 2106.04(d)(1), 2106.05(a) and 2106.05(b).
Applicant’s argument that the amended claims recite a practical application of the mental process is not persuasive. Claim 1 recites carrying out the steps of designing a type system for a deterministic replay and a detectable operation using (PM) language. The Specification describes the alternative design steps in terms of human-readable mathematical formulas and pseudocode. A human user may make evaluations, judgments or opinions as to how to implement the design steps using code or pseudocode (that is, the designing of the type system is a mental process step). As discussed above, that a NMODS is described as carrying out the designing steps is representative of performing the mental process step using a computer as a tool. The claim additionally recites implementing the DS of the PM based on the designed type system; without more, this represents mere instructions to apply the exception (see MPEP §§ 2106.04(d)(I) and 2106.05(f)). As discussed above in this response and in the rejections, claim 1 recites a number of steps in the alternative, such that, for example, including design steps of one limitation in the designing portion of the claim is sufficient to read on the claim as a whole. In that case, the claim does not include specific detail as to how the DS of the PM is implemented. Further, the alternative limitations provided in the implementing section of the claim merely recite implementing the DS consistent with the human-determined design. For guidance regarding distinguishing a practical application of a judicial exception from a claim in which the judicial exception is not integrated into a practical application, see at least MPEP § 2106.04(d)). Examiner would recommend that Applicant consider affirmatively requiring in the claim one or more steps which produce a result, such as adjusting the configuration or structure of the PM based on the design, and reciting the process by which this is accomplished in such a way that particular improvements to PM performance are realized by these particular steps.
In view of the foregoing, Examiner is not persuaded that the rejections under 35 U.S.C. § 101 should be withdrawn in view of the currently presented amended claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Examiner has identified particular references contained in the prior art of record within the body of this action for the convenience of Applicant. Although the citations made are representative of the teachings in the art and are applied to the specific limitations within the enumerated claims, the teaching of the cited art as a whole is not limited to the cited passages. Other passages and figures may apply. Applicant, in preparing the response, should consider fully the entire reference as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art and/or disclosed by Examiner.
Examiner respectfully requests that, in response to this Office Action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist Examiner in prosecuting the application.
When responding to this Office Action, Applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of the art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R. 1.111(c).
Examiner interviews are available via telephone and video conferencing using a USPTO-supplied web-based collaboration tool. Applicant is encouraged to submit an Automated Interview Request (AIR) which may be done via https://www.uspto.gov/patent/uspto-automated-interview-request-air-form, or may contact Examiner directly via the methods below.
Any inquiry concerning this communication or earlier communication from Examiner should be directed to Andrew M. Lyons, whose telephone number is (571) 270-3529, and whose fax number is (571) 270-4529. The examiner can normally be reached Monday to Friday from 10:00 AM to 6:00 PM ET. If attempts to reach Examiner by telephone are unsuccessful, Examiner’s supervisor, Wei Mui, can be reached at (571) 272-3708. Information regarding the status of an application may be obtained from the Patent Center system. For more information about the Patent Center system, see https://www.uspto.gov/patents/apply/patent-center. If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call (800) 786-9199 (in USA or Canada) or (571) 272-1000.
/Andrew M. Lyons/Primary Examiner, Art Unit 2191