DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
In response to communications filed on 03 August 2026, claims 1-15 are presently pending in the application, of which, claims 1 and 15 are presented in independent form. No claims were amended or cancelled.
Priority
The Examiner acknowledges the instant application claims priority under 35 U.S.C. 119(e) to European Patent Application No. 22206727.4, filed 10 November 2022, and has been accorded the earliest effective file date.
Response to Remarks/Arguments
All objections and/or rejections issued in the previous Office Action, mailed 05 May 2026, have been withdrawn, unless otherwise noted in this Office Action.
Applicant's arguments filed 03 August 2026 have been fully considered but they are not persuasive. The applicant argues:
(1) Hodson fails to teach or suggest the features of ‘each of the plurality of encoding quantum gates rotates the one qubit or the plurality of qubits by a rotation angle which is proportional to the input feature and one of a plurality of scaling factors,’ as recited in independent claim 1, and similarly in corresponding independent claim 15.
The Examiner disagrees. Hodson, see paragraph [0044], which discloses the quantum processing unit can process quantum information by applying control signals to the qubits in the quantum processing unit. The control signals can be configured to encode information in the qubits, to process the information by performing quantum logic gates or other types of operations to extract information from the qubits. See further paragraph [0078], which discloses single rotation gate is used for encoding a single input parameter on a single qubit defined by a qubit device. For another example, two input parameters can be encoded on a single qubit defined by a single qubit device using two different rotation gates, or by encoding on amplitude and phase. See further paragraph [0079], which discloses input parameters can be encoded using multi-qubit logic gates that afford degrees of freedom and do not cause information overlap, where input parameters may be encoded using multi-qubit quantum logic gates according to the available degrees of freedom in the quantum system. For example n-qubit system with n qubit devices operate on the unitary group SU(2n) with 22n-1 degree of freedom, thereby illustrating a scaling factor.
(2) Hodson fails to teach or suggest the features of ‘each of the plurality of encoding quantum gates is assigned a different one of the plurality of scaling factors,’ as recited in independent claim 1, and similarly in corresponding independent claim 15.
The Examiner disagrees. Hodson, see paragraph [0044], which discloses the quantum processing unit can process quantum information by applying control signals to the qubits in the quantum processing unit. The control signals can be configured to encode information in the qubits, to process the information by performing quantum logic gates or other types of operations to extract information from the qubits. See further paragraph [0078], which discloses single rotation gate is used for encoding a single input parameter on a single qubit defined by a qubit device. For another example, two input parameters can be encoded on a single qubit defined by a single qubit device using two different rotation gates, or by encoding on amplitude and phase. See further paragraph [0079], which discloses input parameters can be encoded using multi-qubit logic gates that afford degrees of freedom and do not cause information overlap, where input parameters may be encoded using multi-qubit quantum logic gates according to the available degrees of freedom in the quantum system. For example n-qubit system with n qubit devices operate on the unitary group SU(2n) with 22n-1 degree of freedom, thereby illustrating a scaling factor. See further paragraph [0168], which discloses the systems and method disclosed here generally allow utilization of N QPU devices in a quantum-enhanced data-parallel machine learning pipeline and significantly scaling up of the total computational power delivered into the target application.
(3) Hodson fails to teach or suggest the features of ‘the plurality of scaling factors comprises powers of two,’ as recited in independent claim 1, and similarly in corresponding independent claim 15.
The Examiner disagrees. Hodson, see paragraph [0044], which discloses operations can be expressed as single-qubit quantum logic gates, two-qubit quantum logic gates, or other types of quantum logic gates that operate on one or more qubits. The Examiner notes that the two-qubit quantum logic gate is a scaling factor of power of two versus the single-qubit quantum logic gate. See further paragraph [0079], which discloses input parameters can be encoded using multi-qubit logic gates that afford degrees of freedom and do not cause information overlap, where input parameters may be encoded using multi-qubit quantum logic gates according to the available degrees of freedom in the quantum system. For example n-qubit system with n qubit devices operate on the unitary group SU(2n) with 22n-1 degree of freedom, thereby illustrating a scaling factor.
No other argument was presented by the Applicant and therefore the Examiner maintains the rejection below.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-15 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being unpatentable by Hodson, Mark, et al (WO 2022/232604 and known hereinafter as Hodson) in view of.
As per claim 1, Hodson teaches a method for encoding a dataset in a quantum circuit for quantum machine learning, in a system comprising a quantum circuit comprising a plurality of encoding quantum gates and a plurality of variational quantum gates, the method comprising:
providing a dataset comprising a plurality of input features (e.g. Hobson, see paragraph [0074], which discloses each QPU sub lattice can be used as a feature detector which takes a subset of input parameters from an input image or from readout samples of nodes, where for example a filtered subset of input image can be run through a single feature detector and an activation parameter from a single feature detector can be recorded with n qubit devices.);
for each input feature of the plurality of input features, applying the plurality of encoding quantum gates on one qubit or a plurality of qubits (e.g. Hobson, see paragraph [0160], which discloses during input data encoding and during quantum transformation, structures of the parameterized native quantum logic circuits are not changed and only the values of the quantum logic gate parameters are updated during each iteration, where for example in order to perform a two-qubit quantum logic gate, a tunable-frequency coupler device in the QPU sublattice can be tuned to activate a coupling between two qubit devices. See further paragraph [0044], which discloses control signals can be configured to encode information in the qubits, to process the information by performing quantum logic gates or other types of operations, or to extract information from qubits.),
wherein each of the plurality of encoding quantum gates rotates the one qubit or the plurality of qubits by a rotation angle (e.g. Hobson, see paragraph [0090, 0094, 0133-0134], which discloses a first unitary transformation in an encoder function may include a rotation gate applied on a qubit defined by a single qubit device.) which is proportional to the input feature and one of a plurality of scaling factors (e.g. Hobson, see paragraph [0039], which discloses qubits can be initialized in an initial state and the quantum logic circuit comprises of a series of quantum logic gates can be applied to transform the qubits and extract measurements representing the output of the quantum computation. Individual qubits may be controlled by single-qubit quantum logic gates, and pairs of qubits may be controlled by two-qubit quantum logic gates.),
wherein each of the plurality of encoding quantum gates is assigned a different one of the plurality of scaling factors (e.g. Hobson, see paragraphs [0079-0080], which discloses input parameters can be encoded using multi-qubit quantum logic gates that afford more degrees of freedom and do not cause information overlap, where an n-qubit system with n-qubit devices operates on the unitary group and could encode input parameters and a second unitary transformation is used for encoding model parameters of the machine learning model and perform quantum transformation.), and
wherein the plurality of scaling factors comprises powers of two (Hobson, see paragraphs [0168-0169], which discloses allow utilization of N QPU devices in a quantum-enhanced data-parallel machine learning pipeline and significant scaling up of the total computational power delivered into the target application, where each of parameterized quantum logic circuits require 20 qubit devices, so for example 5 quantum processing units may be divided into 5 QPU sublattices.);
applying the plurality of variational quantum gates on the qubit or the plurality of qubits (Hobson, see paragraphs [0096-0098], which discloses the operator include readout measurements on all or a subset of qubit devices in the QPU sublattice at the output of the sequence of quantum logic gates.);
determining a plurality of measurement values for the qubit or the plurality of qubits (e.g. Hobson, see paragraph [0057, 0096-0097], which discloses the controllers compute measurement statistics based on qubit state information from multiple shots of a quantum program, where each shot may produce a bitstring representing qubit state measurements for a single execution of the quantum program, and a collection of bitstrings from multiple shots may be analyzed to compute quantum state probabilities.);
adjusting the quantum circuit by adjusting the plurality of variational quantum gates using the plurality of measurement values (Hobson, see paragraphs [0158], which discloses machine learning process continues with operation during which the structure of the machine learning model can be adjusted and the hyperparameters of the machine learning model are updated, where the data produced from operations may include a complete set of quantum logic gate parameters that can be translated to control parameters which can then be used to patch the quantum control program.); and
determining output data for the dataset from the quantum circuit (e.g. Hobson, see paragraph [0096], which discloses the readout samples are obtained by performing measurements on one or more qubit devices of the QPU sublattice during an output data decoding operation. Each of the output quantum states of the qubit devices in the QPU sublattice is measured.).
As per claim 15, Hodson teaches a system for encoding a dataset in a quantum circuit for quantum machine learning, the system comprising a quantum circuit comprising a plurality of encoding quantum gates and a plurality of variational quantum gates, the system configured to:
providing a dataset comprising a plurality of input features (e.g. Hobson, see paragraph [0074], which discloses each QPU sub lattice can be used as a feature detector which takes a subset of input parameters from an input image or from readout samples of nodes, where for example a filtered subset of input image can be run through a single feature detector and an activation parameter from a single feature detector can be recorded with n qubit devices.);
for each input feature of the plurality of input features, applying the plurality of encoding quantum gates on one qubit or a plurality of qubits (e.g. Hobson, see paragraph [0160], which discloses during input data encoding and during quantum transformation, structures of the parameterized native quantum logic circuits are not changed and only the values of the quantum logic gate parameters are updated during each iteration, where for example in order to perform a two-qubit quantum logic gate, a tunable-frequency coupler device in the QPU sublattice can be tuned to activate a coupling between two qubit devices. See further paragraph [0044], which discloses control signals can be configured to encode information in the qubits, to process the information by performing quantum logic gates or other types of operations, or to extract information from qubits.),
wherein each of the plurality of encoding quantum gates rotates the one qubit or the plurality of qubits by a rotation angle (e.g. Hobson, see paragraph [0090, 0094, 0133-0134], which discloses a first unitary transformation in an encoder function may include a rotation gate applied on a qubit defined by a single qubit device.) which is proportional to the input feature and one of a plurality of scaling factors (e.g. Hobson, see paragraph [0039], which discloses qubits can be initialized in an initial state and the quantum logic circuit comprises of a series of quantum logic gates can be applied to transform the qubits and extract measurements representing the output of the quantum computation. Individual qubits may be controlled by single-qubit quantum logic gates, and pairs of qubits may be controlled by two-qubit quantum logic gates.),
wherein each of the plurality of encoding quantum gates is assigned a different one of the plurality of scaling factors (e.g. Hobson, see paragraphs [0079-0080], which discloses input parameters can be encoded using multi-qubit quantum logic gates that afford more degrees of freedom and do not cause information overlap, where an n-qubit system with n-qubit devices operates on the unitary group and could encode input parameters and a second unitary transformation is used for encoding model parameters of the machine learning model and perform quantum transformation.), and
wherein the plurality of scaling factors comprises powers of two (Hobson, see paragraphs [0168-0169], which discloses allow utilization of N QPU devices in a quantum-enhanced data-parallel machine learning pipeline and significant scaling up of the total computational power delivered into the target application, where each of parameterized quantum logic circuits require 20 qubit devices, so for example 5 quantum processing units may be divided into 5 QPU sublattices.);
applying the plurality of variational quantum gates on the qubit or the plurality of qubits (Hobson, see paragraphs [0096-0098], which discloses the operator include readout measurements on all or a subset of qubit devices in the QPU sublattice at the output of the sequence of quantum logic gates.);
determining a plurality of measurement values for the qubit or the plurality of qubits (e.g. Hobson, see paragraph [0057, 0096-0097], which discloses the controllers compute measurement statistics based on qubit state information from multiple shots of a quantum program, where each shot may produce a bitstring representing qubit state measurements for a single execution of the quantum program, and a collection of bitstrings from multiple shots may be analyzed to compute quantum state probabilities.);
adjusting the quantum circuit by adjusting the plurality of variational quantum gates using the plurality of measurement values (Hobson, see paragraphs [0158], which discloses machine learning process continues with operation during which the structure of the machine learning model can be adjusted and the hyperparameters of the machine learning model are updated, where the data produced from operations may include a complete set of quantum logic gate parameters that can be translated to control parameters which can then be used to patch the quantum control program.); and
determining output data for the dataset from the quantum circuit (e.g. Hobson, see paragraph [0096], which discloses the readout samples are obtained by performing measurements on one or more qubit devices of the QPU sublattice during an output data decoding operation. Each of the output quantum states of the qubit devices in the QPU sublattice is measured.).
As per claim 2, Hodson teaches the method according to claim 1, wherein each of the plurality input features is a real number and/or each of the plurality of scaling factors is a natural number (Hobson, see paragraphs [0168-0169], which discloses allow utilization of N QPU devices in a quantum-enhanced data-parallel machine learning pipeline and significant scaling up of the total computational power delivered into the target application, where each of parameterized quantum logic circuits require 20 qubit devices, so for example 5 quantum processing units may be divided into 5 QPU sublattices.).
As per claim 3, Hodson teaches the method according to claim 1, wherein the plurality of scaling factors additionally comprises a power of two incremented by one (Hobson, see paragraphs [0168-0169], which discloses allow utilization of N QPU devices in a quantum-enhanced data-parallel machine learning pipeline and significant scaling up of the total computational power delivered into the target application, where each of parameterized quantum logic circuits require 20 qubit devices, so for example 5 quantum processing units may be divided into 5 QPU sublattices.).
As per claim 4, Hodson teaches the method according to claim 1, wherein the plurality of encoding quantum gates is applied in parallel on the plurality of qubits, wherein preferably each of the plurality of encoding quantum gates is applied to a different one of the plurality of qubits (e.g. Hobson, see paragraphs [0079-0080], which discloses input parameters can be encoded using multi-qubit quantum logic gates that afford more degrees of freedom and do not cause information overlap, where an n-qubit system with n-qubit devices operates on the unitary group and could encode input parameters and a second unitary transformation is used for encoding model parameters of the machine learning model and perform quantum transformation.).
As per claim 5, Hodson teaches the method according to claim 1, wherein the plurality of encoding quantum gates is applied sequentially on the one qubit (e.g. Hobson, see paragraph [0138], which discloses in some instances, when the same patched quantum control program is executed on the same QPU sublattice, iteratively, such multiple execution may be sequentially processed.).
As per claim 6, Hodson teaches the method according to claim 5, wherein between each two of the plurality of encoding quantum gates, at least one of the plurality of variational quantum gates is applied (e.g. Hobson, see paragraph [0138], which discloses in some instances, when the same patched quantum control program is executed on the same QPU sublattice, iteratively, such multiple execution may be sequentially processed.).
As per claim 7, Hodson teaches the method according to claim 1, wherein applying the plurality of variational quantum gates comprises applying an initial variational quantum gate on the one qubit or the plurality of qubits prior to applying the plurality of encoding quantum gates and/or applying a final variational quantum gate subsequent to applying the plurality of encoding quantum gates (Hobson, see paragraphs [0158], which discloses machine learning process continues with operation during which the structure of the machine learning model can be adjusted and the hyperparameters of the machine learning model are updated, where the data produced from operations may include a complete set of quantum logic gate parameters that can be translated to control parameters which can then be used to patch the quantum control program.).
As per claim 8, Hodson teaches the method according to claim 1, wherein the plurality of variational quantum gates is determined by a plurality of variational parameters, the method further comprising optimizing the variational parameters by iteratively applying the plurality of encoding quantum gates and the plurality of variational quantum gates on the one qubit or the plurality of qubits (Hobson, see paragraphs [0096-0098], which discloses the operator include readout measurements on all or a subset of qubit devices in the QPU sublattice at the output of the sequence of quantum logic gates.), determining the plurality of measurement values (e.g. Hobson, see paragraph [0057, 0096-0097], which discloses the controllers compute measurement statistics based on qubit state information from multiple shots of a quantum program, where each shot may produce a bitstring representing qubit state measurements for a single execution of the quantum program, and a collection of bitstrings from multiple shots may be analyzed to compute quantum state probabilities.), and adjusting the quantum circuit until an optimization criterion is reached (Hobson, see paragraphs [0158], which discloses machine learning process continues with operation during which the structure of the machine learning model can be adjusted and the hyperparameters of the machine learning model are updated, where the data produced from operations may include a complete set of quantum logic gate parameters that can be translated to control parameters which can then be used to patch the quantum control program.).
As per claim 9, Hodson teaches the method according to claim 8, wherein the plurality of variational parameters comprises a plurality of variational rotation angles, preferably by which the one qubit or the plurality of qubits are rotatable (e.g. Hobson, see paragraph [0090, 0094, 0133-0134], which discloses a first unitary transformation in an encoder function may include a rotation gate applied on a qubit defined by a single qubit device.).
As per claim 10, Hodson teaches the method according to claim 1, wherein the plurality of variational quantum gates comprises at least one of a Pauli-X-gate, a Pauli-Y-gate, a Pauli-Z-gate, a Hadamard gate, and a CNOT gate (e.g. Hobson, see paragraph [0086], which discloses quantum logic gates such as CNOTs.).
As per claim 11, Hodson teaches the method according to claim 1, further comprising determining a loss value from the plurality of measurement values and reference values by applying a loss function (e.g. Hobson, see paragraph [0106], which discloses hyperparameters of a machine learning model includes number of hidden layers in an artificial neural network, number of activation modes in a layer, number of iterations, cost or loss function that the model uses, type of activation function in a neural network, type of optimization algorithm.).
As per claim 12, Hodson teaches the method according to claim 11, further comprising determining a variational parameter gradient from the loss value, wherein adjusting the plurality of variational quantum gates comprises adjusting the plurality of variational quantum gates based on the variational parameter gradient (Hobson, see paragraphs [0158], which discloses machine learning process continues with operation during which the structure of the machine learning model can be adjusted and the hyperparameters of the machine learning model are updated, where the data produced from operations may include a complete set of quantum logic gate parameters that can be translated to control parameters which can then be used to patch the quantum control program.).
As per claim 13, Hodson teaches the method according to claim 1, wherein determining the output data for the data set comprises determining a basis decomposition for the dataset (e.g. Hobson, see paragraph [0096], which discloses the readout samples are obtained by performing measurements on one or more qubit devices of the QPU sublattice during an output data decoding operation. Each of the output quantum states of the qubit devices in the QPU sublattice is measured.).
As per claim 14, Hodson teaches the method according to claim 1, wherein the one qubit or the plurality of qubit are provided by energy levels of trapped ions (e.g. Hobson, see paragraph [0063], which discloses each qubit devices has two eigenstates that are used as computational basis states, and each qubit device can transition between its computational basis states or exist in an arbitrary superposition, where two lowest energy levels and the first excited state of each qubit device are defined as a qubit and used as computational basis states for quantum computation.).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. See attached PTO-892 that includes additional prior art of record describing the general state of the art in which the invention is directed to.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FARHAN M SYED whose telephone number is (571)272-7191. The examiner can normally be reached M-F 8:30AM-5:30PM.
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/FARHAN M SYED/Primary Examiner, Art Unit 2161 October 5, 2026
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