DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 19-21, 25-26, 28-30, and 31-32 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 20100231286 A1 (Kuusilinna).
Regarding claims 19 and 28: Kuusilinna teaches a measuring chip, comprising: at least one component node and a common node, configured to electrically connect to at least one first PN junction element disposed at a sensing chip to sense a temperature of the sensing chip (thermal sensor 22 (“said thermal sensor may be a thermal diode.”, Paragraph [0029]) on stacked die 2; Fig. 4); at least one second PN junction element for sensing a temperature of the measuring chip (thermal sensor 22 on stacked die 4; Fig. 4); a second temperature measurement circuit electrically connected to the first PN junction element and the second PN junction element, and configured to measure a temperature difference value between a temperature of the sensing chip and a temperature of the measuring chip (shaded area 40, Fig. 3, represents temperature gradient, requiring the measuring of a temperature difference); and a third temperature measurement circuit comprising at least one third PN junction element, and configured to measure a temperature value of the measuring chip (thermal sensor 22 on stacked die 6; Fig. 4), wherein the temperature difference value and the temperature value of the measuring chip are for use in calculating to obtain a temperature value of the sensing chip (shaded area(s) 40, shown on stacked dies 2, 4, and 6 in Fig. 3, represent a 3-dimensional temperature gradient, which includes using a temperature difference in comparison with another temperature measurement in order to find the temperature of one of the stacked dies (2, 4, or 6)).
Claim 28 contains the limitations of claim 19 applied in a semiconductor substrate. Kuusilinna teaches this as well (“a device is provided comprising at least two semiconductor dies packaged together in a three-dimensional die structure”, Paragraph [0023]) and therefore the rejection applies to claim 28 as well, mutatis mutandis.
Regarding claims 20 and 29: Kuusilinna teaches the measuring chip of claim 19 and the method of claim 28 (see above), wherein the at least one first PN junction element is a pair of first PN junction elements having a first common node, and the at least one second PN junction element is a pair of second PN junction elements having a second common node, the first and second common nodes have a same reference potential (the first and second PN junction elements (temperature sensors on stacked sies 2 and 4), are in at least pairs, seen in Fig. 4; shared signaling resource 54).
Regarding claims 21 and 30: Kuusilinna teaches the measuring chip of claim 20 and the method of claim 29 (see above), wherein the second temperature measurement circuit comprises at least one multiple current source circuit for providing multiple currents to flow through the pair of first PN junction elements to generate a plurality of first voltage signals associated with the pair of first PN junction elements, and providing multiple currents to flow through the pair of second PN junction elements to generate a plurality of second voltage signals associated with the pair of second PN junction elements (“There are several possibilities for achieving this effect. One option is to control the galvanic connection to the sensor by multiplexing. An implementation may include a single multiplexer on each die for all sensors arranged thereon, or several smaller multiplexers on each die. In other embodiments, other switching elements may be used. For example, a specific sensor may be selected by digital logic such as using control registers which are writeable from outside the die. The registers may act as switch control inputs, while the corresponding switches control a connection to a voltage or current source associated with the temperature sensors.”, Paragraph [0070]).
Regarding claims 25 and 31: Kuusilinna teaches the measuring chip of claim 21 and the method of claim 30 (see above), wherein the second temperature measurement circuit comprises a calculating unit for calculating to obtain the temperature difference value according to a plurality of first voltage signals of the pair of first PN junction elements and a plurality of second voltage signals of the pair of second PN junction elements (“processors, memories, accelerators, or buses which may be formed by or within the semiconductor dies”, Paragraph [0049]).
Regarding claims 26 and 32: Kuusilinna teaches the measuring chip of claim 19 and the method of claim 28 (see above), further comprising a processing unit for calculating the temperature difference value and the temperature value of the measuring chip to obtain the temperature value of the sensing chip (shaded area(s) 40, shown on stacked dies 2, 4, and 6 in Fig. 3, represent a 3-dimensional temperature gradient, which includes using a temperature difference in comparison with another temperature measurement in order to find the temperature of one of the stacked dies (2, 4, or 6); “processors, memories, accelerators, or buses which may be formed by or within the semiconductor dies”, Paragraph [0049]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 22-24, 27, and 33 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20100231286 A1 (Kuusilinna) in view of EP 2505978 A1 (Ponomarev).
Regarding claim 22: Kuusilinna teaches the measuring chip of claim 21 (see above), but does not directly teach that the at least one multiple current source circuit provides multiple currents having a current ratio of 1:n to flow through the pair of first PN junction elements respectively to generate a plurality of first voltage signals associated with the pair of first PN junction elements, and provides multiple currents having a current ratio of 1 :n to flow through the pair of second PN junction elements respectively to generate a plurality of second voltage signals associated with the pair of second PN junction elements, wherein the pair of first PN junction elements has a junction area ratio of 1:1, and the pair of second PN junction elements has a junction area ratio of 1:1.
However, Ponomarev teaches that “The current ratios I.sub.1/I.sub.2/.../I.sub.n are preferably set using common current mirroring techniques and can even be measured by monitoring the supply current as suggested in FIG. 8 for each I.sub.2/I.sub.1 ratio” (Paragraph [0039]).
Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the multiplexer of Kuusilinna with the current ratios of Ponomarev. This is because they are both temperature sensors of a PN junction device. This is important in order to improve the accuracy of the currents delivered to the PN junction device.
Regarding claim 23: Kuusilinna teaches the measuring chip of claim 21 (see above), but does not directly teach that the at least one multiple current source circuit provides equal currents I to flow through the pair of first PN junction elements respectively to generate a plurality of first voltage signals associated with the pair of first PN junction elements, and provides equal currents I to flow through the pair of second PN junction elements respectively to generate a plurality of second voltage signals associated with the pair of second PN junction elements, and the pair of first PN junction elements has a junction area ratio of 1:n, and the pair of second PN junction elements having a junction area ratio of 1:n.
However, Ponomarev teaches that “The current ratios I.sub.1/I.sub.2/.../I.sub.n are preferably set using common current mirroring techniques and can even be measured by monitoring the supply current as suggested in FIG. 8 for each I.sub.2/I.sub.1 ratio” (Paragraph [0039]).
Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the multiplexer of Kuusilinna with the current ratios of Ponomarev. This is because they are both temperature sensors of a PN junction device. This is important in order to improve the accuracy of the currents delivered to the PN junction device.
Regarding claim 24: Kuusilinna teaches the measuring chip of claim 21 (see above), but does not directly teach that the second temperature measurement circuit comprises a switching network so that the at least one multiple current source circuit selectively switches to provide equal currents I to flow through the pair of first PN junction elements respectively, so as to generate a plurality of first voltage signals associated with the pair of first PN junction elements, and selectively switches to provide equal currents I to flow through the pair of second PN junction elements respectively, so as to generate a plurality of second voltage signals associated with the pair of second PN junction elements, the pair of first PN junction elements has a junction area ratio of 1 :n, and the pair of second PN junction elements has a junction area ratio of 1 :n.
However, Ponomarev teaches that “The current ratios I.sub.1/I.sub.2/.../I.sub.n are preferably set using common current mirroring techniques and can even be measured by monitoring the supply current as suggested in FIG. 8 for each I.sub.2/I.sub.1 ratio”, that “the current device comprises a plurality of current sources, each of said current sources being conductively coupled to the p-n junction device via a respective switch, the temperature sensor further comprising a controller adapted to individually control said respective switches to provide said sequence”, “Each of the current mirrors can be individually connected to the p-n junction device 110 through one of the switches 220. In operation, a control circuit (not shown) will sequentially increase the current flowing through the DTMOS transducer 110 by opening the switches between the current mirrors and the transducer 110, whilst at the same time measuring the voltage across the transducer 110”.
Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the multiplexer of Kuusilinna with the switch network and current ratios of Ponomarev. This is because they are both temperature sensors of a PN junction device. This is important in order to improve the accuracy of the currents delivered to the PN junction device.
Regarding claims 27 and 33: Kuusilinna teaches the measuring chip of claim 26 and the method of claim 32 (see above), but does not directly teach a wireless communication module electrically connected to the processing unit, the processing unit configured to calculate and obtain the temperature value of the first chip and control the wireless communication module to transmit the temperature value by wireless communication.
However, Ponomarev teaches “a wireless transceiver, e.g. a Zigbee or Bluetooth transceiver, a RFID transceiver or other near-field communication (NFC) functionality” and “a processor adapted to determine the minimum value of the voltage swing from said characteristics and to convert said minimum value to a temperature value.”
Therefore, before the effective filing date of the claimed invention it would have been obvious to one of ordinary skill in the art to modify the processing of Kuusilinna with the wireless communication of Ponomarev. This is because they are both temperature sensors of a PN junction device. This is important in order to perform calculations outside of the measurement site itself to get accurate results.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 20230004310 A1 teaches a memory device includes a first nonvolatile memory die, a second nonvolatile memory die, a controller, and a first temperature sensor and a second temperature sensor.
US 20220099501 A1 teaches an integrated circuit that controls distributed temperature sensors in a semiconductor die.
CN 113720489 A teaches a thermometer with a thermistor and temperature measuring chip that stores multiple datasets of temperature change curves.
CN 111721426 A teaches a thermopile sensor with a heater and a control assembly for two temperature measuring chips.
CN 110954244 A teaches a temperature measuring device for a semiconductor PN junction.
US 20180073933 A1 teaches a method for temperature monitoring comprises receiving temperature readings from a plurality of temperature sensors on a chip, and determining an average or a sum of the temperature readings from the temperature sensors.
US 20180045579 A1 teaches a temperature sensor, which is integrated into a semiconductor chip with an electro-thermal filter.
US 6565254 B2 teaches an infrared sensing element including a plurality of thermocouples connected in series so that cold junctions are located on the thick wall portion and hot junctions are located on the thin film portion, wherein a thermosensitive portion is provided in contact with the thick wall portion so that a reference temperature with high accuracy can be used for determining temperature based on output from the thermopile.
US 6149299 A teaches an apparatus and method for directly measuring the operating temperature of a semiconductor device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JULIA FITZPATRICK whose telephone number is (703)756-5783. The examiner can normally be reached Mon-Fri 8am-4pm.
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/JULIA FITZPATRICK/Examiner, Art Unit 2855
/LAURA MARTIN/SPE, Art Unit 2855
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