DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The disclosure is objected to because of the following informalities: after “17/114,266”, should insert – US 11,817,945 --.
Appropriate correction is required.
Claim Objections
Claim 15 is objected to because of the following informalities: claim 15, “which-the” (line 2) should be – which the --. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2, 4-8, 10-12, and 18-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 2, “the portion of the digitized signal” (line 2) lacks antecedent basis. Before “portion” should insert – first --.
Claims 6 and 19, “the original digitized samples” (line 3) lack antecedent basis. “[O]riginal” should be deleted.
Claim 10, “the first digitized samples” (line 3) lack antecedent basis. “[First]” should be deleted.
Claim 18, “the previous decimation rate” (line 3) lacks antecedent basis. “[The] precious decimation rate” should be -- the [[previous]] decimation rate of the digitized samples --.
The remaining claims are also rejected under 35 U.S.C. 112(b), for being dependent upon a rejected base claim.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter.
Pursuant to the 2019 Revised Patent Subject Matter Eligibility Guidance (MPEP 2106), the following analysis is made:
Under step 1 of the Guidance, the claims fall within a statutory category.
Under step 2A, prong 1, claims 1, 9, and 14 recite an abstract idea of “determine that available capacity of the acquisition memory has exceeded a threshold” (evaluation, mental process), “determine a first portion of the digitized samples already stored in the acquisition memory are available to be overwritten” (evaluation, mental process).
The mere nominal recitation of a generic processor (processor) does not take the claim limitation out of the abstract idea (MPEP 2106.04(a)(2) (III)).
Under step 2A, prong 2, the claim limitations are not integrated into a practical application (MPEP 2106.04(d)(I)).
An input configured to receive an input signal from a Device Under Test (DUT);
an analog-to-digital converter configured to receive the input signal and produce
digitized samples at a first decimation rate; and an acquisition memory for storing the digitized samples are directed to insignificant extra-solution activities of data gathering (see MPEP 2106.05(g)). Further, “produc[ing] additional digital samples from the input signal at a second decimation rate that is higher than the first decimation rate” and “configured to adaptively vary over time a decimation rate of the digitized samples in the acquisition memory based on available capacity of the acquisition memory” are not based on an abstract idea. Thus, the abstract idea is not used/applied in a meaningful way (MPEP 2106.05(e)).
Under step 2B, the claims do not include additional elements that are sufficient to amount to significantly more than the abstract idea. An input configured to receive an input signal from a Device Under Test (DUT); an analog-to-digital converter configured to receive the input signal and produce digitized samples at a first decimation rate; and an acquisition memory for storing the digitized samples; produc[ing] additional digital samples from the input signal at a second decimation rate that is higher than the first decimation rate are well-understood, routine, and conventional feature known in the industry and do not qualify as “significantly more” than the claimed judicial exception (see MPEP 2106.05(d)). Accordingly, the additional elements do not provide meaningful limitation(s) to transform the abstract idea into a patent eligible application of the abstract idea.
The remaining dependent claims do not provide meaningful limitation(s) to transform the abstract idea into a patent eligible application of the abstract idea.
Claims 2, 4-7, 10, 11, 15-18, and 20 are directed to conventional insignificant extra solution activities.
Claims 3, 4, 10, 13, 16, 18, and 19 are directed to an abstract idea/data.
Claims 2, 5, 8, 12, 15, and 17 are directed to an abstract idea not used/applied in a meaningful way.
Accordingly, claims 1, 9, and 14 and their respective dependent claims 2-8, 10-13, and 15-20 are patent eligible under 35 USC 101.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 14-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-3 of U.S. Patent No. 11,817,945 (to Arnold). Although the claims at issue are not identical, they are not patentably distinct from each other because Arnold (‘945) anticipates the claimed invention:
14. A test and measurement system (claim 1) comprising:
an input configured to receive a signal under test from a Device Under Test (DUT) (claim 1, line 2);
an analog-to-digital converter configured to receive the signal under test and produce digitized samples (claim 1, lines 3-4);
an acquisition memory that stores the digitized samples (claim 1, lines 5, 7); and
one or more processors configured to adaptively vary over time a decimation rate of the digitized samples in the acquisition memory based on available capacity of the acquisition memory (claim 1, lines 6-8).
15. The system according to claim 14 in which the digitized samples are stored in the acquisition memory, and in which-the one or more processors are configured to adaptively decimate the digitized samples by determining a portion of the digitized samples already stored in the acquisition memory are available to be overwritten (claim 1, lines 20-25, 11-14).
16. The system according to claim 14 in which the digitized samples are stored in the acquisition memory, and in which the one or more processors are configured to adaptively decimate the digitized samples by:
determining a portion of the digitized samples already stored in the acquisition memory are available to be overwritten (claim 1, lines 17-19); and
storing additional digitized samples in the areas of the acquisition memory that were determined to be available to be overwritten (claim 1, lines 22-24).
17. The system according to claim 16 in which the one or more processors are configured to adaptively decimate the digitized samples by storing the additional digitized samples in the areas of the acquisition memory that were determined to be available to be overwritten at a decimation rate based on how large of a portion of the digitized samples already stored in the acquisition memory were determined to be available to be overwritten (claim 1, lines 20-25).
18. The system according to claim 17 in which half of the number of the digitized samples already stored in the acquisition memory were determined to be available to be overwritten, and in which the decimation rate of the additional digitized samples to be stored in the acquisition memory is twice the previous decimation rate. (claim 1, lines 26-29)
19. The system according to claim 14 in which the one or more processors are further structured to store a copy of the digitized samples in a memory of the system, the copy of the digitized samples having a different decimation rate than the original digitized samples (claim 2).
20. The system according to claim 19, further comprising a display configured to show a video representation generated from the copy of the digitized sample (claim 3).
Claims 1-13 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-8 of U.S. Patent No. 11,817,945 (to Arnold) in view of Baldwin et al. (US 2014/0324389).
Arnold (‘945) claims:
1. A test and measurement system (claim 1) comprising:
an input configured to receive an input signal from a Device Under Test (DUT) (claim 1, line 2);
an analog-to-digital converter configured to receive the input signal and produce digitized samples at a first decimation rate (claim 1, lines 3-4);
an acquisition memory for storing the digitized samples (claim 1, lines 5, 7); and
one or more processors configured to (claim 1, line 6):
determine a first portion of the digitized samples already stored in the
acquisition memory are available to be overwritten (claim 1, lines 17-19),
produce additional digital samples from the input signal at a second
decimation rate that is higher than the first decimation rate (claim 1, lines 13-14, 20-22, 28-29), and
store the additional digitized samples in an area of the acquisition
memory previously occupied by the first portion of the digitized samples (claim 1, lines 20-22).
2. The system according to claim 1 in which the one or more processors are configured to adaptively decimate the digitized samples by determining the portion of the digitized samples already stored in the acquisition memory are available to be overwritten (claim 1, lines 20-25).
3. The system according to claim 1 in which the second decimation rate is twice the first decimation rate (claim 1, lines 28-29).
4. The system according to claim 2 in which the one or more processors are configured to adaptively decimate the digitized samples by:
determining a portion of the digitized samples already stored in the acquisition memory are available to be overwritten (claim 1, lines 17-19); and
storing additional digitized samples in the areas of the acquisition memory that were determined to be available to be overwritten (claim 1, lines 20-22).
5. The system according to claim 4 in which the one or more processors are configured to adaptively decimate the digitized samples by storing the additional digitized samples in the areas of the acquisition memory that were determined to be available to be overwritten at a decimation rate based on how large of a portion of the digitized samples already stored in the acquisition memory were determined to be available to be overwritten (claim 1, lines 20-25).
6. The system according to claim 1 in which the one or more processors are further structured to store a copy of the digitized samples in a memory of the system, the copy of the digitized samples having a different decimation rate than the original digitized samples (claim 2).
7. The system according to claim 6, further comprising a display configured to show a video representation generated from the copy of the digitized sample (claim 3).
8. The system according to claim 7, further comprising a trigger facility structured to set a trigger based on anomalies observed in the video representation generated from the copy of the digitized sample (claim 4).
9. A method performed by a test and measurement instrument (claim 5), the method comprising:
receiving a signal under test at a test input (claim 5, line 2);
producing digitized samples of the signal under test at a first decimation rate (claim 5, line 3);
storing the digitized samples in an acquisition memory (claim 5, line 4);
determining a first portion of the digitized samples already stored in the acquisition memory are available to be overwritten (claim 5, lines 14-16);
producing additional digital samples from the signal under test at a second decimation rate that is higher than the first decimation rate (claim 5, lines 19-21, 27-28); and
storing the additional digitized samples in an area of the acquisition memory that previously stored the first portion of the digitized samples (claim 5, lines 19-21).
10. The method according to claim 9, further comprising storing a copy of the digitized samples in a second memory of the system, the copy of the digitized samples having a different decimation rate than the first digitized samples (claim 6).
11. The method according to claim 10, further comprising showing a video representation generated from the copy of the digitized sample on a display (claim 7).
12. The method according to claim 11, further comprising setting a trigger based on anomalies observed in the video representation generated from the copy of the digitized sample (claim 8).
13. The method according to claim 9, in which the second decimation rate is twice the first decimation rate (claim 5, lines 27-28).
While Arnold (‘945) does not claim determining that available capacity of the acquisition memory has exceeded a threshold, the limitation would have been obvious in view of Baldwin et al.. Baldwin et al. discloses one or more processors (30) configured to: determine that available capacity of the acquisition memory has
exceeded a threshold (measurements are made based on memory capacity, paragraph 0071, lines 15-16). Accordingly, measurements are made based on memory capacity.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 4, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Baldwin et al. (US 2014/0324389) in view of Adams et al. (US 2014/0257821).
Regarding claims 1 and 9, Baldwin et al. discloses a test and measurement system (Fig. 2) comprising:
an input (26) configured to receive an input signal from a Device Under Test (DUT) (paragraph 0056, lines 12-17; Figs. 1’s);
an analog-to-digital converter (28/29) configured to receive the input signal and produce digitized samples (Fig. 2) at a first decimation rate (paragraph 0005, lines 3-5);
an acquisition memory (32) for storing the digitized samples (paragraph 0071, lines 5-6); and
one or more processors (30) configured to:
determine that available capacity of the acquisition memory has
exceeded a threshold (measurements are made based on memory capacity, paragraph 0071, lines 15-16),
determine a first portion of the digitized samples already stored in the
acquisition memory are available to be overwritten (determine oversampled dynamic digital measurement data is transferred from memory to an external deice, claim 32, the oversampled data is no longer needed in memory and are available to be overwritten, paragraph 0007, lines 24-26; thus, the determined oversampled dynamic digital measurement data to be transferred from memory to an external deice is the data to be overwritten since data is collected and transferred one measurement waveform at a time, paragraph 0005, lines 9-13),
store the additional digitized samples in an area of the acquisition
memory previously occupied by the first portion of the digitized samples (memory device stores the dataset until they are transferred to an external device, paragraph 0007, lines 24-26, since the memory device is available for further storage of dataset, once the dataset are transferred to the external device; where data is collected and transferred one measurement waveform at a time, paragraph 0005, lines 9-13).
Regarding claims 1 and 9, Baldwin et al. does not disclose producing additional digital samples from the input signal at a second decimation rate that is higher than the first decimation rate.
Adams et al. discloses producing additional digital samples from the input signal at a second decimation rate that is higher than the first decimation rate (lowering sampling rate of second data, Abstract, lines 5-7). The memory capacity required for storing the second data storage would be reduced.
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was filed to provide Baldwin et al. with a second decimation rate that is higher than the first decimation rate as disclosed by Adams et al. for adjusting the decimation rate corresponding the memory required to store the input signal/data.
Regarding claim 2, Baldwin et al. discloses adaptively decimate the digitized samples by determining the portion of the digitized samples already stored in the acquisition memory are available to be overwritten (the determined oversampled dynamic digital measurement data is transferred from memory to an external deice prior to decimation, claim 32, the oversampled data is no longer needed in memory and are available to be overwritten, paragraph 0007, lines 24-26; thus, the determined oversampled dynamic digital measurement data to be transferred from memory to an external deice is the data to be overwritten since data is collected and transferred one measurement waveform at a time, paragraph 0005, lines 9-13)
Regarding claim 4, Baldwin et al. discloses adaptively decimate the digitized samples by
determining a portion of the digitized samples already stored in the acquisition memory are available to be overwritten (the determined oversampled dynamic digital measurement data is transferred from memory to an external device prior to decimation, claim 32, the oversampled data is no longer needed in memory and are available to be overwritten, paragraph 0007, lines 24-26; thus, the determined oversampled dynamic digital measurement data to be transferred from memory to an external deice is the data to be overwritten since data is collected and transferred one measurement waveform at a time, paragraph 0005, lines 9-13); and
storing additional digitized samples in the areas of the acquisition memory that were determined to be available to be overwritten (memory device stores the dataset until they are transferred to an external device, paragraph 0007, lines 24-26, since the memory device is available for further storage of dataset, once the dataset are transferred to the external device; where data is collected and transferred one measurement waveform at a time, paragraph 0005, lines 9-13).
Claims 14-20 are rejected under 35 U.S.C. 103 as being unpatentable over Baldwin et al. in view of Dobyns et al. (US 2012/0078557).
Regarding claim 14, Baldwin et al. discloses a test and measurement system (Fig. 2) comprising:
an input (26) configured to receive an input signal from a Device Under Test (DUT) (paragraph 0056, lines 12-17; Figs. 1’s);
an analog-to-digital converter (28/29) configured to receive the input signal and produce digitized samples (Fig. 2) at a first decimation rate (paragraph 0005, lines 3-5);
an acquisition memory (32) for storing the digitized samples (paragraph 0071, lines 5-6); and
one or more processors (30).
Baldwin et al. does not disclose adaptively vary over time a decimation rate of the digitized samples in the acquisition memory based on available capacity of the acquisition memory.
Dobyns et al. discloses adaptively vary over time a decimation rate of the digitized samples (paragraph 0072, lines 10-12) for reducing the required memory for storage (paragraph 0072, lines 13-15). Accordingly, it would have been obvious to adaptively vary over time a decimation rate of the digitized samples in the acquisition memory based on available capacity of the acquisition memory.
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was filed to provide Baldwin et al. with adaptively vary over time at a decimation rate of the digitized samples in the acquisition memory based on available capacity of the acquisition memory as suggested by Dobyns et al. (a memory capacity corresponding to a decimation rate).
Regarding claim 15, Baldwin et al. discloses the claimed limitation as discussed above with regard to claim 2.
Regarding claim 16, Baldwin et al. discloses the claimed limitation as discussed above with regard to claim 4.
Regarding claim 17, Baldwin et al. in view of Dobyns et al. discloses the claimed limitation as discussed below with regard to claim 5.
Regarding claim 18, Baldwin et al. discloses adaptively decimate the digitized samples by determining the portion of the digitized samples already stored in the acquisition memory are available to be overwritten (the determined oversampled dynamic digital measurement data is transferred from memory to an external deice prior to decimation, claim 32, the oversampled data is no longer needed in memory and are available to be overwritten, paragraph 0007, lines 24-26; thus, the determined oversampled dynamic digital measurement data to be transferred from memory to an external deice is the data to be overwritten since data is collected and transferred one measurement waveform at a time, paragraph 0005, lines 9-13)
Baldwin et al. does not disclose the second decimation rate is twice the first decimation rate.
Dobyns et al. discloses that a decimator can decimate the input signal/data by a factor of 10 to reduce the memory capacity required to store the input signal/data (paragraph 0072, lines 10-15).
However, while Dobyns et al. does not expressly disclose decimating the input signal/data at a second decimation rate that is twice the first decimation rate, it has been held that discovering an optimum value of a result effective variable (i.e. selecting the decimating rate) involves only routine skill in the art. In re Boesch, 617 F. 2d 272, 205 USPQ 215 (CCPA 1980) for the purpose of adjusting the decimation rate corresponding the memory required to store the input signal/data.
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was filed to provide Baldwin et al. as modified with at a second decimation rate that is twice the first decimation rate for the purpose of adjusting the decimation rate corresponding to the memory required to store the input signal/data.
Regarding claims 19, Baldwin et al. in view of Dobyns et al. discloses the claimed limitation as discussed above with regard to claims 6 and 10.
Regarding claim 20, Dobyns et al. discloses the claimed limitation as discussed below with regard to claims 7 and 11.
Claims 3, 5-8, and 10-13 are rejected under 35 U.S.C. 103 as being unpatentable over Baldwin et al. in view of Adams et al., as discussed above with regard to claims 1, 4, and 9, and further in view of Dobyns et al..
Regarding claims 3 and 13, Baldwin et al. as modified by Adams et al. discloses the claimed limitations as discussed above, except the second decimation rate is twice the first decimation rate.
Dobyns et al. discloses that a decimator can decimate the input signal/data by a factor of 10 to reduce the memory capacity required to store the input signal/data (paragraph 0072, lines 10-15).
However, while Dobyns et al. does not expressly disclose decimating the input signal/data at a second decimation rate that is twice the first decimation rate, it has been held that discovering an optimum value of a result effective variable (i.e. selecting the decimating rate) involves only routine skill in the art. In re Boesch, 617 F. 2d 272, 205 USPQ 215 (CCPA 1980) for the purpose of adjusting the decimation rate corresponding the memory required to store the input signal/data.
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was filed to provide Baldwin et al. as modified with at a second decimation rate that is twice the first decimation rate for the purpose of adjusting the decimation rate corresponding to the memory required to store the input signal/data.
Regarding claim 5, Baldwin et al. discloses the one or more processors (32) are configured to adaptively decimate the digitized samples by storing the additional digitized samples in the areas of the acquisition memory that were determined to be available to be overwritten (the determined oversampled dynamic digital measurement data is transferred from memory to an external deice prior to decimation, claim 32, the oversampled data is no longer needed in memory and are available to be overwritten, paragraph 0007, lines 24-26; thus, the determined oversampled dynamic digital measurement data to be transferred from memory to an external deice is the data to be overwritten since data is collected and transferred one measurement waveform at a time, paragraph 0005, lines 9-13).
Baldwin et al. as modified by Adams et al. does not disclose adaptively decimate the digitized samples at a decimation rate based on how large of a portion of the digitized samples already stored in the acquisition memory were determined to be available to be overwritten.
Dobyns et al. discloses adaptively decimate the digitized samples at a decimation rate corresponding to a memory capacity for storing samples (paragraph 0072, lines 10-15).
Accordingly, it would have been obvious to adaptively decimate the digitized samples at a decimation rate based on how large of a portion of the digitized samples already stored in the acquisition memory were determined to be available to be overwritten.
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was filed to provide Baldwin et al. as modified with adaptively decimate the digitized samples at a decimation rate based on how large of a portion of the digitized samples already stored in the acquisition memory were determined to be available to be overwritten as suggested by Dobyns et al. since a memory capacity would correspond to a decimation rate.
Regarding claims 6 and 10, Baldwin et al. discloses the one or more processors (32) are further structured to store a copy of the digitized samples in a memory of the system (paragraph 0007, lines 24-25).
Baldwin et al. as modified by Adams et al. does not disclose the copy of the digitized samples having a different decimation rate than the original digitized samples.
Dobyns et al. discloses digitizing samples having a different decimation rate (paragraph 0072, lines 10-12) corresponding to a different memory capacity.
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was filed to provide Baldwin et al. as modified with digitizing samples having a different decimation rate as suggested by Dobyns et al. for reducing memory capacity required to store the samples (paragraph 0072, lines 10-15).
Regarding claims 7 and 11, Baldwin et al. as modified by Adams et al. discloses the claimed limitations as discussed above except a display configured to show a video representation generated from the copy of the digitized sample.
Dobyns discloses a display (Fig. 12) configured to show a video representation generated from the copy of the digitized sample (Fig. 12).
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was filed to provide Baldwin et al. with a display as disclosed by Dobyns for the purpose of showing a video representation generated from the copy of the digitized sample.
Regarding claims 8 and 12, Baldwin et al. as modified by Adams et al. discloses the claimed limitations as discussed above except a trigger facility structured to set a trigger based on anomalies observed in the video representation generated from the copy of the digitized sample.
Dobyns discloses a trigger facility structured to set a trigger based on the video representation generated from the copy of the digitized sample (paragraph 0015). Dobyns et al. further discloses signals can be acquired in response to an anomaly (paragraph 0062, lines 9-10).
Therefore, it would have been obvious to a person having ordinary skill in the art at the time the invention was filed to provide Baldwin et al. as modified with a trigger facility for acquiring data as disclosed by Dobyns for the purpose of setting a trigger based on anomalies observed in the video representation generated from the copy of the digitized sample.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michael Nghiem whose telephone number is (571) 272-2277. The examiner can normally be reached on M-F.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Schechter can be reached at (571) 272-2302. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/MICHAEL P NGHIEM/Primary Examiner, Art Unit 2857 May 10, 2026
Prosecution Insights