DETAILED ACTION
Email Communication
Applicant is encouraged to authorize the Examiner to communicate via email by filing form PTO/SB/439 either via USPS, Central Fax, or EFS-Web. See MPEP 502.01, 502, 502.03.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Reopening of Prosecution After Appeal Brief
In view of the appeal brief filed on 10/02/2025, PROSECUTION IS HEREBY REOPENED. New grounds of rejections are set forth below.
To avoid abandonment of the application, appellant must exercise one of the following two options:
(1) file a reply under 37 CFR 1.111 (if this Office action is non-final) or a reply under 37 CFR 1.113 (if this Office action is final); or,
(2) initiate a new appeal by filing a notice of appeal under 37 CFR 41.31 followed by an appeal brief under 37 CFR 41.37. The previously paid notice of appeal fee and appeal brief fee can be applied to the new appeal. If, however, the appeal fees set forth in 37 CFR 41.20 have been increased since they were previously paid, then appellant must pay the difference between the increased fees and the amount previously paid.
A Supervisory Patent Examiner (SPE) has approved of reopening prosecution by signing below:
/ALLISON BOURKE/ Supervisory Patent Examiner, Art Unit 1721
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-2, 5, 7-11, and 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over Sharps (US 2008/0185038 A1) in view of Myong (US 2009/0223079 A1). Supporting evidence if provided by Kim et al. (“Wet chemical etching of ZnO films using NH x -based (NH4)2CO3 and NH4OH alkaline solution”, J Mater Sci (2017) 52:13054–13063).
Regarding claim 1, Sharps discloses a method (see figures 1-3 and [0032-0047]) of patterning an insulating layer (dielectric layer 161, fig. 3 and [0047]) on a semiconductor wafer (semiconductor wafer forming cell A, B and C; see figures 1-3) having a through hole (via 150, fig. 2 and [0046]) on the semiconductor wafer, the method comprising:
providing a semiconductor wafer (solar cell portion comprising cells A, B and C is interpreted to read on claimed semiconductor wafer; see figures 1-3 and annotated figure below) having a top side (see annotated figure), a bottom side (see annotated figure), and at least one through-opening (via 150, fig. 2 and [0046]; see annotated fig. below) extending from the top side (p+ contact 121 side) to the bottom side of the semiconductor wafer, the at least one through-opening having a continuous side wall (see figure 2 that shows continuous side wall; see also annotated figure below);
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applying an insulation layer (dielectric layer 161, fig. 3 and [0047]) applied over a surface on the top side of the semiconductor wafer and over the continuous side wall of the at least one through opening (151) (see figure 3 for configuration); and
applying a front contact material (162, figure 3 and [0047]) to a region of the top side comprising the at least one through opening (150) and into the at least one through opening (150) (see figure 3).
However, Sharps does not disclose that the front contact material is an etch-resistant filling material that is applied via a pressure process.
Myong is directed to method of making a front or transparent electrode for a solar cell ([0046]) wherein the front or transparent contact is made of ZnO and applied via printing process ([0048]) in order to allow a transparent front contact through which light is transmitted to the semiconductor layer ([0046]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to have used the ZnO as taught by Myong and formed by printing process to form the front contact of Sharps in order to allow for a transparent front contact through which light is transmitted to the semiconductor layer or subcell, as taught by Myong.
ZnO is generally resistant to etching by alkaline solutions, meaning it is relatively stable in high pH environments, while being readily etched by acidic solutions like hydrochloric acid (HCl) making it susceptible to acid etching (see Kim et al.). Therefore, it is considered resistant to alkaline etching and read on instant claimed etch-resistant material.
Regarding claim 2, Sharps further discloses that the semiconductor wafer comprises at least two solar cell stacks (cell stacks A, B and C as shown in figure 1).
Regarding claim 5, Sharps further discloses that the insulating layer (161) applied to the semiconductor wafer (solar subcells, see fig. 3) and the side wall of the through opening (150) (see fig. 3).
Regarding claim 7, Sharps as modified by Myong further discloses that the insulating layer (161) is removed in all areas not printed with the etch-resistant filling material (162) on the bottom side of the semiconductor wafer (see figure 3).
Regarding claim 8, Sharps as modified by Myong further discloses that the etch-resistant filling material (162) is applied to the semiconductor wafer exclusively in regions comprising the at least one through-opening (150) (see figure 3).
Regarding claim 9, Sharps further discloses that a diameter of the at least one through-opening (150) decreases from the top side p+ contact 121 side) towards the bottom side (substrate 101 side) (see figure 3).
Regarding claim 10, Sharps does not explicitly disclose that the through-opening has at least one step. However, the configuration of the claimed was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed stepped configuration was significant. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). MPEP §2144.04 IVB.
Regarding claim 11, Sharps further discloses that a step is formed on the top side of the semiconductor wafer (solar cell wafer formed by the subcells A, B and C, fig. 1 or 3) at an interface between the metal structure (back metal contact, see fig. 3) and a top side of an uppermost III-V subcell (top subcell C, see figures 1 and 3) (the step is formed by the dielectric or insulation layer 161).
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Regarding claim 13, Sharps further discloses a part of the insulation layer (161) is formed on a metal structure (back metal contact and/or p+ contact 121, see fig. 3), the metal structure being formed exclusively formed on the top side of the semiconductor wafer (solar cell wafer that forms the subcell) (see figure 4 that shows back metal contact only formed on top side).
Regarding claim 14, Sharps further discloses wherein the through-opening (150) is completely enclosed by a two-dimensional region of the metal structure (back metal contact and/or p+ contact 121, see fig. 3) formed below the insulation layer (161).
Regarding claim 15, Sharps further discloses that the metal structure (back metal contact and/or p+ contact 121, see fig. 3) comprises finger structures (see figure 3) for connecting the multi-junction solar cell on the top side.
Regarding claim 16, Sharps further discloses an area at the top side (top opening) and an area at the bottom side (bottom opening) each have an edge region running fully circumferentially around the at least one through-opening (see below).
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Claims 3 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Sharps (US 2008/0185038 A1) in view of Myong as applied above, and further in view of Comfeld et al. (US 2008/0092943 A1).
Regarding claims 3 and 4, Sharps further discloses that each solar cell stack has three subcells (cells A, B and C) wherein at least two subcells are III-V subcells (see [0033-0043] that discloses the subcells are made of III-V semiconductor material).
However, Sharps does not disclose that the bottom side of semiconductor wafer is formed by a Ge substrate or a Ge subcell on which two III-V subcells are disposed.
Comfeld discloses a method of making a multijunction solar cell that comprises III-V semiconductor compounds ([0002]). Comfeld further discloses the multijunction solar cell comprises a Ge subcell (28) (figures 1-2 and [0020]) on which two III-V subcells (30 and 32) (figures 1-2, [0021-0023], [0029]) are formed in the order mentioned (see figures 1-2, [0019] and [0029]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to have used the Ge subcell as the bottom subcell as taught by Comfeld to in the method of Sharps and subsequently form the III-V subcells of Sharps such that the light energy that matches with the bandgap of Ge can be converted to electricity, which would increase the light conversion efficiency.
Thus, Sharps as modified by Comfeld discloses the bottom side of the semiconductor wafer is formed by Ge subcell, which reads on instant claimed Ge substrate of claim 3 as the other layers or subcells are formed on it.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Sharps (US 2008/0185038 A1) in view of Myong as applied above, and further in view of Zhang et al. (US 2010/0051094 A1).
Regarding claim 6, Sharps as modified by Myong further discloses that the insulation or dielectric layer (16) is removed in areas not covered by the etch-resistant filling material (162) (see figure 3). However, Sharps is silent as whether the dielectric layer is removed via a wet chemical etching process or via an RIE (reactive ion etching) etching process.
Zhang discloses a solar cell manufacturing method wherein wet chemical etching is a well-known technique to remove or pattern dielectric layer ([0022]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to have used the wet chemical etching as taught by Zhang to remove the dielectric layer of Sharps because applying a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious (KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007)).
Allowable Subject Matter
Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: Sharps as modified does not disclose that exactly two completely circumferential steps are formed, wherein a first step is formed at an interface between a Ge subcell and an overlying III-V subcells, and a second step is formed between the Ge subcell and a Ge substrate.
Although it would be obvious to modify Sharps by Comfeld (see rejection of claim 4) to include Ge subcell, there is no teaching or motivation to have exactly two completely circumferential steps, wherein a first step is formed at an interface between a Ge subcell and an overlying III-V subcells, and a second step is formed between the Ge subcell and a Ge substrate.
Instant application discloses that the step-shaped of the passage opening has the advantage that in particular with a preferably conform deposition of the insulating layer and/or other layers to be deposited in the context of metallization, the thickness of the layers can be sufficiently formed on the side surfaces (see [0037] and [0055] of instant application).
Response to Arguments
Applicant's arguments with respect to claims 1-11 and 13-16 have been considered but are moot in view of the new ground(s) of rejection as necessitated by the amendments.
In the appeal brief filed on 10/02/2025, applicant argues that that Sharps (US 2008/0185038 A1) fails to disclose “providing the semiconductor wafer having a top side, a bottom side, and at least one through-opening extending from the top side to the bottom side of the semiconductor wafer, the at least one through-opening having a continuous side wall” because the hole extends to the substrate, not through it.
The Examiner respectfully disagrees. The solar cell portion made up of subcells A, B and C (see figures 1-3) is interpreted as the claimed semiconductor wafer. Figure 2/3 clearly shows that the through hole 150 passing through the semiconductor wafer (subcell portions). See also annotated figure as shown above.
Conclusion
Applicant's amendment filed on 05/14/2025 necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Correspondence/Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GOLAM MOWLA whose telephone number is (571)270-5268. The examiner can normally be reached on M-Th, 7am - 4pm.
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/GOLAM MOWLA/Primary Examiner, Art Unit 1721