Prosecution Insights
Last updated: April 19, 2026
Application No. 18/388,545

Method for performing multiple circuit tests with multiple instruments and method for creating general form file conforming to general form applicable to multiple instruments

Non-Final OA §102
Filed
Nov 10, 2023
Examiner
GO, RICKY
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Realtek Semiconductor Corporation
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
3y 2m
To Grant
89%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
804 granted / 1008 resolved
+11.8% vs TC avg
Moderate +9% lift
Without
With
+9.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
42 currently pending
Career history
1050
Total Applications
across all art units

Statute-Specific Performance

§101
35.2%
-4.8% vs TC avg
§103
19.4%
-20.6% vs TC avg
§102
28.1%
-11.9% vs TC avg
§112
13.1%
-26.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1008 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 2, 5, and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Meidan et al. [US Patent Number 9,791,506 B1; hereinafter “Meidan”]. Regarding claim 1, Meidan teaches a method for performing multiple circuit tests with multiple instruments, the method comprising: preparing test software (via software development tools – C3L15-18 and L34-41) for reading and processing a file (test code – C3L34-41) conforming to a general form (glue layer and hardware extraction layer), and preparing the test software for supporting N kinds of communication interfaces of K kinds of instruments, M kinds of communication protocols, and multiple commands executable by the K kinds of instruments, wherein the general form includes a part for interface setting, a part for communication protocol setting, and a function list part, and each of the N, the K, and the M is an integer greater than one ( incorporate a glue layer between a device hardware abstraction layer and test instruments of ATEs. The glue layer is designed to abstract the interfaces between the test instruments and the control computers of ATEs, such as the interfaces 115 and 125 between the test instruments 112 and 122 and the control computers 114 and 124, respectively. In one aspect of the embodiments, the glue layer exposes variables, functions, function calls, etc. for higher-level software executing on a control computer of an ATE, so that the control computer can direct various test instruments of the ATE through the exposed functions rather than through the test-instrument-specific low-level instructions of the ATE. In turn, based on a call to one of the plurality of exposed functions, for example, the glue layer of the ATE can generate a set of test-instrument-specific low-level control commands understood by the test instruments of the ATE. Using the glue layer, ATEs can be operated using higher-level test code - C5L30-45); creating multiple general form files conforming to the general form to support the K kinds of instruments, wherein a first file of the multiple general form files is applicable to a first instrument of the K kinds of instruments and a second file of the multiple general form files is applicable to a second instrument of the K kinds of instruments (second platform and third platform – C5L52-67) (the hardware abstraction layer 224 is designed to resolve, based on the sequence of tests defined in the test code 222, one or more signaling transactions to interface with, access, and test various features of DUTs - C7L3-18) (The glue layer 226 is configured to abstract the interface 115 between the test instrument controller 230 and the control computer 114. In that context, the glue layer 226 is configured to expose certain variables, functions, function calls, etc. to the hardware abstraction layer 224. The variables and functions are made available as a set of standard control variables and functions through which the hardware abstraction layer 224 can control the test instruments 112 - C7L35-63); and when performing a first circuit test of the multiple circuit tests with the first instrument (FIG. 3 illustrates a process 300 of cross-platform testing performed by different testing platforms according to an example embodiment described herein. At reference numeral 302, the process 300 includes performing, on a first automated test platform, a sequence of tests defined in test code 310 to evaluate one or more DUTs – C11L12-25), using the test software to choose the first file for the first circuit test, and when performing a second circuit test of the multiple circuit tests with the second instrument, using the test software to choose the second file for the second circuit test (At reference numeral 408, the process 400 includes the control computer 114 generating a set of control commands based the signaling transaction generated at reference numeral 404. More particularly, the glue layer 226 converts the signaling transaction generated at reference numeral 404 into a set of control commands that direct the test instruments 112 to carry out the signaling transaction generated at reference numeral 404 on the DUT being tested by the second platform 110 … At reference numeral 410, the process 400 includes the test instrument controller 230 controlling the instruments A-D 240-243 based on the control commands generated at reference numeral 408 - C13L5-25). Regarding claim 2, Meidan teaches the K is equal to or greater than each of the N and the M (Nth automated test platform – C11L53-65). Regarding claim 5, Meidan teaches a method for performing multiple circuit tests with multiple instruments, the method comprising: preparing test software (via software development tools – C3L15-18 and L34-41) for reading and processing a file (test code – C3L34-41) conforming to a general form (glue layer and hardware extraction layer), and preparing the test software for supporting N kinds of communication interfaces of K kinds of instruments, M kinds of communication protocols, and multiple commands executable by the K kinds of instruments, wherein the general form includes a part for interface setting and a part for communication protocol setting, and each of the N, the K, and the M is an integer greater than one ( incorporate a glue layer between a device hardware abstraction layer and test instruments of ATEs. The glue layer is designed to abstract the interfaces between the test instruments and the control computers of ATEs, such as the interfaces 115 and 125 between the test instruments 112 and 122 and the control computers 114 and 124, respectively. In one aspect of the embodiments, the glue layer exposes variables, functions, function calls, etc. for higher-level software executing on a control computer of an ATE, so that the control computer can direct various test instruments of the ATE through the exposed functions rather than through the test-instrument-specific low-level instructions of the ATE. In turn, based on a call to one of the plurality of exposed functions, for example, the glue layer of the ATE can generate a set of test-instrument-specific low-level control commands understood by the test instruments of the ATE. Using the glue layer, ATEs can be operated using higher-level test code - C5L30-45); creating multiple general form files conforming to the general form to support the K kinds of instruments, wherein a first file of the multiple general form files is applicable to a first instrument of the K kinds of instruments and a second file of the multiple general form files is applicable to a second instrument of the K kinds of instruments (second platform and third platform – C5L52-67) (the hardware abstraction layer 224 is designed to resolve, based on the sequence of tests defined in the test code 222, one or more signaling transactions to interface with, access, and test various features of DUTs - C7L3-18) (The glue layer 226 is configured to abstract the interface 115 between the test instrument controller 230 and the control computer 114. In that context, the glue layer 226 is configured to expose certain variables, functions, function calls, etc. to the hardware abstraction layer 224. The variables and functions are made available as a set of standard control variables and functions through which the hardware abstraction layer 224 can control the test instruments 112 - C7L35-63); and when performing a first circuit test of the multiple circuit tests with the first instrument (FIG. 3 illustrates a process 300 of cross-platform testing performed by different testing platforms according to an example embodiment described herein. At reference numeral 302, the process 300 includes performing, on a first automated test platform, a sequence of tests defined in test code 310 to evaluate one or more DUTs – C11L12-25), using the test software to choose the first file and select at least one of multiple first commands of the first instrument for the first circuit test, and when performing a second circuit test of the multiple circuit tests with the second instrument, using the test software to choose the second file and select at least one of multiple second commands of the second instrument for the second circuit test (At reference numeral 408, the process 400 includes the control computer 114 generating a set of control commands based the signaling transaction generated at reference numeral 404. More particularly, the glue layer 226 converts the signaling transaction generated at reference numeral 404 into a set of control commands that direct the test instruments 112 to carry out the signaling transaction generated at reference numeral 404 on the DUT being tested by the second platform 110 … At reference numeral 410, the process 400 includes the test instrument controller 230 controlling the instruments A-D 240-243 based on the control commands generated at reference numeral 408 - C13L5-25). Regarding claim 6, Meidan teaches the K is equal to or greater than each of the N and the M (Nth automated test platform – C11L53-65). Allowable Subject Matter Claims 9 and 10 are allowed. Claims 3, 4, 7, and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for allowance: Claim 9 is considered to be allowable over the cited prior art because none of the cited prior art teaches or suggests, in combination with the other claimed limitations, filling in an instrument filed of the general form with a name of the target instrument, choosing the target interface from an interface menu of the general form, and determining at least one role of the target instrument with a role menu of the general form, and thereby accomplishing the part for interface setting of the general form of the general form file, wherein communication setting required by the interface menu is accessible by a user interface of the test software; when a protocol menu of the general form includes the target protocol, choosing the target protocol from the protocol menu and thereby accomplishing the part for communication protocol setting of the general form of the general form file, wherein the protocol menu is accessible by the user interface; and when the protocol menu does not include the target protocol, adding the target protocol to a protocol page of the general form file and then choosing the target protocol from the protocol menu; and choosing at least one of one or more command(s) executable by the target instrument from a command menu of the general form and thereby accomplishing the function list part of the general form of the general form file, wherein the command menu is accessible by the user interface and the function list part of the general form file is associated with the target function. Relevant Prior Art / Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Engel et al. (US Patent Application Publication 2009/0112505 A1) discloses a method and system for providing test and measurement guidance; Melman et al. (US Patent Application Publication 2008/0059838 A1) discloses an apparatus and method for performing failure diagnostic testing of electronic equipment. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RICKY GO whose telephone number is (571)270-3340. The examiner can normally be reached on Monday through Friday from 9:00 a.m. to 5:30 p.m. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arleen M. Vazquez can be reached on (571) 272-2619. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RICKY GO/Primary Examiner, Art Unit 2857
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Prosecution Timeline

Nov 10, 2023
Application Filed
Feb 06, 2026
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
89%
With Interview (+9.1%)
3y 2m
Median Time to Grant
Low
PTA Risk
Based on 1008 resolved cases by this examiner. Grant probability derived from career allow rate.

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