Prosecution Insights
Last updated: October 24, 2026
Application No. 18/388,669

MULTI-LAYER CERAMIC BATTERIES INCLUDING ALL-SOLID ELECTROLYTE AND ELECTRONIC APPARATUSES INCLUDING THE MULTI-LAYER CERAMIC BATTERIES

Non-Final OA §102
Filed
Nov 10, 2023
Priority
Nov 17, 2022 — RE 10-2022-0154875
Examiner
SCHULER, JACOB JEROME
Art Unit
1727
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-65.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
38 currently pending
Career history
41
Total Applications
across all art units
This examiner has no resolved cases yet (career too new); statute-level performance unavailable. The Grant Probability card shows Tech Center averages instead.

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions 2. Claims 4, 6, and 9-16 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 11 August 2026. Claim Rejections - 35 USC § 102 3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 4. Claims 1-3, 5, 7, 8, 17, and 18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US-20160293907-A1). As to claim 1, Chen discloses a multi-layer ceramic battery (figure 2 and 7b, battery cell 200, [0010]) comprising: a main region in which charging and discharging is performed (figure 2 and 7b, battery cell 200); a peripheral region positioned around the main region (figure 2 and 7b, battery cell 200); and a plurality of outer current collector layers disposed on a side surface of the peripheral region (figure 2 and 7b, cathode terminating current collector 204 and anode terminating current collector 205), wherein each other current collector layer of the plurality of outer current collector layers is spaced apart from one another region (figure 2 and 7b, cathode terminating current collector 204 and anode terminating current collector 205), wherein the peripheral region comprises a stack (figure 2 and 7b, battery cell 200, [0010]), which comprises at least three side surfaces (figure 2 and 7b, battery cell 200), is in contact with the outer current collector layers (figure 2 and 7b, cathode terminating current collector 204 and anode terminating current collector 205), and is connected to the main region (figure 2 and 7b, battery cell 200), and the plurality of outer current collector layers is disposed on the at least three side surfaces (figure 2 and 7b, cathode terminating current collector 204 and anode terminating current collector 205). As to claim 2, Chen discloses the multi-layer battery of claim 1, and Chen further discloses wherein the plurality of outer current collector layers comprises a first outer current collector layer layers (figure 2 and 7b, cathode terminating current collector 204), and a second outer current collector layer spaced apart from the first outer current collector layer (figure 2 and 7b, anode terminating current collector 205), wherein the first outer current collector layer is disposed on at least one of the at least three side surfaces (figure 2 and 7b, cathode terminating current collector 204), and the second outer current collector layer is disposed on remaining side surfaces of the at least three side surfaces (figure 2 and 7b, anode terminating current collector 205). As to claim 3, Chen discloses the multi-layer battery of claim 1, and Chen further discloses wherein the plurality of outer current collector layers is symmetrically arranged around the main region (figure 2 and 7b, cathode terminating current collector 204 and anode terminating current collector 205). As to claim 5, Chen discloses the multi-layer battery of claim 1, and Chen further discloses wherein the peripheral region is symmetrical around the main region (figure 2 and 7b, battery cell 200). As to claim 7, Chen discloses the multi-layer battery of claim 1, and Chen further discloses wherein the main region comprises a first electrode layer (figure 2 and 7b, battery cell 200, [0010]); a second electrode layer facing the first electrode layer (figure 2 and 7b, battery cell 200, [0010]); and an all-solid electrolyte layer disposed between the first electrode layer and the second electrode layer (figure 2 and 7b, battery cell 200, [0010]). As to claim 8, Chen discloses the multi-layer battery of claim 7, and Chen further discloses wherein the peripheral region comprises a first peripheral region comprising the first electrode layer and the all-solid electrolyte layer, and not comprising the second electrode layer (figure 2 and 7b, battery cell 200, [0010]), and a second peripheral region comprising the second electrode layer and the all-solid electrolyte layer, and not comprising the first electrode layer (figure 2 and 7b, battery cell 200, [0010]), wherein the first and the second peripheral regions are spaced apart from each other (figure 2 and 7b, battery cell 200). As to claim 17, Chen discloses an electronic device [0007] comprising a battery [0007]; and a control unit configured to control an operation of the electronic device [0007], wherein the battery comprises the multi-layer ceramic battery of claim 1 (figure 2 and 7b, battery cell 200, [0007]). As to claim 18, Chen discloses the electronic device of claim 17, and Chen further discloses wherein the electronic device comprises a wearable device [0007]. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB JEROME SCHULER whose telephone number is (571)272-8487. The examiner can normally be reached Mon-Fri. 7:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Barbara Gilliam can be reached at 5712721330. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.J.S./Examiner, Art Unit 1727 /BARBARA L GILLIAM/Supervisory Patent Examiner, Art Unit 1727
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Prosecution Timeline

Nov 10, 2023
Application Filed
Oct 01, 2026
Non-Final Rejection mailed — §102 (current)

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Prosecution Projections

1-2
Expected OA Rounds
Grant Probability
Low
PTA Risk
Based on 0 resolved cases by this examiner. Grant probability derived from career allowance rate.

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