Prosecution Insights
Last updated: April 19, 2026
Application No. 18/390,636

DUAL-SIDED CONNECTOR FOR CONNECTING A SIGNAL CABLE TO A FLOATING HARDWARE COMPONENT AND ASSOCIATED METHOD

Non-Final OA §102§103
Filed
Dec 20, 2023
Examiner
BAILLARGEON, PAUL D
Art Unit
2831
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Hewlett Packard Enterprise Development LP
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
82%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allow Rate
389 granted / 502 resolved
+9.5% vs TC avg
Minimal +5% lift
Without
With
+4.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
24 currently pending
Career history
526
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
43.6%
+3.6% vs TC avg
§102
41.7%
+1.7% vs TC avg
§112
8.0%
-32.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 502 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 – 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Pat. No. 7,549,882 (“Kimura”). Regarding claim 1, Kimura discloses a connector (100), comprising: a housing (20/30); a first socket (socket within 20) on a first side of the housing, the first socket configured to receive a first signal cable connector inserted into the first socket (the first socket is capable of mating with a cable connector); a second socket (socket within 30) on a second side of the housing, the second socket configured to receive an end portion of a hardware component inserted into the second socket (the second socket is capable of mating with such a component), wherein the first socket and the second socket are adjacent to each other (see Fig. 7), the first socket and the second socket having openings that are interconnected with each other (see Fig. 7); a first metal contact (upper contact 10 as seen in Figure 7) extending along a first surface of the first socket to along a corresponding first surface of the second socket (the upper contact 10 extends from along an upper surface of the first socket to an upper surface of the second socket); and a second metal contact (lower contact 10 as seen in Figure 7) extending along a second surface of the first socket to along a corresponding second surface of the second socket (the lower contact 10 extends from along a lower surface of the first socket to a lower surface of the second socket). Regarding claim 2, Kimura discloses the first metal contact configured to be in physical contact with a first signal pad of the first signal cable connector in the first socket and a second signal pad of the hardware component in the second socket (the upper contact 10 is configured to engage upper signal pads of the respective mating connectors). Regarding claim 3, Kimura discloses the first metal contact configured to be to: a first side (upper side) of the first signal cable connector such that the first signal pad is between the first metal contact and a first surface of the first signal cable connector to the first side of the first signal cable connector (signal pads mating with 10 are between 10 and a surface of the first connector which supports the signal pad, see Fig. 11 and Fig. 22); and a first side (upper side) of the hardware component such that the second signal pad is between the first metal contact and a first surface of the hardware component to the first side of the hardware component (signal pads mating with 10 are between 10 and a surface of the component which supports the signal pad, see Fig. 11 and Fig. 22). Regarding claim 4, Kimura discloses wherein the second metal contact (lower contact 10) is configured to be in physical contact with a third signal pad of the first signal cable connector and a fourth signal pad of the hardware component (the upper contact 10 is configured to engage lower signal pads of the respective mating connectors). Regarding claim 5, Kimura discloses the second metal contact is configured to be to: a second side (lower side) of the first signal cable connector such that the third signal pad is between the second metal contact and a second surface of the first signal cable connector to the second side of the first signal cable connector, the first side of the first signal cable connector opposing the second side of the first signal cable connector (signal pads mating with 10 are between 10 and a surface of the first connector which supports the signal pad, see Fig. 11 and Fig. 22); and a second side (lower side) of the hardware component such that the fourth signal pad is between the second metal contact and a second surface of the hardware component to the second side of the hardware component, the first side of the hardware component opposing the second side of the hardware component (signal pads mating with 10 are between 10 and a surface of the component which supports the signal pad, see Fig. 11 and Fig. 22). Regarding claim 6, Kimura discloses a third socket on the first side of the housing (housing 20 defines two distinct socket spaces, see Fig. 2, such that a left side socket is a first socket and a right socket is a third socket), the third socket configured to receive a second signal cable connector inserted into the third socket (the two socket portions as seen in Figure 2 are capable of receiving first and second cable connectors). Regarding claim 7, Kimura discloses a third metal contact (contact 10 within the right socket) extending along a first surface of the third socket to along a corresponding third surface of the second socket, wherein the third metal contact is configured to be in physical contact with a fifth signal pad of the second signal cable connector in the third socket (see Fig. 2). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 8 – 13, 16 – 18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kimura in view of U.S. Pub. No. 2017/0046291 (“Borkenhagen”). Regarding claim 8, Kimura does not disclose the hardware component comprising: a peripheral component interconnect express (PCIe) card; or an open compute project (OCP) card. However, Borkenhagen teaches a connector (500, which is a PCIe adapter, and can be placed where 308 is indicated in Figure 3, as discussed in [0073]) with which engages a hardware component (server 302 engages the adapter, see 324), the component being a PCIe card as discussed in [0057]. It would have been obvious to make the connector compliant with and engage a PCIe hardware component as taught by Kimura, because PCIe is a widely adopted connector standard and the connector will be more desirable when able to connect to components which utilize such a standard. Regarding claims 9 – 11 and 13, Kimura discloses an apparatus, comprising: a dual-sided connector (100), the dual-sided connector comprising: a housing (20/30); a first socket (socket within 20) on a first side of the dual-sided connector, the first socket configured to receive a first cable connector inserted into the first socket (the first socket is capable of mating with a cable connector); a second socket (socket within 30) on a second side of the dual-sided connector, the second socket configured to receive an end portion of a hardware component inserted into the second socket (the second socket is capable of mating with such a component); and a plurality of first metal contacts (upper contacts 10 as seen in Figure 7) disposed within the dual-sided connector and extending from the first socket to the second socket, wherein each first metal contact is configured to be in physical contact with a first signal pad of the first cable connector and a second signal pad of the hardware component (the upper contacts 10 extend between the sockets and are positioned to mate with first and second pads of the mating components within the two sockets). Kimura does not disclose the cable connector as a PCIe cable connector, does not teach a support, does not teach the support as a riser card body or as a tray or plate, and does not teach the hardware component comprises a peripheral component interconnect express (PCIe) card. However, Borkenhagen teaches a support structure (1300) for a connector (1202), and teaches the connector as capable of receiving a PCIe cable connector (see [0111] – [0112], and note that the connector may be an adapter 500 which connects to PCIe cable connectors 312 as discussed in [0059] – [0060] and [0072] – [0073]). Borkenhagen further teaches the support as a riser card body ([0013] – [0014]), and wherein the support structure comprises a tray or a plate (see Fig. 13), and wherein the hardware component comprises a peripheral component interconnect express (PCIe) card (see [0057]). It would have been obvious to support the connector of Kimura in a riser support, and to configure the dual connector to connect to PCIe cables and PCIe cards, as taught by Borkenhagen, because this enables a multiplicity of connectors to be included with the support, and furthermore PCIe is a widely adopted connector standard and the connector will be more desirable when able to connect to components which utilize such a standard. Regarding claim 12, Kimura discloses wherein: the first socket comprises a first opening; the second socket comprises a second opening; and the first opening and the second opening form at least a portion of a continuous opening through the housing of the dual-sided connector (see Fig. 7). Regarding claim 16, Kimura discloses wherein at least one first metal contact of the plurality of first metal contacts has an S-shape or an L-shape when seen in a top-down view (see Fig. 4, where the contacts include both S shapes, seen between portion 2 and portion 7, and L shapes seen between portion 6a and portion 8). Regarding claims 17 – 18 and 20, Kimura discloses a method comprising: providing a dual-sided connector (100), the dual-sided connector comprising: a housing (20/30); a first socket (socket within 20) on a first side of the housing (see Fig. 7); a second socket (socket within 30) on a second side of the housing (see Fig. 7); and a plurality of metal contacts (10) disposed within the dual-sided connector and extending from the first socket to the second socket (see Fig. 7); plugging a first signal cable connector (51) into the first socket, the first signal cable connector coupled to a first end of a signal transmission cable, wherein: a second end of the signal transmission cable is coupled to a second signal cable connector that is configured to be connected to a motherboard of a computer; and after plugging the first signal cable connector into the first socket, the plurality of metal contacts are in physical contact with a first signal pad of the first signal cable connector (see Fig. 11 and col. 5, lns. 34 – 42); and plugging a hardware component (52) into the second socket, wherein after plugging the hardware component into the second socket, the plurality of metal contacts are in physical contact with a second signal pad of the hardware component (Fig. 11 and col. 5, lns. 34 – 42). Kimura does not disclose mounting a dual-sided connector on a support structure, and the first signal connector being a cable connector, the first signal cable connector coupled to a first end of a signal transmission cable, wherein a second end of the signal transmission cable is coupled to a second signal cable connector that is configured to be connected to a motherboard of a computer, or transmitting signals between the motherboard of the computer and the hardware component using the plurality of metal contacts, or wherein the support structure comprises a tray or a plate. However, Borkenhagen teaches a providing support structure (1300) for a connector (1202), and teaches the connector as coupled to a cable connector (see [0111] – [0112], and note that the connector may be an dual adapter 500 which connects to PCIe cable connectors 312 and PCIe hardware plugs as discussed in [0057], [0059] – [0060] and [0072] – [0073]); and wherein a second end of the signal transmission cable (312) is coupled to a second signal cable connector that is configured to be connected to a motherboard of a computer (see connection through second adapter 308 to computer 304). Borkenhagen further teaches transmitting signals between the motherboard of the computer and the hardware component using the contacts of the adapter (see Fig. 3 and at least [0088] – [0089]). Finally, Borkenhagen further teaches wherein the support structure comprises a tray or a plate (see Fig. 13). It would have been obvious to support the connector of Kimura, and to configure the dual connector to connect and transmit signals between a computer and a hardware, as taught by Borkenhagen, because this enables the connector to be utilized in a dense computing environment where multiple computing structures are to be connected. Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Kimura in Borkenhagen and U.S. Pat. No. 11,894,628 (“Wang”). Regarding claim 19, Borkenhagen teaches the support structure as a riser card body (1300, and see [0013] – [0014]). Wang teaches mounting a connecter (11) to a card body(2), the connector having dual connecting interfaces at two opposed ends of the connector body (see Fig. 1D, where there is an interface facing leftward for mating with terminal portion 13, and rightward for mating with cable portion 12a), the dual-sided connector extends through the card body (see Fig. 1D). It would have been obvious to make the support a riser card body as taught by Borkenhagen, because riser cards provide for a multiplicity of connectors, and furthermore it would have been obvious to extend the connector through the card body as taught by Wang because this secures the connector securely to a card structure in a simple manner while allowing the connector to connect to the multiple mating members perpendicularly in relation to the support card to alleviate space concerns and also to improve heat dissipation by aligning mating connectors away from the support card. Allowable Subject Matter Claims 14 – 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding Claim 14, the prior art does not disclose or suggest the claimed apparatus, further including a third socket on the first side of the dual-sided connector adjacent to the first socket, the third socket configured to allow a second PCIe cable connector to be inserted into the third socket, along with the remaining elements of the claim. Kimura discloses a divided socket structure, but does not disclose or teach each side as capable of mating with a PCIe cable connector. Borkenhagen and Long do not disclose or teach a connector with a first and third socket on a first side of the connector, each configured to mate with a PCIe cable connector, as required by the claims. The prior art, when taken alone, or in combination, cannot be construed as reasonably teaching or suggesting all of the elements of the claimed invention as arranged, disposed, or provided in the manner as claimed by the Applicant. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL D BAILLARGEON whose telephone number is (571)272-0676. The examiner can normally be reached M-F 8:30 a.m. - 5 p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Renee Luebke can be reached at (571) 272-2009. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PAUL D BAILLARGEON/Examiner, Art Unit 2833 /renee s luebke/Supervisory Patent Examiner Art Unit 2833
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Prosecution Timeline

Dec 20, 2023
Application Filed
Feb 06, 2026
Non-Final Rejection — §102, §103
Apr 06, 2026
Applicant Interview (Telephonic)
Apr 06, 2026
Examiner Interview Summary

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
82%
With Interview (+4.6%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 502 resolved cases by this examiner. Grant probability derived from career allow rate.

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