DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Regarding claim 1, the limitation “said source ohmic contact layer” and “said source electrode unit” in line 28-30 lacks antecedent basis because these are referred before reciting them first. It appears “a source ohmic contact layer” and “a source electrode unit” are recited in line 31-32. The office could not make sense of what is being claimed. Clear explanation or claim modification is required.
Regarding claim 13, the limitation “said source ohmic contact layer” and “said source electrode unit” in line 28-30 lacks antecedent basis because these are referred before reciting them first. It appears “a source ohmic contact layer” and “a source electrode unit” are recited in line 31-32. The office could not make sense of what is being claimed. Clear explanation or claim modification is required.
Regarding claim 2-12 and 14-20, these claims are rejected since they inherit the indefiniteness of the claim from which they depend.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-20 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claims 1-11 of U.S. Patent No. 11,869,969 B2.
Although the conflicting claims are not identical, they are not patentably distinct from each other because the subject matter of claim 1-20 of the instant application is encompassed by the subject matter of the Claim 1-11 of U.S. Patent No. 11,869,969 and is obvious.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: see the attached form PTO-892 for pertinent cited art.
Tanaka et al. (US publication 2023/0133459 A1) discloses some features of the claimed invention “a semiconductor substrate (fig. 2-3 and related text); an epitaxial layer (34, [0053]) disposed on said semiconductor substrate; a cell zone (5, [0055]) including a plurality of unit cells disposed in said epitaxial layer opposite to said semiconductor substrate (fig. 2), each of said unit cells including a well region (10, [0056]) having a first conductive type (p-type), a source region (11, [0056]) having a second conductive type (n-type) and disposed in said well region (fig. 2), and a well contact region (12, [0056]) having the first conductive type (p-type) and extending through said source region to contact said well region (fig. 2); a plurality of gate electrode units (13/14, [0057]), each of which is disposed on said epitaxial layer opposite to said semiconductor substrate, extends between two adjacent ones of said unit cells to cover a portion of said source region of each of said adjacent ones of said unit cells (fig. 2), and includes a gate oxide layer (13), a gate electrode layer (14) and a first dielectric layer (15, [0059]), said gate oxide layer being disposed on said epitaxial layer and extending between said two adjacent ones of said unit cells to cover a portion of each of said source region of said unit cells (fig. 2), said gate electrode layer being disposed on said gate oxide layer (fig. 2)…”.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mohammed R Alam whose telephone number is 469-295-9205 and can normally be reached between 8:00am-6:00pm (M-F) or by e-mail via Mohammed.Alam1@uspto.gov.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MOHAMMED R ALAM/Primary Examiner, Art Unit 2897