DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/15/2026 has been entered.
Response to Amendment
This is in response to applicant’s amendment/response filed on 05/15/2026, which has been entered and made of record. Claims 1-15 and 17-20 have been amended. Claims 1-20 are pending in the application.
Response to Arguments
Applicant's arguments filed on 05/15/2026 have been fully considered but they are not persuasive. Applicant submitted new amended claims. Accordingly, new grounds of rejection are set forth above. The new grounds of rejection conclusion have been necessitated by Applicant's amendments to the claims.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4, 8-11, and 15-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S, PGPubs 2023/0102071 to Burns.
Regarding claim 1, Burns teaches a method comprising (par 0139):
storing a group of quantized primitives corresponding to a plurality of primitives, the group being associated with a node of an acceleration structure (par 0045, “quantization circuitry is configured to quantize ray data and generate interval representations of quantized values. In various embodiments, while the upper and lower bounds of the generated intervals are represented using a lower precision than the input representation, the interval is guaranteed to cover the initial value in the input precision. Note that primitive data may also be stored in a quantized interval format (e.g., in an acceleration data structure)”);
performing ray intersection tests between a given ray and different quantized primitives of the group of quantized primitives in parallel by a plurality of first testing circuits configured to perform ray intersection testing at a first level of precision(par 0139-0142, “in the illustrated embodiment, the graphics processor quantizes a first representation of a ray to generate a reduced-precision interval representation of the ray, wherein the interval representation includes interval values that are guaranteed to cover corresponding values specified by the first representation of the ray. In some embodiments, the reduced-precision interval representation of the ray includes a quantized ray time represented as an interval. In some embodiments, circuitry generates, based on first and second positions of the primitive at different points within a motion blur time interval, the reduced-precision interval representation of the primitive, such that the reduced-precision interval representation of the primitive covers all possible locations of the primitive during the interval representing the quantized ray time”, par 0147-0149, “a graphics processor performs intersection tests, where the intersection tests operate on reduced-precision representations of rays that were generated by quantizing initial representations of the rays and reduced-representatives of primitives that were generated by quantizing initial representations of the primitives. In the illustrated embodiment, the intersection tests generate a first result for a first ray and a first primitive wherein the first result indicates that first ray intersects the first primitive, according to their initial representations. In some embodiments, the intersection tests may also generate a second result for a second ray and the first primitive wherein the second result indicates that it is inconclusive whether the second ray intersects the first primitive. The graphics processor may perform an intersection test for the second ray using the initial representation of the second ray and the first primitive. The intersection tests may be performed based on traversal of an acceleration data structure that includes hierarchically-arranged bounding volumes for a at least a portion of a graphics scene”);
generating result data that identifies a subset of the group of quantized primitives for which the ray intersection tests produced inconclusive results (par 0091-0094, “FIG. 10 is a diagram illustrating example regions enclosed by a quantized representation of a two-dimensional triangular primitive (e.g., post-shear). In the illustrated example, edges 1010 show the precise edges, e.g., if represented according to the original precision. Outer bounds 1020 and inner bounds 1030 show the bounds of the quantized representation, e.g., using an interval representation. As shown, a ray falling in the region outside bounds 1020 is a conclusive miss, e.g., as detectable by the circuitry of FIG. 7. A ray falling in the region between bounds 1020 and 1030 is inconclusive (e.g., because it is unknown precisely where the triangle edges fall within this region). Rays falling in this region may require a higher-precision test”, par 0139-0142, “ the graphics processor determines, using interval arithmetic, an initial intersection result based on coordinates of the interval representation of the primitive with coordinates of the interval representation of the ray, wherein a miss indicated by the initial intersection result is guaranteed not to be a hit for the first representation of the primitive and first representation of the ray”, par 0147-0150, “ the graphics processor records an intersection with the first primitive for the first ray based on the first result, without performing an intersection test for the first ray using the initial representation of the first ray and the first primitive. In the illustrated embodiment, the intersection is recorded based on: the first result, a determination that the first primitive is opaque, and a determination that there is at least one bounding volume in the acceleration data structure that encloses the entirety of the first primitive and for which the entirety of the enclosed portion of the first ray is active …..test circuitry is further configured to output a result for the first ray and the first primitive that indicates either: the first ray missed the first primitive, according to their initial representations or it is inconclusive whether the first ray misses the first primitive. For example, the processor may include the comparator and logic circuitry of both FIGS. 7 and 12. For the first ray and first primitive, in the example discussed above, this output will indicate that it is inconclusive whether the first ray misses the first primitive, because the other output indicated a definitive hit”); and
performing second ray intersection tests between the given ray and only primitives of the plurality of primitives that correspond to the subset using one or more second testing circuits configured to perform ray intersection testing at a second level of precision higher than the first level of precision (par 0046-0047, “Interval-arithmetic-based low-precision test circuitry 220, in the illustrated embodiment, is configured to generate a conservative intersection result by performing interval arithmetic on the interval representations. The conservative intersection result may guarantee that a miss signaled by circuitry 220 will not result in a hit for a higher-precision intersection test (e.g., operating on values at the input precision prior to quantization). A positive output from circuitry 220 indicates a potential hit, in these embodiments”, par 0092-0094, “a ray falling in the region outside bounds 1020 is a conclusive miss, e.g., as detectable by the circuitry of FIG. 7. A ray falling in the region between bounds 1020 and 1030 is inconclusive (e.g., because it is unknown precisely where the triangle edges fall within this region). Rays falling in this region may require a higher-precision test”, par 0096-0097, “ the processor may skip a higher-precision intersection test in some scenarios where the output of circuitry 1120 indicates a definitive hit. In some embodiments, such a ray query may be terminated under the following conditions: the ray is an any-hit ray, the triangle is opaque, and the active ray interval fully covers at least one bounding volume that fully encloses this triangle. The triangle opacity may be determined based on whether an alpha maps to the test, in some embodiments. Whether the active ray interval fully covers at least one bounding volume that fully encloses the triangle may be determined based on traversal of the ADS (which allows a determination of which bounding volumes fully enclose the triangle based on the structure of the ADS) and slab test circuitry configured to test bounding volumes for the traversal”).
Regarding claim 2, Burns teaches all the limitation of claim 1, and Burns further teach wherein each primitive identified by the result data is tested individually by one of the second ray intersection tests (par 0091-0094, “As shown, a ray falling in the region outside bounds 1020 is a conclusive miss, e.g., as detectable by the circuitry of FIG. 7. A ray falling in the region between bounds 1020 and 1030 is inconclusive (e.g., because it is unknown precisely where the triangle edges fall within this region). Rays falling in this region may require a higher-precision test”).
Regarding claim 3, Burns teaches all the limitation of claim 1, and Burns further teach wherein the plurality of first testing circuits are configured to use fixed-point arithmetic and the one or more second testing circuits are configured to use floating-point arithmetic (par 0048, “Element 242 generates a fixed-point interval representation for the ray origin, also based on the quantization frame transform. Element 246 generates a fixed-point interval representation of the ray time. For motion blur processing, element 250 temporally interpolates quantized triangle vertices based on the ray time (this element may be omitted or may directly pass the quantized triangle vertices when not performing motion blur operations). Element 260 transforms the vertices according to the shear factors and ray origin and element 270 evaluates edge equations to determine whether there is a miss or a potential hit”, par 0079-par 0082, par 0085-0086, “The illustrated AND and OR logic of FIG. 7 provides a result that indicates whether the reduced-precision test provides a conclusive miss. As shown, the six two-sided edge tests may use 12 multipliers and 6 comparators, all fixed-point …. the processor may perform a higher-precision intersection test (e.g., using the original floating-point representation) if there is an inconclusive result (a potential hit)”, par 0140, “a graphics processor quantizes a first representation of a primitive to generate a reduced-precision interval representation of the primitive, wherein the interval representation includes interval values that are guaranteed to cover corresponding values specified by the first representation of the primitive. In some embodiments, the quantization of the first representation of the primitive uses a fixed-point quantized representation rounded toward zero for a lower bound of the interval and the lower bound plus one unit of least precision (ULP) for an upper bound of the interval”).
PNG
media_image1.png
432
356
media_image1.png
Greyscale
Regarding claim 4, Burns teaches all the limitation of claim 1, and Burns further teach further comprising, for a quantized primitive of the group of quantized primitives: associating a conclusive miss result with the quantized primitive responsive to the ray intersecting a two-dimensional plane outside a boundary of the quantized primitive; and associating a conclusive hit result with the quantized primitive responsive to the ray intersecting the two-dimensional plane inside the boundary of the quantized primitive (par 0092-0094, “ FIG. 10 is a diagram illustrating example regions enclosed by a quantized representation of a two-dimensional triangular primitive (e.g., post-shear). In the illustrated example, edges 1010 show the precise edges, e.g., if represented according to the original precision. Outer bounds 1020 and inner bounds 1030 show the bounds of the quantized representation, e.g., using an interval representation. As shown, a ray falling in the region outside bounds 1020 is a conclusive miss, e.g., as detectable by the circuitry of FIG. 7. A ray falling in the region between bounds 1020 and 1030 is inconclusive (e.g., because it is unknown precisely where the triangle edges fall within this region). Rays falling in this region may require a higher-precision test. As shown, a ray falling in the region within bounds 1030 is a conclusive hit for a line corresponding to the ray.”).
Regarding claim 8, Clark et al. teach a processor comprising (par 0085): ray tracing circuitry configured to (abstract, par 0035). The remaining limitations of the claim are similar in scope to claim 1 and rejected under the same rationale.
Regarding claims 9-11, Clark et al. as modified by Burns teach all the limitation of claim 8, the claims 9-11 are similar in scope to claims 2-4 and are rejected under the same rational.
Regarding claim 15, Burns teaches a system comprising: a plurality of first processing circuits and second processing circuitry, a graphics processing circuit configured to render an image based on primitives of the plurality of primitives (par 0034, par 0042, par 0044-0045, “FIG. 2A is a block diagram illustrating example quantization circuitry and low-precision intersection test circuitry, according to some embodiments. In the illustrated embodiment, a graphics processor includes test circuitry 220 “, par 0158, “Graphics unit 1675 may generally be configured to process large blocks of data in parallel and may build images in a frame buffer for output to a display, which may be included in the device or may be a separate device. Graphics unit 1675 may include transform, lighting, triangle, and rendering engines in one or more graphics processing pipelines”). The remaining limitations of the claim are similar in scope to claim 1 and rejected under the same rationale.
Regarding claim 16, Burns teaches all the limitation of claim 15, and Burns further teaches wherein the inconclusive hit result corresponds to primitives which fail to generate either a conclusive miss result or a conclusive hit result (par 0085-0086, “The illustrated AND and OR logic of FIG. 7 provides a result that indicates whether the reduced-precision test provides a conclusive miss …. the processor may perform a higher-precision intersection test (e.g., using the original floating-point representation) if there is an inconclusive result (a potential hit)”, par 0092-0094, “ FIG. 10 is a diagram illustrating example regions enclosed by a quantized representation of a two-dimensional triangular primitive (e.g., post-shear). In the illustrated example, edges 1010 show the precise edges, e.g., if represented according to the original precision. Outer bounds 1020 and inner bounds 1030 show the bounds of the quantized representation, e.g., using an interval representation. As shown, a ray falling in the region outside bounds 1020 is a conclusive miss, e.g., as detectable by the circuitry of FIG. 7. A ray falling in the region between bounds 1020 and 1030 is inconclusive (e.g., because it is unknown precisely where the triangle edges fall within this region). Rays falling in this region may require a higher-precision test. As shown, a ray falling in the region within bounds 1030 is a conclusive hit for a line corresponding to the ray.” par 0091-0096, “intersection test circuitry that operates on quantized inputs may still provide definitive information regarding whether a line corresponding to the ray intersects a primitive, which may be useful for certain types of rays. Therefore, referring back to the example of FIG. 7, modified comparison circuitry may be implemented (in addition to or in place of the circuitry of FIG. 7) to provide a result that indicates either a conclusive hit or that it is inconclusive whether a hit occurred …. a ray falling in the region outside bounds 1020 is a conclusive miss, e.g., as detectable by the circuitry of FIG. 7. A ray falling in the region between bounds 1020 and 1030 is inconclusive (e.g., because it is unknown precisely where the triangle edges fall within this region). Rays falling in this region may require a higher-precision test”, par 0147-0150, “the intersection tests generate a first result for a first ray and a first primitive wherein the first result indicates that first ray intersects the first primitive, according to their initial representations. In some embodiments, the intersection tests may also generate a second result for a second ray and the first primitive wherein the second result indicates that it is inconclusive whether the second ray intersects the first primitive. The graphics processor may perform an intersection test for the second ray using the initial representation of the second ray and the first primitive. The intersection tests may be performed based on traversal of an acceleration data structure that includes hierarchically-arranged bounding volumes for a at least a portion of a graphics scene …. test circuitry is further configured to output a result for the first ray and the first primitive that indicates either: the first ray missed the first primitive, according to their initial representations or it is inconclusive whether the first ray misses the first primitive. For example, the processor may include the comparator and logic circuitry of both FIGS. 7 and 12. For the first ray and first primitive, in the example discussed above, this output will indicate that it is inconclusive whether the first ray misses the first primitive, because the other output indicated a definitive hit”).
Regarding claims 17-18, Clark et al. as modified by Burns teach all the limitation of claim 15, the claims 17-18 are similar in scope to claims 3-4 and are rejected under the same rational.
Allowable Subject Matter
Claims 5-7, 12-14, and 19-20 are objected to as being dependent upon a rejected base, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The cited prior art fails to teach the combination of elements recited in claims 5, 12, 19, including " wherein the result data comprises a bit mask identifying the subset of the plurality of primitives for which the ray intersection tests generated inconclusive results".
The following is a statement of reasons for the indication of allowable subject matter: The cited prior art fails to teach the combination of elements recited in claims 7 and 14, including " wherein the group of quantized primitives is stored at or near a leaf node of the acceleration structure, and performing the ray intersection tests comprises determining, from the group of quantized primitives, the subset for which higher-precision primitive data is to be fetched for the second ray intersection tests".
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jin Ge whose telephone number is (571)272-5556. The examiner can normally be reached 8:00 to 5:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jason Chan can be reached at (571)272-3022. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
JIN . GE
Examiner
Art Unit 2619
/JIN GE/Primary Examiner, Art Unit 2619
Prosecution Insights