DETAILED ACTION
Notice of Pre-AIA or AIA status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 25 March 2026 has been entered.
Response to Amendment
This action is in reply to the Applicant’s amendments filed on 25 March 2026.
Claims 1 and 4 have been amended.
Claims 2, 3, and 5-9 have been canceled.
Claims 1, 4, and 10 are currently pending and have been examined.
Response to Arguments
Applicant's arguments filed on 25 March 2026 have been fully considered but they are not persuasive.
On page 5-10 of the Applicant’s Response, applicant argues that both Cooper and AI-Mufti fail to disclose least the following sub-module of the communication in the present application: crest factor reduction (CFR), digital pre-distortion (DPD), digital up converter (DUC), digital down converter (UDC), physical random access channel (PRACH) filtering processing, automatic gain control (AGC), in-phase and quadrature (IQ) data compression and decompression, antenna calibration, and orthogonal frequency division (OFDM) phase compensation. Also Cooper fails to specify which modules should be implemented by programmable digital circuits (software) and which module should be implemented by fixed digital circuits (hardware). It may be merely trivial statement when stating anyone having ordinarily skill in the relevant art would know that any module can be implemented in hardware, software, or a combination of both. Also AI-Mufti does not even disclose the ADC and DAC module of claim 10. Also the determining which module should be allocated to programable digital circuit or fixed digital circuit is not trivial and technically challenging. Although Cooper discloses some of the sub-module of the communication signal processing module but fail to disclose the complete set of sub-modules in the present application. Moreover, AI-Mufti does not even disclose the sub-modules of the communication signal processing module.
The Examiner respectfully disagrees with Applicant’s arguments, because Cooper disclose the radio unit which function are implemented in any combination of hardware and software digital circuits having multiple components or sub-components. Also the reconfiguration (through the software or firmware) of radio units and distributed units allows enhance the communication network. Also Cooper states the various modification to the disclosure is apparent to the person having ordinary skill in the art. In general, It would be obvious to implement multiple components/subcomponents in various of combination of hardware, software, and firmware to meet the design aspect of the communication system and the improving the communication system (Fig. 1, Fig. 2, Fig. 5, Fig. 9, Fig. 18, Fig. 19, paragraph [0042, 0044, 0055, 0112, 0104, 0123, 0134, 0149, 0230, 0235]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. PGPub. No. 20210243617 to Cooper et al. in further view of U.S. PGPub. No. 20230262485 to Annavajjala et al. and U.S. PGPub. No. 20210120104 to Al-Mufti.
As to Claims 1 and 4, Cooper discloses a digital circuit for a radio unit (RU), comprising (Fig. 1, Fig. 2, Fig. 5, Fig. 9, Fig. 18, Fig. 19, paragraph [0112, 0104, 0123, 0134, 0149, 0230], where the radio unit (RU) functions are implemented in any combination of hardware and software digital circuits having multiple components or sub-components):
a single or plurality of programmable digital circuits (Fig. 1, Fig. 2, Fig. 5, Fig. 9, Fig. 18, Fig. 19, paragraph [0102, 0104, 0112, 0123, 0149, 0230, 0235], where the radio unit (RU) comprising plurality of functional units/components/subcomponents are implemented in any hardware and software digital circuits);
a single or plurality of fixed digital circuits (Fig. 1, Fig. 2, Fig. 5, Fig. 9, Fig. 18, Fig. 19, paragraph [0102, 0104, 0112, 0123, 0149, 0230, 0235], where the radio unit (RU) comprising plurality of functional units/components/subcomponents are implemented in any combination of hardware including application specific integrated circuits (ASIC, discrete hardware components, etc. - fixed circuits));
wherein at least one programmable digital circuit and at least one fixed digital circuit has a single or plurality of communication signal processing modules (Fig. 2-15, paragraph [0078, 0102, 0104, 0111, 0112, 0115, 0118, 0139, 0159, 0230], where RU hardware is implemented for flexible configurations for performing various different baseband and RF functions between the RU and DU communicating digital signals (interface between RU and DU – fronthaul interface) which implemented in any combination of software in general purpose processors/logic devices (programmable digital circuits) and application specific integrated circuits (fixed digital circuits));
wherein the different programmable digital circuit(s) and fixed digital circuit(s) are connected by a single or plurality of interface(s), and the interface can be implemented by JESD204 A/B/C, low voltage differential signaling (LVDS), PCI Express (PCIe), or other interface (Fig. 2-15, paragraph [0112, 0115, 0118, 0139], where the network ports (interface between RU and DU – fronthaul interface) communicating digital signals between the RU and DU include PCIe, Ethernet, etc.);
wherein the communication signal processing module comprises a combination of the following modules; inverse fast Fourier transform (IFFT), cyclic prefix (CP) addition, digital to analog converter (DAC), analog to digital converter (ADC), CP removal, fast Fourier transform (FFT), orthogonal frequency division multiplexing (OFDM) phase compensation (Fig. 7, Fig. 10, paragraph [0058, 0076, 0082, 0083, 0096-0100], where the RU functional blocks includes the baseband processing (in-phase/quadrature (I/Q) digital samples), IFFT, CP addition, digital to analog converter, analog to digital converter, FFT, equalization (filtering), applying amplitude and phase offsets, OFDM modulation schemes, and applying phase and amplitude offset to adjust the signal (implicitly apply to baseband (I/Q) signal, etc.).
Cooper disclose all of the subject matter as described above for various RU functional blocks (Fig. 7, Fig. 10, paragraph [0076, 0082, 0083, 0096-0100]) except for the crest factor reduction (CFR), digital pre-distortion (DPD), digital up converter (DUC), digital up converter (DUC), digital down converter (DDC), physical random access channel (PRACH) filtering processing, automatic gain control (AGC), in-phase and quadrature (IQ) data compression and decompression, and antenna calibration.
However, Annavajjala in the same field of endeavor teaches the crest factor reduction (CFR), digital pre-distortion (DPD), digital down conversion, digital up-conversion, physical random access channel (PRACH) filter, automatic gain control (AGC), sample compression and de-compression (implicitly for baseband signals after digital conversion), antenna port calibration (Fig. 3, Fig. 7, Fig. 9, paragraph [0012, 0014, 0022, 0023, 0027, 0038, 0039]).
Therefore, it would have been obvious to one of ordinarily skilled in the art before the effective filing date of the claimed invention use commonly known communication system components as taught by Annavajjala to modify the RU of Cooper to enhance the communication of the system.
Cooper in view of Annavajjala disclose all of the subject matter as described above (Cooper - Fig. 2-15, paragraph [0078, 0102, 0104, 0111, 0112, 0115, 0118, 0139, 0159, 0230]) except for programmable fronthaul module.
However, Al-Mufti in the same field of endeavor teaches the fronthaul gateway (interface between the RU and DU) implemented in one or more software module (programmable digital circuit) for improve compatibility (Fig. 1, paragraph [0004, 0021, 0026, 0044, 0085]).
Therefore, it would have been obvious to one of ordinarily skilled in the art before the effective filing date of the claimed invention use the software implemented fronthaul gateway (interface between the RU and DU) as taught by Al-Mufti to modify the RU of Cooper to support various 5G/6G communication systems to enhance the communication of the system
modulation, CP addition/removal, analog/digital conversion, equalization, analog processing, etc.).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. PGPub. No. 20210243617 to Cooper et al. in further view of U.S. PGPub. No. 20210120531 to Jeon et al.
As to Claim 10, Cooper discloses a digital circuit for a radio unit (RU), comprising (Fig. 1, Fig. 2, Fig. 5, Fig. 9, Fig. 18, Fig. 19, paragraph [0112, 0104, 0123, 0134, 0149, 0230], where the radio unit (RU) functions are implemented in any combination of hardware and software digital circuits having multiple components or sub-components):
a single or plurality of programmable digital circuits (Fig. 1, Fig. 2, Fig. 5, Fig. 9, Fig. 18, Fig. 19, paragraph [0102, 0104, 0112, 0123, 0149, 0230, 0235], where the radio unit (RU) comprising plurality of functional units/components/subcomponents are implemented in any hardware and software digital circuits);
a single or plurality of fixed digital circuits (Fig. 1, Fig. 2, Fig. 5, Fig. 9, Fig. 18, Fig. 19, paragraph [0102, 0104, 0112, 0123, 0149, 0230, 0235], where the radio unit (RU) comprising plurality of functional units/components/subcomponents are implemented in any combination of hardware including application specific integrated circuits (ASIC, discrete hardware components, etc. - fixed circuits));
wherein at least one programmable digital circuit and at least one fixed digital circuit has a single or plurality of digital to analog converter (DAC) and analog to digital converter (ADC) module(s) (Fig. 2-15, paragraph [0078, 0088, 0089, 0096-0100, 0102, 0104, 0111, 0112, 0115, 0118, 0139, 0159], where RU hardware is implemented for flexible configurations for performing various different baseband and RF functions between the RU and DU communicating digital signals including IFFT/FFT, OFDM modulation, CP addition/removal, digital to analog conversion (DAC), analog to digital conversion (ADC), equalization, analog processing, etc. which implemented in software in general purpose processor/logic device (programmable digital circuits) and application specific integrated circuits (fixed digital circuits)).
Cooper disclose all of the subject matter as described above (F Fig. 2-15, paragraph [0078, 0088, 0096-0100, 0102, 0104, 0111, 0112, 0115, 0118, 0139, 0159]) except for the remote radio head (RRH) and circuit for common public radio interface.
However, Jeon in the same field of endeavor teaches the RU referred as remote radio head (RRH) and operation of fronthaul between the RU and DU using common public radio interface implemented in combination of hardware (fixed digital circuit) and software (programmable digital circuit) (Fig. 1B, paragraph [0042, 0055, 0058, 0071, 0183]).
Therefore, it would have been obvious to one of ordinarily skilled in the art before the effective filing date of the claimed invention use the common public radio interface for RU (RRH) in signal communication system as taught by Jeon to modify the RU of Cooper to support various 5G/6G communication systems to enhance the communication of the system.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SUNG S AHN whose telephone number is (571)270-3706. The examiner can normally be reached on M-F: 9-6.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hannah Wang can be reached on 571-272-9018. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SUNG S AHN/Examiner, Art Unit 2631 (571)-270-3706
sung.ahn@uspto.gov