DETAILED ACTION
This Office action is in response to the application filed on 21 December 2023.
Claims 1-20 are presented for examination.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as anticipated by Muhammad US 2014/0362955 A1.
As to claim 1, Muhammad discloses substantially the invention as claimed, including a receiver (Figures 1, 2, T/R switch 146 turning OFF the transmitter of transceiver 290 and the receiver is turned ON, [28]), comprising:
a mixer (Figures 1-3, 13, the mixer 164a,164b) configured to receive a passband receive signal (the receive signal or Input signal 104, [83]) and generate a receive signal based on a local oscillator frequency;
a complex filter (Figures 1-3, the High-Pass Filter (HPF) 166a, 166b) configured to filter the receive signal to generate a filtered receive signal;
an analog-to-digital converter (Figures 1-3, the A/D 170a, 170b) configured to convert the filtered receive signal to a digital receive signal; and
a correction unit (Figures 1-3, the compensation module 110 or (the IQMC unit 132 including IQMC adding LOFT and DCF or the IQ mismatch compensator 178 and the IQ mismatch compensation unit 132 or the circuit 200 in Figure 3) configured receive the digital receive signal and generate a corrected receive signal (the IQ mismatch compensated signal 180), wherein the correction unit (Figure 3, the circuit 200) is configured to:
apply a first correction (coefficients generated by the IQ Mismatch Estimator 172) and a second correction (DC Filter in element 132 the High Pass Filter 202 in Figure 3 or notch filter 240 in Figure 4 to remove DC offset from the received signal) to the digital receive signal to generate the corrected receive signal (the IQ mismatch compensated signal 180), wherein the first correction reduces imbalance (IQ mismatch) in the digital receive signal and the second correction reduces nonlinear direct current terms (removing DC offset from the received signal, [45], [56], [64], [74], [79], [81], claim 19) in the digital receive signal (Figures 1-3, 12, the IQ Mismatch Estimator 172 estimates the IQ mismatch caused by the receiver based only on the received signal and determines coefficients that can be used to compensate the IQ mismatch in the receiver [27]-[28]; the IQMC 132 applies IQ mismatch compensation to generate IQ mismatch compensated In-phase and Q-phase data and a DC filter that removes the DC offset from the-pre-distorted In-phase and Q-data; the circuit 200 in Figure 3 for eliminating the IQ imbalance and the DC offset from the received digital signal, [27]-[33], [45]-[53]; The complex coefficients w1, w2 and dc are simultaneously estimated. This is a joint estimation process in which we try to search for w1, w2 and dc that force the error signal towards zeros in a mean square sense, ([80]), and the output_cmpnstd has no IQ imbalance or DC offset after convergence, ([81]), Figure 12, and associated paragraphs, [80]).
As to claim 2, Muhammad discloses, wherein the correction unit comprises: a first register (the lookup table 130, [47]) configured to store a first correction factor (the complex coefficients w1, w2) used to generate the first correction; and a second register (the lookup table 130, [47]) configured to store a second correction factor (the complex coefficient dc, [80]; DC offset, [33]) used to generate the second correction (Figures 1-3, and associated paragraphs).
As to claim 3, Muhammad discloses, wherein the correction unit comprises: a conjugate unit configured to receive the digital receive signal and generate a conjugate signal (In the above equation, the an image of the signal xI + jxQ is determined by multiplying a conjugate of the signal (xI - jxQ) with a weight value (wI +wQ, [51]); a delay unit (Figures 2, 14, the delay unit 186) configured to delay the conjugate signal to generate a delayed signal; an adaption filter (Figures 2-4, 7-8, 12, [81]) configured to filter the delayed signal to generate a filtered adaption signal; a register ([47]) configured to store a correction factor ; and a multiplier (Figure 4, [55]) connected to the register to apply the correction factor to the filtered adaption signal to generate the first correction (Figures 1-4, 7-8, 12 and associated paragraphs).
As to claim 4, Muhammad discloses, wherein at least one of: the adaption filter comprises a multiple-tap finite impulse response filter, or coefficients of at least one of the adaption filter or the delay unit are configured based on a characterization of the complex filter (Figures 1-4, 7-9, 12 and associated paragraphs).
As to claim 5, Muhammad discloses, comprising: a training unit (Figures 4, 7-10, 12-15 and associated paragraphs, the least-mean-square algorithm used by the IQME 172, forces the cross-correlation between I and Q inputs forwards zero and also the differences of the auto-correlation of I and Q inputs forwards zero, this forces I and Q to become orthogonal to each other, [53], [88]-[90]) configured to perform a training process to generate at least one of a first correction factor (coefficients w1, w2) for the first correction or a second correction factor (DC offset) for the second correction (Figures 1-4, 7-8, 12 and associated paragraphs)..
As to claim 6, Muhammad discloses, comprising: a pre-processing unit (Figures 7-9, 14, 15 and associated paragraphs, the elements 252, 254, [88]-[90]) configured to generate a normalized corrected receive signal and provide the normalized corrected receive signal to the training unit for use in generating the first correction factor (Figures 3-4, 7-9, 12, 15 and associated paragraphs).
As to claim 7, Muhammad discloses, wherein the training unit comprises:
an imbalance path (Figures 3, 4, 7-10, 12 and associated paragraphs, the IQ imbalance path) for generating the first correction factor; and
a nonlinear direct current term path (Figures 3, 4, 12, the DC k path in elements 202, 240) for generating the second correction factor.
As to claim 8, Muhammad discloses, wherein:
the imbalance path (Figures 3, 4, 7-10, 12 and associated paragraphs, the IQ imbalance path) comprises:
a first register (Figure 4, elements of (7) reg_w_I_init, (8) reg_w_Q_init, (3) reg_w_I, (4) reg_w_Q) configured to store the first correction factor;
a square unit (the least-mean-square algorithm used by the IQME 172) configured to generate a squared signal;
a first multiplier (Figure 12, Product element) configured to multiply the squared signal by a first learning rate to generate a first training factor; and
a first adder (Figure 12, Add (+) element) configured to subtract the first training factor from the first correction factor to generate an updated first correction factor for use in generating a second corrected receive signal from a second digital receive signal after the corrected receive signal is generated; and
the nonlinear direct current term path (Figures 3, 4, 12, the DC k path in elements 202, 240) comprises:
a second register (Figure 3, the element k; Figure 4, elements (10) reg_notch_K and (11) reg_notch_byp) configured to store the second correction factor;
a second multiplier (Figure 12, Product1 element) configured to use a second learning rate to generate a second training factor; and
a second adder (Figure 12, Add1 (+) element) configured to subtract the second training factor from the second correction factor to generate an updated second correction factor for use in generating the second corrected receive signal from the second digital receive signal after the corrected receive signal is generated (Figures 3-4, 7-10, 12-15 and associated paragraphs).
As to claim 9, Muhammad discloses, wherein: the training unit comprises a sequencer (Figures 2, 4, 7-10, the mu control 242) configured to generate the first learning rate and the second learning rate for a first training sequence;
the imbalance path (Figures 3, 4, 7-10, 12 and associated paragraphs, the IQ imbalance path) comprises:
a first filter (Figure 7, a first stage IQ compensation unit 250 correcting for IQ imbalance using the coefficients from the update block) configured to filter the first correction factor to generate a filtered first correction factor; and
a first switch (Figure 8, the switch element in the accumulator 268) configured to store one of the filtered first correction factor or the updated first correction factor in the first register;
the nonlinear direct current term path (Figures 3, 4, 12, the DC k path in elements 202, 240) comprises:
a second filter (Figure 4, the Notch Filter 240) configured to filter the second correction factor to generate a filtered second correction factor; and
a second switch (Figure 8, the switch element in the accumulator 270) configured to store one of the filtered second correction factor or the updated second correction factor in the second register; and
the sequencer (Figures 2, 4, 7-10, the mu control 242) is configured to: change the first learning rate and the second learning rate for a second training sequence; control the first switch to load the first register with the filtered first correction factor for the second training sequence; and control the second switch to load the second register with the filtered second correction factor for the second training sequence (Figures 3-4, 7-10, 12-15 and associated paragraphs).
As to claim 10, Muhammad discloses a receiver (Figures 1, 2, T/R switch 146 turning OFF the transmitter of transceiver 290 and the receiver is turned ON, [28]), comprising:
a mixer (Figures 1-3, 13, the mixer 164a,164b) configured to receive a passband receive signal and generate a baseband receive signal based on a local oscillator frequency;
a complex filter (Figures 1-3, the High-Pass Filter (HPF) 166a, 166b) configured to filter the baseband receive signal to generate a filtered baseband signal;
an analog-to-digital converter (Figures 1-3, the A/D 170a, 170b) configured to convert the filtered baseband signal to a digital receive signal;
a correction unit (Figures 1-3, the compensation module 110 or (the IQMC unit 132 including IQMC adding LOFT and DCF or the IQ mismatch compensator 178 and the IQ mismatch compensation unit 132 or the circuit 200 in Figure 3) configured receive the digital receive signal and generate a corrected receive signal (the IQ mismatch compensated signal 180), wherein the correction unit (Figure 3, the circuit 200) comprises:
a first register (Figure 3, the element k; Figure 4, elements (10) reg_notch_K and (11) reg_notch_byp) configured to store a first correction factor used to generate a first correction for reducing nonlinear direct current terms in the digital receive signal;
a delay unit (Figure 2, the delay unit 186) and an adaption filter (Figures 2-4, 7-8, 12, [81]) configured based on a characterization of the complex filter and configured to generate a filtered adaption signal (Figures 2-4, 7-8, 12, and associated paragraphs);
a second register (Figure 12, a reg_w1 and a reg_w2) configured to store a second correction factor;
a multiplier (Figure 12, Product and Product1 elements) connected to the second register and configured to apply a second correction factor to the filtered adaption signal to generate a second correction for reducing imbalance in the digital receive signal; and
an adder (Figure 12, Add and Add1 elements) configured to add the first correction and the second correction to the digital receive signal to generate the corrected receive signal; and
a training unit (Figures 4, 7-10, 12-15 and associated paragraphs, the least-mean-square algorithm used by the IQME 172, forces the cross-correlation between I and Q inputs forwards zero and also the differences of the auto-correlation of I and Q inputs forwards zero, this forces I and Q to become orthogonal to each other, [53], [88]-[90]) configured to perform a training process to generate at least one of the first correction factor or the second correction factor Figures 4, 7-10, 12-15 and associated paragraphs).
As to claim 11, Muhammad discloses, wherein the correction unit comprises:
a conjugate unit configured to receive the digital receive signal and generate a conjugate signal (In the above equation, the an image of the signal xI + jxQ is determined by multiplying a conjugate of the signal (xI - jxQ) with a weight value (wI +wQ, [51]), wherein:
the delay unit (Figures 2, 14, the delay unit 186) is configured to delay the conjugate signal to generate a delayed signal (Figures 2, 14, and associated paragraphs); and
the adaption filter (Figures 2-4, 7-8, 12, [81]) configured to filter the delayed signal to generate the filtered adaption signal (Figures 2-4, 7-8, 12, and associated paragraphs).
As to claim 12, Muhammad discloses, wherein: the adaption filter comprises a multiple-tap finite impulse response filter (Figure 2, the FIR 134).
As to claim 13, Muhammad discloses, comprising: a pre-processing unit (Figures 7-9, 14, 15 and associated paragraphs, the elements 252, 254, [88]-[90]) configured to generate a normalized corrected receive signal and provide the normalized corrected receive signal to the training unit for use in generating the first correction factor (Figures 7-9, 14, 15 and associated paragraphs).
As to claim 14, Muhammad discloses, wherein the training unit comprises: an imbalance path Figures 3, 4, 7-10, 12 and associated paragraphs, the IQ imbalance path) for generating the first correction factor; and a nonlinear direct current term path (Figures 3, 4, 12, the DC k path in elements 202, 240) for generating the second correction factor Figures 3, 4, 7-10, 12 and associated paragraphs).
As to claim 15, Muhammad discloses, wherein:
the imbalance path (Figures 3, 4, 7-10, 12 and associated paragraphs, the IQ imbalance path) comprises:
a square unit (the least-mean-square algorithm used by the IQME 172) configured to generate a squared signal Figures 3, 4, 7-10, 12 and associated paragraphs);
a first multiplier (Figure 12, Product element) configured to multiply the squared signal by a first learning rate to generate a first training factor Figures 3, 4, 7-10, 12 and associated paragraphs); and
a first adder (Figure 12, Add (+) element) configured to subtract the first training factor from the first correction factor to generate an updated first correction factor for use in generating a second corrected receive signal from a second digital receive signal after the corrected receive signal is generated Figures 3, 4, 7-10, 12 and associated paragraphs); and
the nonlinear direct current term path (Figures 3, 4, 12, the DC k path in elements 202, 240) comprises:
a second multiplier (Figure 12, Product1 element) configured to use a second learning rate to generate a second training factor (Figures 3, 4, 12, and associated paragraphs); and
a second subtraction unit (Figure 12, dc(n) element) configured to subtract the second training factor from the second correction factor to generate an updated second correction factor for use in generating the second corrected receive signal from the second digital receive signal after the corrected receive signal is generated (Figures 3, 4, 12 and associated paragraphs).
As to claim 16, Muhammad discloses, wherein: the training unit comprises a sequencer (Figures 2, 4, 7-10, the mu control 242) configured to generate the first learning rate and the second learning rate for a first training sequence (Figures 2-4, 7-10, and associated paragraphs);
the imbalance path (Figures 3, 4, 7-10, 12 and associated paragraphs, the IQ imbalance path) comprises:
a first filter (Figure 7, a first stage IQ compensation unit 250 correcting for IQ imbalance using the coefficients from the update block) configured to filter the first correction factor to generate a filtered first correction factor (Figures 3, 4, 7-10, 12 and associated paragraphs,; and
a first switch (Figure 8, the switch element in the accumulator 268) configured to store one of the filtered first correction factor or the updated first correction factor in the first register (Figure 8, and associated paragraphs);
the nonlinear direct current term path (Figures 3, 4, 8, 12, the DC k path in elements 202, 240) comprises:
a second filter (Figure 4, the Notch Filter 240) configured to filter the second correction factor to generate a filtered second correction factor (Figure 4, and associated paragraphs); and
a second switch (Figure 8, the switch element in the accumulator 270) configured to store one of the filtered second correction factor or the updated second correction factor in the second register (Figure 8, and associated paragraphs); and
the sequencer (Figures 2, 4, 7-10, the mu control 242) is configured to: change the first learning rate and the second learning rate for a second training sequence; control the first switch to load the first register with the filtered first correction factor for the second training sequence; and control the second switch to load the second register with the filtered second correction factor for the second training sequence (Figures 2, 4, 7-10, and associated paragraphs).
Claim 17 corresponds to the method claim of the receiver claim 1; therefore, it is rejected under the same rationale as in the receiver claim 1 as shown above.
As to claim 18, Muhammad discloses, comprising:
using a first correction factor (the complex coefficients w1, w2) to generate the first correction (coefficients generated by the IQ Mismatch Estimator 172);
generating a conjugate signal based on the digital receive signal (In the above equation, the an image of the signal xI + jxQ is determined by multiplying a conjugate of the signal (xI - jxQ) with a weight value (wI +wQ, [51]);
delaying (Figure 2, the delay unit 186) the conjugate signal to generate a delayed signal (Figure 2, and associated paragraphs);
filtering the delayed signal to generate a filtered adaption signal (Figures 1-3, and associated paragraphs, the High-Pass Filter (HPF) 166a, 166b); and
applying a second correction factor to the filtered adaption signal to generate the second correction (DC Filter in element 132 the High Pass Filter 202 in Figure 3 or notch filter 240 in Figure 4 to remove DC offset from the received signal).
As to claim 19, Muhammad discloses, comprising: performing a training process to generate a first correction factor (the complex coefficients w1, w2) for the first correction Figures 4, 7-10, 12-15 and associated paragraphs, the least-mean-square algorithm used by the IQME 172, forces the cross-correlation between I and Q inputs forwards zero and also the differences of the auto-correlation of I and Q inputs forwards zero, this forces I and Q to become orthogonal to each other, [53], [88]-[90]).
As to claim 20, Muhammad discloses, comprising: performing the training process to generate a second correction factor (the complex coefficient dc) for the second correction (Figures 4, 7-10, 12-15 and associated paragraphs, the least-mean-square algorithm used by the IQME 172, forces the cross-correlation between I and Q inputs forwards zero and also the differences of the auto-correlation of I and Q inputs forwards zero, this forces I and Q to become orthogonal to each other, [53], [79]-[90]).
The prior art cited in this Office action is: Muhammad US 2014/0362955 A1.
Conclusion
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/HAI V NGUYEN/Primary Examiner, Art Unit 2649