Prosecution Insights
Last updated: May 29, 2026
Application No. 18/393,392

Heterogeneous Integrated UV-IR Ultra-Low Loss Multi-Layer Platform with Electrical Interconnects, Gain, Modulation, Detection, and Nonlinear Optics

Non-Final OA §102§103§112
Filed
Dec 21, 2023
Priority
Dec 21, 2022 — provisional 63/476,605 +1 more
Examiner
RAHLL, JERRY T
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
National Technology and Engineering Solutions of Sandia, LLC
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
1100 granted / 1227 resolved
+21.6% vs TC avg
Moderate +8% lift
Without
With
+8.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
32 currently pending
Career history
1266
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
73.5%
+33.5% vs TC avg
§102
21.3%
-18.7% vs TC avg
§112
2.6%
-37.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1227 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements (IDS’s) submitted on 06 February 2026 have been considered by the examiner to the best of the examiner’s ability in the time allotted for examination; see attached forms PTO-1449. The numerous (over 400) references and materials listed on the forty-seven sheets of the IDS submissions make it difficult to determine whether or not any of the references, or parts of the references, are material to applicant’s claimed invention. The Applicant does not indicate any particular reference or parts of references which they deem "material" to the patentability of the pending claims under 37 CFR 1.56(b) and in some cases it clear why a particular reference has been cited. Applicant is directed to MPEP §2004, ¶13: “It is desirable to avoid the submission of long lists of documents if it can be avoided. Eliminate clearly irrelevant and marginally pertinent cumulative information. If a long list is submitted, highlight those documents which have been specifically brought to applicant's attention and/or are known to be of most significance. See Penn Yan Boats, Inc. v. Sea Lark Boats, Inc., 359 F. Supp. 948, 175 USPQ 260 (S.D. Fla. 1972), aff'd, 479 F.2d 1338, 178 USPQ 577 (5th Cir. 1973), cert. denied, 414 U.S. 874 (1974). But cf. Molins PLC v. Textron Inc., 48 F.3d 1172, 33 USPQ2d 1823 (Fed. Cir. 1995).” Drawings The drawings submitted have been reviewed and determined to facilitate understanding of the invention. The drawings are accepted as submitted. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 7-10 and 12-13 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. Claims 7-10 and 12-13 each describe that the integrated photonic platform “covers” a specified wavelength range. There is no specific definition in Applicant’s specification for the term “cover” used in this manner. It is not clear from the current language exactly what relationship the integrated photonic platform is intended to have with the claimed wavelength ranges. Therefore, the claim language is indefinite For examination purposes, the term “covers” shall be considered to mean “configured for operation with.” Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-7, 9-10, 13-15, and 18-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US Patent Application Publication 2016/0109655 to Vurgaftman et al. (“US1”). Regarding Claim 1, US1 describes an integrated photonic platform (300) comprising: at least one optical waveguide layer (101-102, 201-202, 311-316) on a substrate (203), wherein the at least one optical waveguide layer comprises a plurality of active elements (301, 306, 502); and at least one socket (formed by 301c, 306c as shown in Figs 3B-3C) to connect each of the plurality of active elements; wherein the plurality of active elements is optically and electrically connected using an epitaxial tapered waveguide micro-chiplet geometry (see Figs 1B-5F and [0034], [0048], [0050], [0054]). Regarding Claim 2, US1 describes at least one of the plurality of active elements as a gain element (301-306, see [0056]) or a modulation element (502, see [0073]). Regarding Claim 3, US1 describes at least one of the plurality of active elements as selected a semiconductor laser (301-306, see [0056]), an extended cavity or an optical modulator (502, see [0073]). Regarding Claim 4, US1 describes the at least one socket further comprising at least one direct-gain tapered waveguide gain die (301-306). Regarding Claim 5, US1 describes the at least one direct-gain tapered waveguide gain die comprising a III-V semiconductor material (see [0059]-[0060]). Regarding Claim 6, US1 describes the at least one direct-gain tapered waveguide gain die comprising GaN (see [0061]). Regarding Claim 7, US1 describes the at least one direct-gain tapered waveguide gain die comprising GaN (see [0061]), and the integrated photonic platform configured for operation with a wavelength range from 400 nm to 530 nm (see [0029]). Regarding Claim 9, US1 describes the at least one direct-gain tapered waveguide gain die comprising GaN (see [0061]), and the integrated photonic platform configured for operation with a wavelength range from 600 nm to 900 nm (see [0029]). Regarding Claim 10, US1 describes US1 describes the at least one direct-gain tapered waveguide gain die comprising GaN (see [0061]), and the integrated photonic platform configured for operation with a wavelength range from 200 nm to 1800 nm (see [0029]). Regarding Claim 13, US1 describes the at least one optical waveguide layer comprising silicon nitride (see [0040]), and the integrated photonic platform configured for operation with a wavelength range from 200 nm to 2350 nm (see [0029]). Regarding Claim 14, US1 describes a metal interconnection layer (301c, 306c). Regarding Claim 15, US1 does not describe a stress-optic actuation layer comprising aluminum nitride or PZT as claimed. However, since the stress-optic actuator layer is optionally claimed in the language of Claim 14, it is not required for anticipation of the claims as written. Regarding Claim 18, US1 describes the platform as compatible with a CMOS foundry fabrication process (see [0035]). Regarding Claim 19, US1 describes a plurality of functional blocks (501a-b) comprising a plurality of chiplets (301-306) connected to the at least one optical waveguide layer, wherein at least one of the plurality of chiplets is selected from the group consisting of: a semiconductor gain (see [0056]-[0057]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 8 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over US1 as applied to Claims 1 and/or 4, above. Regarding Claim 8, US1 describes the integrated photonic platform configured for operation with a wavelength range from 530 nm to 600 nm (see [0029]). US1 does not describe the at least one direct-gain tapered waveguide gain die comprising InGaN or AlInGaP. US1 does describe at least one direct-gain tapered waveguide gain die comprising GaN-based materials or InP-based materials (see [0061]). Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to form the at least one direct-gain tapered waveguide gain die of US1 from InGaN (a GaN-based material) or AlInGaP (and InP-based material), since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. The motivation for doing so would have been to take advantage of the particular chemical, electrical, and bandgap properties of InGaN or AlInGaP. Regarding Claims 17, US1 does not describe the system for which the platform is configured for use. However, laser sources are well-known in the art for use in cold-atom based quantum computers, cold-atom atomic clocks, and quantum sensors. Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to use the laser source platform of US1 in such devices. The motivation for doing so would have been to make a simple substitution of one known element (the laser platform of US1) for another (the laser sources of well-known cold-atom based quantum computers, cold-atom atomic clocks, and quantum sensors) to obtain predictable results. Allowable Subject Matter Claim 11 and 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 12 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. Claims 11 and 12 describe a tunable LiNbO3 or a barium titanate (BTO) second-harmonic-generation (SHG) laser chiplet that integrates into the at least one socket. Claim 16 describes the substrate as a flexible substrate These limitations represent subject matter not described or reasonably suggested, in conjunction with the further limitations of the present claims, by the prior art of record. Conclusion The prior art cited in the attached form PTO-892 are made of record and considered pertinent to applicant's disclosure. The cited prior art describes integrated photonic platforms using sockets and/or mico-chiplet geometry. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JERRY RAHLL whose telephone number is (571)272-2356. The examiner can normally be reached M-F 9:00am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at 571-272-2397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JERRY RAHLL/Primary Examiner, Art Unit 2874
Read full office action

Prosecution Timeline

Dec 21, 2023
Application Filed
Apr 27, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12638680
WAVEGUIDE ASSEMBLY
2y 10m to grant Granted May 26, 2026
Patent 12638644
INTEGRATED CIRCUIT COMPRISING AN ASSEMBLY OF AN ELECTRONIC CHIP, AN OPTICAL ELEMENT AND A SUBSTRATE AND CORRESPONDING MANUFACTURING METHOD
2y 6m to grant Granted May 26, 2026
Patent 12638640
FERRULE ASSEMBLY AND FIBER OPTIC FAST CONNECTOR COMPRISING THE SAME
2y 5m to grant Granted May 26, 2026
Patent 12631829
OPTICAL CONNECTOR AND METHOD FOR MANUFACTURING OPTICAL CONNECTOR
3y 3m to grant Granted May 19, 2026
Patent 12625325
OPTICAL SYSTEMS FOR CO-PACKAGED APPLICATIONS
2y 9m to grant Granted May 12, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
98%
With Interview (+8.4%)
2y 0m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1227 resolved cases by this examiner. Grant probability derived from career allowance rate.

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