Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
Applicant is reminded of the proper language and format for an abstract of the disclosure.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided.
The abstract of the disclosure is objected to because it repeats information given in the title. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
The disclosure is objected to because of the following informalities:
Paragraph 0029, line 18: “accurate” should read “accurately”.
Appropriate correction is required.
35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112, requires the specification to be written in “full, clear, concise, and exact terms.” The specification is replete with terms which are not clear, concise and exact. The specification should be revised carefully in order to comply with 35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112. Examples of some unclear, inexact or verbose terms used in the specification are: “in-line,” which is never defined within the specification. Analysis of the disclosure will assume that this term is being used to mean “sequentially.”
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claim 20 is rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. Regarding claim 20, the instant claims recite the limitation of "computer-readable medium storing computer code" The claims are directed toward an article of manufacture and normally would be statutory. However, the specification, at paragraph [0138], defines or exemplifies computer-readable media generally may correspond to: (1) tangible computer-readable storage media, which is non-transitory; or (2) a communication medium such as a signal or carrier wave. Thus under the broadest reasonable interpretation of "computer-readable medium" the claim is directed toward non-statutory type computer-readable media such as transitory signals and propagating waves. Applicant is advised to amend the respective claims to exclude such transitory embodiments by adding “non-transitory” to the computer-readable storage medium which would render the claims statutory.
Claim Rejections – 35 U.S.C. 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-11 and 17-20 is/are rejected under 35 U.S.C. 102(1) as being anticipated by Socek (US 20180315199 A1).
Regarding Claim 1, Socek teaches an apparatus for graphics processing, comprising:
a memory (par. 0063); and
a processor coupled to the memory (par. 0063) and, based on information stored in the memory, the processor is configured to:
identify, in-line, a set of error regions associated with a first frame (par. 0112);
perform, in-line and based on the identified set of error regions and at least one of partial motion estimation (ME) results of a first ME pass or partial depth from stereo (DFS) results of a first DFS pass, a set of iterative downscale passes on at least one of the partial ME results or the partial DFS results (par. 0112; NOTE: claim contains alternative term “or,” meaning that only one of a first ME pass or partial DFS pass is required);
generate, in-line, a global motion buffer based on the performed set of iterative downscale passes (par. 0081); and
perform, based on at least one of the global motion buffer or the identified set of error regions, at least one of a second ME pass or a second DFS pass (par. 100).
Regarding Claim 2, Socek teaches the apparatus of claim 1, wherein the processor is further configured to:
output an indication of at least one of the performed second ME pass or the performed second DFS pass (par. 0271).
Regarding Claim 3, Socek teaches the apparatus of claim 2, wherein to output the indication of at least one of the performed second ME pass or the performed second DFS pass, the processor is configured to:
transmit the indication of at least one of the performed second ME pass or the performed second DFS pass (par. 0063); or
store, in at least one of the memory, a buffer, or a cache, the indication of at least one of the performed second ME pass or the performed second DFS pass (par. 0063).
Regarding Claim 4, Socek teaches the apparatus of claim 1, wherein the processor is further configured to:
perform at least one of the first ME pass or the first DFS pass (par. 0084); and
generate, based on the performance of at least one of the first ME pass or the first DFS pass, at least one of the partial ME results of the first ME pass or the partial DFS results of the first DFS pass (par. 0093).
Regarding Claim 5, Socek teaches the apparatus of claim 1, wherein to perform at least one of the second ME pass or the second DFS pass, the processor is configured to perform at least one of the second ME pass or the second DFS pass further based on at least one of the partial ME results of the first ME pass or the partial DFS results of the first DFS pass (par. 0198).
Regarding Claim 6, Socek teaches the apparatus of claim 5, wherein to perform at least one of the second ME pass or the second DFS pass, the processor is configured to:
interpolate between (1) at least one of the partial ME results or the partial DFS results and (2) the global motion buffer to generate an interpolated result (par. 0109);
sample the identified set of error regions (par. 0081); and
mix the sampled identified set of error regions with the interpolated result (par. 0128).
Regarding Claim 7, Socek teaches the apparatus of claim 5, wherein to perform at least one of the second ME pass or the second DFS pass, the processor is configured to:
select (1) at least one of the partial ME results or the partial DFS results or (2) the global motion buffer (par. 0073);
sample the identified set of error regions (par. 0073); and
mix the sampled identified set of error regions with (1) at least one of the selected partial ME results or the selected partial DFS results or (2) the selected global motion buffer (par. 0128).
Regarding Claim 8, Socek teaches the apparatus of claim 1, wherein to identify the set of error regions, perform the set of iterative downscale passes, and generate the global motion buffer, the processor is configured to identify the set of error regions, perform the set of iterative downscale passes, and generate the global motion buffer in-line as part of at least one of a hierarchical ME process or a hierarchical DFS process (par. 0197).
Regarding Claim 9, Socek teaches the apparatus of claim 1, wherein the first ME pass or the first DFS pass comprises an initial ME pass or an initial DFS pass, respectively, and wherein the second ME pass or the second DFS pass comprises a refinement ME pass or a refinement DFS pass, respectively (par. 0084).
Regarding Claim 10, Socek teaches the apparatus of claim 1, wherein at least one of the partial ME results or the partial DFS results comprise a first resolution, and wherein the global motion buffer comprises a second resolution that is less than the first resolution (par. 100).
Regarding Claim 11, Socek teaches the apparatus of claim 1, wherein to perform the set of iterative downscale passes on at least one of the partial ME results or the partial DFS results, the processor is configured to:
discard a first set of motion vectors associated with at least one of the first frame or a second frame, wherein the first set of motion vectors corresponds to the identified set of error regions (par. 0098); and
replace the first set of motion vectors with a second set of motion vectors, wherein to generate the global motion buffer, the processor is configured to generate the global motion buffer with the second set of motion vectors and without the first set of motion vectors (par. 0208).
Regarding Claim 17, Socek teaches the apparatus of claim 1, wherein the set of error regions corresponds to misidentified motion between a first region of the first frame and a second region of a second frame (par. 0112).
Regarding Claim 18, Socek teaches the apparatus of claim 1, wherein the apparatus is a wireless communication device comprising at least one of an antenna or a transceiver coupled to the processor (par. 0242).
Claim 19 is functionally identical to claim 1, and differs only in that it outlines a method rather than an apparatus. As a method does not on its own constitute patentable material, claim 19 is rejected on the same basis as claim 1.
Regarding Claim 20, Socek teaches a computer-readable medium storing computer executable code (par. 0221), the computer executable code, when executed by a processor, causes the processor to perform the methods outlined in claims 1 and 19 (as above).
Claim Rejections – 35 U.S.C. 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 12-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Socek (US 20180315199 A1) as applied to claims 1-11 above, and further in view of Diggins (EP 3104612 B1).
Regarding Claim 12, Socek teaches the apparatus of claim 1, but fails to teach the processor configuration as detailed in the claim.
Diggins teaches a processor configured to:
compute, based on the first frame and a second frame and within a search window, a variance of a set of block matches of at least one of the first ME pass or the first DFS pass for the first frame and the second frame (par. 0027);
compute, based on the first frame and the second frame, a symmetry metric associated with the set of block matches (par. 0040; NOTE: a “complementary vector” is considered here analogous to a symmetry metric, as they are found in a similar fashion and serve a similar purpose); and
perform a comparison of a set of positions of the set of block matches, wherein to identify the set of error regions, the processor is configured to identify the set of error regions additionally based on at least one of the computed variance, the computed symmetry metric, or the performed comparison (0051).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the block matching of Diggins into the motion estimation of Socek, as both are in the same field of endeavor of motion estimation. Block matching is clearly advantageous to the endeavor, as it facilitates motion estimation in Diggins’ invention.
Regarding Claim 13, Socek and Diggins teach the apparatus of claim 12. Socek further teaches wherein to compute the symmetry metric, the processor is configured to:
compute a horizontal neighbor block score based on the first frame and the second frame(par. 0087);
compute a vertical neighbor block score based on the first frame and the second frame (par. 0087); and
compute a ratio of (1) a difference between the vertical neighbor block score and the horizontal neighbor block score (par. 0074) and (2) a maximum of the vertical neighbor block score and the horizontal neighbor block score (par. 0083).
Regarding Claim 14, Socek and Diggins teach the apparatus of claim 12. Socek further teaches wherein the set of block matches comprises a first top block match and a second top block match (par. 0204), wherein to perform the comparison of the set of positions of the set of block matches, the processor is configured to compare a first position of the first top block match to a second position of the second top block match (par. 0112), and wherein to identify the set of error regions based on the comparison of the set of positions of the set of block matches, the processor is configured to identify the set of error regions based on the first position and the second position not being co-located (par. 0112).
Regarding Claim 15, Socek and Diggins teach the apparatus of claim 12. Socek further teaches wherein the variance is associated with a featureless region in the first frame and the second frame, wherein the symmetry metric is associated with an aperture corresponding to the first frame and the second frame, and wherein the comparison is associated with a repeated pattern region in the first frame and the second frame (par. 0197).
Regarding Claim 16, Socek and Diggins teach the apparatus of claim 12. Socek further teaches wherein the set of block matches comprises a set of N top block matches, where N is a positive integer greater than one (par. 0197).
Conclusion
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/RYAN ALLEN BARHAM/Examiner, Art Unit 2613
/XIAO M WU/Supervisory Patent Examiner, Art Unit 2613