CTNF 18/393,549 CTNF 73112 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. This application has been examined. Claims 1-20 are pending. The Group and/or Art Unit location of your application in the PTO has changed. To aid in correlating any papers for this application, all further correspondence regarding this application should be directed to Group Art Unit 2175. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15 AIA Claim s 1-20 are rejected under 35 U.S.C. § 102( a)(1 ) as being anticipated by Matsumura et al. (US Pub No. 2020/0166978) . In regard to claims 1, 8, 15, Matsumura et al. disclose a system, a method and an apparatus comprising: a hardware processor (item 212 of figure 2) that includes a continuous power mode (i.e. peak power mode); and a power management circuit (item 206 of figure 2) to couple to a battery (item 204 of figure 2) (as shown in Fig. 2, which is reproduced below for ease of reference and convenience, Matsumura discloses system 200 includes a battery pack 204, an embedded controller (EC) 206, firmware/software (FW/SW) 208, and a processor (or CPU) and other system components 212. In some embodiments, battery pack 104 can be a lithium ion battery pack (or Li-ion battery pack). In some embodiments, battery pack 204 can be the same as or similar as battery pack 104. Battery pack 204 can provide power 222 (for example, including power communications and/or control) to EC 206 and/or FW/SW 208, which can provide power 224 (for example, including power communications and/or control) to the processor and other system components 212. See ¶ 19), PNG media_image1.png 965 512 media_image1.png Greyscale wherein the power management circuit is to: determine heat dissipation for the battery over time when the hardware processor is in the continuous power mode (in Matsumura, generated heat is calculated at 604. At 606, a determination is made as to whether generated heat is smaller than a reference heat (for example, is smaller than an accumulated reference heat). If heat generated is not less than the accumulated reference heat at 606, no increase in peak current and/or peak power is allowed at 608, and flow returns to 602. If heat generated is less than the accumulated reference heat at 606, available peak current and/or peak power is calculated at 610 (for example, in some embodiments, using Equation 7). The new value calculated at 610 is then reported (for example, to a processor such as a CPU and/or to a computing system) at 612, and flow returns to 602. In some embodiments (for example, included in some embodiments of flow 600 and in other embodiments), a heat situation (for example, a heat situation such as a condition where generated heat is not smaller than a reference heat) is reported (for example, a heat situation is reported to a processor such as a CPU and/or to a computing system) in order that system power is capped until accumulated heat (for example, accumulated battery heat) falls below a reference threshold level. See ¶ 26, 28, 51), and control power provided to the hardware processor in the continuous power mode without exceeding a limit of the heat dissipation for the battery over time (in Matsumura, generated heat is calculated at 604. At 606, a determination is made as to whether generated heat is smaller than a reference heat (for example, is smaller than an accumulated reference heat). If heat generated is not less than the accumulated reference heat at 606, no increase in peak current and/or peak power is allowed at 608, and flow returns to 602. If heat generated is less than the accumulated reference heat at 606, available peak current and/or peak power is calculated at 610 (for example, in some embodiments, using Equation 7). The new value calculated at 610 is then reported (for example, to a processor such as a CPU and/or to a computing system) at 612, and flow returns to 602. In some embodiments (for example, included in some embodiments of flow 600 and in other embodiments), a heat situation (for example, a heat situation such as a condition where generated heat is not smaller than a reference heat) is reported (for example, a heat situation is reported to a processor such as a CPU and/or to a computing system) in order that system power is capped until accumulated heat (for example, accumulated battery heat) falls below a reference threshold level. See ¶ 26, 28, 51). In regard to claims 2, 9, 16, Matsumura et al. disclose wherein the power management circuit is to determine the heat dissipation for the battery over time based on a voltage of the battery (in Matsumura, a graph 400 including battery voltage graph 402 and current graph 404 in accordance with some embodiments. For example, battery voltage 402 and current 404 are shown in accordance with some embodiments under reference condition and under peak power mode. Battery voltage graph 402 includes an open circuit voltage (V.sub.OCV) 422, a voltage under reference condition (V.sub.ref) 424, and a voltage 426 under a peak power mode. Current 404 includes a current under reference condition (I.sub.r1) 444 and a current 446 under a peak power mode. See ¶ 29-35). In regard to claims 3, 10, 17, Matsumura et al. disclose wherein the power management circuit is to determine the heat dissipation for the battery over time based on a resistance of the battery (see Equation 3 ¶ 31-32). In regard to claims 4, 11, 18, Matsumura et al. disclose wherein the power management circuit is to determine the heat dissipation for the battery over time based on the resistance of the battery and a reference impedance for the battery (see Equation 3-4, ¶ 31-34). In regard to claims 5, 12, 19, Matsumura et al. disclose wherein the power management circuit is to determine the heat dissipation for the battery over time based on a current of the battery (see Equation 4-5, ¶ 34-36). In regard to claims 6, 13, 20, Matsumura et al. disclose wherein the power management circuit is to control the power provided to the hardware processor in the continuous power mode by adjusting a continuous mode current (in Matsumura, as a result of heat calculation, if the battery stays within an allowable temperature range, higher peak current may be extracted until battery temperature exceeds an allowable range. See ¶ 59-60). In regard to claims 7, 14, 15, Matsumura et al. disclose wherein the continuous power mode of the hardware processor is a continuous boost power mode (in Matsumura, as peak power mode. Peak power mode can provide an ability to go to high power while on battery power or while receiving AC power (for example, from a power supply unit), or while receiving power from both a battery and from AC power. For example, peak power mode may be implemented during times of peak power needs of the system. See ¶ 14). Examiner's note : Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the Applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the Applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passages as taught by the prior art or disclosed by the Examiner. Conclusion All claims are rejected. 07-96 The prior arts made of record and not relied upon are considered pertinent to applicant's disclosure. Rintamaeki et al. (US No. 12,282,375) disclose a method of thermal and power control in a computing device includes, at the computing device, initializing a thermal module of the computing device, receiving data at the thermal module from a first component assigned to an interface of the thermal module, and sending an output to a second component from the thermal module based on the data. Maleki et al. (US Pub No. 2014/0269811) disclose an electronic system, or its battery thermal management system, determines a thermal state of a battery used in the electronic system. A temperature at a position proximate the battery's cell is sensed during operation of the electronic system to produce a sensed value. Additionally, a temperature offset value is determined based on an aging factor for the battery. The sensed value is then adjusted based on the offset value to produce an adjusted value representative of the thermal state of the battery. Srinivasan et al. (US No. 11,662,801) disclose a supervisory control system provides power management in an electronic device by providing timeout periods for a hardware component to lower levels of the operating system such as a power management arbitrator and/or a hardware interface controller. Any inquiry concerning this communication or earlier communications from the examiner should be directed to examiner Raymond Phan, whose telephone number is (571) 272-3630. The examiner can normally be reached on Monday-Friday from 6:30AM- 3:00PM. The Group Fax No. (571) 273-8300. Communications via Internet e-mail regarding this application, other than those under 35 U.S.C. 132 or which otherwise require a signature, may be used by the applicant and should be addressed to [ raymond.phan@uspto.gov ]. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice . If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Jung can be reached at (571) 270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. All Internet e-mail communications will be made of record in the application file. PTO employees do not engage in Internet communications where there exists a possibility that sensitive information could be identified or exchanged unless the record includes a properly signed express waiver of the confidentiality requirements of 35 U.S.C. 122. This is more clearly set forth in the Interim Internet Usage Policy published in the Official Gazette of the Patent and Trademark on February 25, 1997 at 1195 OG 89. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see hop://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Any inquiry of a general nature or relating to the status of this application should be directed to the TC 2100 central telephone number is (571) 272-2100. /RAYMOND N PHAN/ Primary Examiner, Art Unit 2175 Application/Control Number: 18/393,549 Page 2 Art Unit: 2175 Application/Control Number: 18/393,549 Page 3 Art Unit: 2175 Application/Control Number: 18/393,549 Page 4 Art Unit: 2175 Application/Control Number: 18/393,549 Page 5 Art Unit: 2175 Application/Control Number: 18/393,549 Page 6 Art Unit: 2175 Application/Control Number: 18/393,549 Page 7 Art Unit: 2175