DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Applicant’s Submission of a Response
Applicant’s submission of a response on 12/12/2025 has been received and considered. In the response, Applicant amended claims 1 – 5 and 7 – 20. Therefore, claims 1 – 20 are pending.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 3, 5 – 10, 12 – 13, 15 – 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Abali et al. (US Pub. No. 2009/0287901 A1).
As per claim 1, Abali et al. discloses a processor comprising: memory management circuitry configured to: allocate a first memory block for a data block (allocation of physical memory blocks for real memory block addresses via a translation table, see [0020] – [0024]); and replace data that associates the data block with the first memory block with data that associates the data block with a shared memory block, responsive to a determination that content of the data block is duplicative of data stored by the shared memory block (when a hash value calculated from a memory block’s content matches an existing book, all references to the real memory block are remapped to a single shared physical block storing the identical content, thereby replacing the original association, see [0020] – [0026]).
As per claim 2, Abali et al. discloses the first memory block comprises a dedicated memory block allocated responsive to the data block being marked as sharable between two or more instances of an application (see Fig. 2:40, [0030], [0035]).
As per claim 3, Abali et al. discloses replacing the data that associates the data block with the first memory block comprises replacing a memory address of the first memory block with a memory address of the shared memory block in a data structure (a translation/indirection table that maps real memory block addresses to physical memory block addresses, upon detecting a duplicate, the translation table entry for the real block is updated to a point to shared physical book’s address, therefore replacing the address in the data structure, [0040] – [0044]).
As per claim 5, Abali et al. discloses the memory management circuitry is further configured to: generate a content identifier for the data block based at least in part on content of the data block (calculating a hash value based on the content of the memory block, see [0021]); responsive to no shared memory blocks being associated with the content identifier, assign the content identifier to a selected shared memory block (when no existing physical book is associated with the computed hash value, the system assigns the hash/content identifier to a physical block and stores the block’s data, see [0024], [0040] and [0046]); and copy the content of the data block from the first memory block to the selected shared memory block (copying content to the designated physical block upon first assignment, Fig. 2:40 and [0029], [0038]).
As per claim 6, Abali et al. discloses the memory management circuitry is further configured to update a reference count associated with the shared memory block at least based in part on a number of distinct application instances sharing the data block (maintaining a reference count for each physical block in the indirection table, incrementing the count whenever a new duplicate is detected, reflecting the number of real memory references pointing to that shared physical block, see [0040]).
As per claim 7, Abali et al. discloses the memory management circuitry is configured to generate a content identifier for the data block, based at least in part on the content of the data block (hash computation from memory block content as the basis for the content identifier, see [0021] – [0028] and [0037] – [0038]).
As per claim 8, Abali et al. discloses a method comprising: allocating, by circuitry, a first memory block for a data block (allocation of physical memory blocks for real memory block addresses via a translation table, see [0020] – [0024]); and replacing data that associates the data block with the first memory block with data that associates the data block with a shared memory block, responsive to a determination that content of the data block is duplicative of data stored by the shared memory block (when a hash value calculated from a memory block’s content matches an existing book, all references to the real memory block are remapped to a single shared physical block storing the identical content, thereby replacing the original association, see [0020] – [0026]).
As per claim 9, Abali et al. discloses the first memory block comprises a dedicated memory block allocated responsive to the data block being marked as sharable between two or more distinct instances of an application executing concurrently (see Fig. 2:40, [0030], [0035]).
As per claim 10, Abali et al. discloses replacing the data that associates the data block with the first memory block comprises replacing a memory address of the first memory block with a memory address of the shared memory block in a data structure (a translation/indirection table that maps real memory block addresses to physical memory block addresses, upon detecting a duplicate, the translation table entry for the real block is updated to a point to shared physical book’s address, therefore replacing the address in the data structure, [0040] – [0044]).
As per claim 12, Abali et al. discloses generating a content identifier for the data block based at least in part on content of the data block (calculating a hash value based on the content of the memory block, see [0021]); responsive to no shared memory blocks being associated with the content identifier, assigning, by the circuitry, the content identifier to a selected shared memory block (when no existing physical book is associated with the computed hash value, the system assigns the hash/content identifier to a physical block and stores the block’s data, see [0024], [0040] and [0046]); and copying, by the circuitry, the content of the data block from the first memory block to the selected shared memory block (copying content to the designated physical block upon first assignment, Fig. 2:40 and [0029], [0038]).
As per claim 13, Abali et al. discloses the content identifier comprises a hash (the content identifier is a hash value, see [0028]).
As per claim 15, Abali et al. discloses a system comprising: at least one processing circuitry (see [0038]) and memory management circuitry configured to: allocate a first memory block for a data block (allocation of physical memory blocks for real memory block addresses via a translation table, see [0020] – [0024]); and replace data that associates the data block with the first memory block with data that associates the data block with a shared memory block, responsive to a determination that content of the data block is duplicative of data stored by the shared memory block (when a hash value calculated from a memory block’s content matches an existing book, all references to the real memory block are remapped to a single shared physical block storing the identical content, thereby replacing the original association, see [0020] – [0026]).
As per claim 16, Abali et al. discloses replacing the data that associates the data block with the first memory block comprises updating an entry in a data structure to store a memory address of the shared memory block in place of a memory address of the first memory block (a translation/indirection table that maps real memory block addresses to physical memory block addresses, upon detecting a duplicate, the translation table entry for the real block is updated to a point to shared physical book’s address, therefore replacing the address in the data structure, [0040] – [0044]).
As per claim 17, Abali et al. discloses the determination that the content is duplicative comprises comparing a content identifier generated for the data block with content identifiers associated with shared memory blocks (see [0040] – [0045]).
As per claim 18, Abali et al. discloses the memory management circuitry is further configured to copy the content of the data block from the original memory block to a selected shared memory block (copying content to the designated physical block upon first assignment, Fig. 2:40 and [0029], [0038]).
As per claim 19, Abali et al. discloses the memory management circuitry is further configured to update a reference count associated with the shared memory block based in part on a number of distinct application instances sharing the data block (maintaining a reference count for each physical block in the indirection table, incrementing the count whenever a new duplicate is detected, reflecting the number of real memory references pointing to that shared physical block, see [0040]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Abali et al. (US Pub. No. 2009/0287901 A1) as applied to claims 1 and 8 above, further in view of Fries et al. (US Patent No. 9,299,126).
As per claim 4, Abali et al. does not expressly disclose the data block at least in part comprises image data, and wherein the memory management circuitry is configured to mark the image data as sharable between two or more distinct instances of an application, based at least in part on a content identifier associated with the image data one or more properties associated with the image data.
Abali et al. teaches memory management circuitry that allocates memory blocks for data blocks, generates content identifiers (hash value) from data block content, and duplicates by replacing associations with a shared memory block.
Fries et al. teaches image processing apparatus of storing encoded data blocks generated by such an image processing apparatus, wherein the image processing apparatus comprising identifier generation circuitry that generates an identifier value dependent on the content of an input data block of image data; a lookup storage that stores information relating to encoded data blocks associated with the identifier value; and a check to determine whether a match exists between the identifier value for a current image data block and stored identifier values, see Col. 1, line 46 – Col.2, line 2).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have implemented the image data specific content identifier-based marking technique of Fries et al. to the content replication detection system of Abali et al. in order to allow the system to identifying any duplications of image data which would reduce memory consumption for duplicate image-heavy data.
As per claim 11, Abali et al. does not expressly disclose the data block at least in part comprises image data, and wherein the method further comprising marking, by the circuitry, the image data as sharable between two or more distinct instances of an application, based at least in part on a content identifier associated with the image data one or more properties associated with the image data.
Abali et al. teaches memory management circuitry that allocates memory blocks for data blocks, generates content identifiers (hash value) from data block content, and duplicates by replacing associations with a shared memory block.
Fries et al. teaches image processing apparatus of storing encoded data blocks generated by such an image processing apparatus, wherein the image processing apparatus comprising identifier generation circuitry that generates an identifier value dependent on the content of an input data block of image data; a lookup storage that stores information relating to encoded data blocks associated with the identifier value; and a check to determine whether a match exists between the identifier value for a current image data block and stored identifier values, see Col. 1, line 46 – Col.2, line 2).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have implemented the image data specific content identifier-based marking technique of Fries et al. to the content replication detection system of Abali et al. in order to allow the system to identifying any duplications of image data which would reduce memory consumption for duplicate image-heavy data.
Claims 14 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Abali et al. (US Pub. No. 2009/0287901 A1) as applied to claims 8 and 15 above, and further in view of Oltean et al. (US Patent No. 8,380,681).
As per claim 14, Abali et al. does not expressly disclose tracking, by the circuitry, usage of the data block in a processing pipeline; and generating, by the circuitry, a content identifier based at least in part on tracked usage and the content of the data block.
Oltean et al. teaches an extensible pipeline for data deduplication, wherein a modular, extensible pipeline for data deduplication in which data block (chunk) usage is explicitly tracked across pipeline stages and that tracked usage informs downstream processing, including content identifier generation. A multi-stage processing pipeline comprising a scanning phase, a selection phase, a chunking phase, a hashing phase, a compression phase, and a commit phase (see Fig. 1 and Col. 3, line 59 – Col. 4, line 64). The pipeline tracks data block usage across these stages: each chunk processed through the pipeline carries associated metadata, including a rolling hash computed during chunking, compression-level indicators, file attributes, chunk size, and other properties generated and accumulated by each preceding stage — that is passed forward to subsequent stages as "chunk records" (see Col. 10, line 66 – Col. 11, line 6).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have modified the content replication detection system of Abali et al. with pipeline stage usage tracking in view of Oltean as it would yield the predictable benefit of more adaptive and accurate content identifier generation.
As per claim 20, Abali et al. does not expressly disclose the memory management circuitry is configured to: track usage of the data block in a processing pipeline; and generate the content identifier based at least in part on the tracked usage.
Oltean et al. teaches an extensible pipeline for data deduplication, wherein a modular, extensible pipeline for data deduplication in which data block (chunk) usage is explicitly tracked across pipeline stages and that tracked usage informs downstream processing, including content identifier generation. A multi-stage processing pipeline comprising a scanning phase, a selection phase, a chunking phase, a hashing phase, a compression phase, and a commit phase (see Fig. 1 and Col. 3, line 59 – Col. 4, line 64). The pipeline tracks data block usage across these stages: each chunk processed through the pipeline carries associated metadata, including a rolling hash computed during chunking, compression-level indicators, file attributes, chunk size, and other properties generated and accumulated by each preceding stage — that is passed forward to subsequent stages as "chunk records" (see Col. 10, line 66 – Col. 11, line 6).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have modified the content replication detection system of Abali et al. with pipeline stage usage tracking in view of Oltean as it would yield the predictable benefit of more adaptive and accurate content identifier generation.
Response to Arguments
Applicant’s arguments with respect to claims 1 – 20 have been considered but are moot because the arguments do not apply to all of the references being used in the current rejection.
Applicant's arguments directed to Schluessler et al. have been addressed as part of the rejection of the claims. Examiner directs Applicant to the teachings of Abali et al., Fries et al. and Oltean et al.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANKIT B DOSHI whose telephone number is (571)270-7863. The examiner can normally be reached Mon - Fri. ~8:30 - ~5:30.
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/ANKIT B DOSHI/Examiner, Art Unit 3715
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