Prosecution Insights
Last updated: April 19, 2026
Application No. 18/394,032

MULTILAYER ELECTRONIC COMPONENT

Non-Final OA §103
Filed
Dec 22, 2023
Examiner
SINCLAIR, DAVID M
Art Unit
2848
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electro-Mechanics Co., Ltd.
OA Round
1 (Non-Final)
68%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
87%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allow Rate
833 granted / 1232 resolved
At TC average
Strong +20% interview lift
Without
With
+19.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
42 currently pending
Career history
1274
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
49.6%
+9.6% vs TC avg
§102
30.0%
-10.0% vs TC avg
§112
12.8%
-27.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1232 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Email Communication Applicant is encouraged to authorize the Examiner to communicate with applicant via email by filing form PTO/SB/439 either via USPS, Central Fax, or EFS-Web. See MPEP 502.01, 502.03, 502.05. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 27-30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Suzuki et al. (US 2016/0276102) in view of Sugimoto et al. (US 2004/0233612) and JP2006041268A hereafter referred to as Masutomi. In regards to claim 27, Suzuki ‘102 discloses a multilayer electronic component comprising: a body (5 – fig. 1; [0035]) including a plurality of dielectric layers (2 – fig. 1; [0035]) and a plurality of internal electrodes (3-4 – fig. 1; [0035]) alternately disposed with the plurality of dielectric layers in a first direction; and an external electrode (6 or 7 – fig. 1; [0036]) disposed on the body, wherein one of the plurality of internal electrodes includes Ni and In ([0039]) a content of In with respect to a content of Ni in a first region of the one of the plurality of internal electrodes is greater than a content of In with respect to a content of Ni in a central region of the one of the plurality of internal electrodes in the first direction, the first region being disposed between the central region of the one of the plurality of internal electrodes and an interface between the one of the plurality of internal electrodes and one of the plurality of dielectric layers ([0010]), the body has a first surface and a second surface opposing in the first direction, a third surface and a fourth surface connected to the first and second surfaces and opposing in a second direction, and a fifth surface and a sixth surface connected to the first to fourth surfaces and opposing in a third direction, the body includes a capacitance forming portion including the plurality of internal electrodes, and a cover portion disposed on both end surfaces of the capacitance forming portion in the first direction, and margin portions disposed on both end surfaces of the capacitance forming portion in the third direction (seen in fig. 1-2), and in which Gc is an average grain size of dielectric crystal grains included in the cover portion, Ga is an average grain size of dielectric crystal grains included in the dielectric layer of the capacitance forming portion, and Gm is an average grain size of dielectric crystal grains included in the margin portion ([0044-0045] – ceramic layers will have grain sizes). Suzuki ‘102 fails to disclose 1<Gc/Ga and 1<Gm/Ga are satisfied. Sugimoto ‘612 discloses 1<Gc/Ga is satisfied ([0024] & table 1). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the capacitor of Suzuki ‘102 such that 1<Gc/Ga is satisfied as taught by Sugimoto ‘612 to obtain a capacitor with improved delamination and crack characteristics. Masutomi discloses 1<Gm/Ga is satisfied (fig. 4; table 1). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to form the capacitor of Suzuki ‘102 such that 1<Gm/Ga is satisfied as taught by Masutomi to obtain a capacitor with improved delamination, temperature, and crack characteristics. In regards to claim 28, Suzuki ‘102 as modified by Sugimoto ‘612 and Masutomi further discloses wherein the Ga and Gc satisfy 1<Gc/Ga≤1.28 (table 1 of Sugimoto ‘612). In regards to claim 29, Suzuki ‘102 as modified by Sugimoto ‘612 and Masutomi further discloses wherein the Ga and Gm satisfy 1<Gm/Ga≤1.07 (table 1 of Masutomi). In regards to claim 30, Suzuki ‘102 as modified by Sugimoto ‘612 and Masutomi further discloses wherein the Ga, Gm, and Gc satisfy 1<Gc/Ga≤1.28 and 1<Gm/Ga≤1.07 (table 1 of Sugimoto ‘612 & table 1 of Masutomi). Allowable Subject Matter Claim(s) 1-26 is/are allowed. Claim 31 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The prior art does not teach or suggest (in combination with the other claim limitations) wherein one of the plurality of internal electrodes includes In, and in the one of the plurality of internal electrodes, among points 10 nm away from an interface with one of the plurality of dielectric layers, a ratio of points at which a molar ratio of In/(Ni+In) is 0.002 or more is 70% or more, and among central points in the first direction, a ratio of points at which the molar ratio of In/(Ni+In) is 0.002 or more is 35% or less (claims 1-15), in the one of the plurality of internal electrodes, an average value of a molar ratio of In/(Ni+In) at points 2 nm away from an interface with one of the plurality of dielectric layers is X, an average value of a molar ratio of In/(Ni+In) in regions 10 nm apart from the interface with the one of the plurality of dielectric layers is Y, and X-Y is greater than or equal to 0.0041 (claims 16-20), in the one of the plurality of internal electrodes, a ratio of points at which a molar ratio of In/(Ni+In) is 0.002 or more among points 10 nm away from an interface with one of the plurality of dielectric layers is 50% or more, as compared to a ratio of points at which the molar ratio of In/(Ni+In) is 0.002 or more among central points in the first direction (claims 21-26), and wherein the one of the plurality of internal electrodes includes ceramic particles, and the ceramic particles include In (claim 31). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2022/0165502 – table 4 US 2021/0202177 – abstract US 2018/0240592 – fig.4 & 6A US 2011/0141655 – fig. 2 US 2016/0155571 – abstract Communication Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID M SINCLAIR whose telephone number is (571)270-5068. The examiner can normally be reached M-TH from 8AM-4PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /David M Sinclair/Primary Examiner, Art Unit 2848
Read full office action

Prosecution Timeline

Dec 22, 2023
Application Filed
Feb 06, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603231
ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME
2y 5m to grant Granted Apr 14, 2026
Patent 12597559
MULTILAYER CERAMIC CAPACITOR AND METHOD OF PREPARING THE SAME
2y 5m to grant Granted Apr 07, 2026
Patent 12597563
CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
2y 5m to grant Granted Apr 07, 2026
Patent 12592342
MULTILAYER ELECTRONIC COMPONENT
2y 5m to grant Granted Mar 31, 2026
Patent 12586716
MULTILAYER CERAMIC CAPACITOR INCLUDING INTERNAL ELECTRODE LAYERS WITH VARYING COVERAGES
2y 5m to grant Granted Mar 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
68%
Grant Probability
87%
With Interview (+19.6%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 1232 resolved cases by this examiner. Grant probability derived from career allow rate.

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