Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The corrections made to the drawings in the response filed on July 10, 2026 are accepted by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 17 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 17 recites the limitation “wherein the boiling enhancing layer is provided on an outer surface of the heat pipe,” on page 7 line 11. The examiner notes that the boiling enhancing layer refer to a boiling enhancing layer introduced in independent claim 15 from which claim 17 depends. The examiner next notes that claim 15 has been amended to recite the boiling enhancing layer is a portion of the chamber body or attached the chamber body by a solder layer. The examiner now notes that “wherein the boiling enhancing layer is provided on an outer surface of the heat pipe,” renders claim 17 indefinite because it is unclear how a boiling enhancing layer that is a portion of the chamber body or attached to the chamber body by a solder layer is provided on an outer surface of the heat pipe. For examination purposes, this limitation will be treated as wherein a second boiling enhancing layer is provided on an outer surface of the heat pipe and having a same structure as the boiling enhancing layer.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 15 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lin et al. (US 2024/0274504).
Regarding Claim 15:
Lin discloses a semiconductor package comprising:
a package substrate (package substrate, See fig. 1A, ref. no. 110 and paragraphs 37-38);
a semiconductor device (second semiconductor die, See fig. 1A, ref. no. 124 and paragraph 52) mounted on the package substrate; and
a heat dissipation structure (package lid, See fig. 1A, ref. no. 180 and paragraph 37) attached onto the semiconductor device,
wherein the heat dissipation structure comprises
a vapor chamber (vapor chamber base, See fig. 1A, ref. no. 130 and paragraphs 62-63) on the semiconductor device, wherein the vapor chamber comprises chamber body (structure of the vapor chamber base surrounding the vapor chamber space, See fig. 1A, ref. no. 130 and paragraph 62) configured to provide an internal space (vapor chamber space, See fig. 1A, ref. no. 130b and paragraph 62), and
a boiling enhancing layer (enhancement surface, See figs. 1A, 1C, ref. no. 170 and paragraphs 78-79) and comprising at least one of a porous structure or a structure having an uneven surface (roughened surface on the outer wall of the vapor chamber enclosure, See paragraph 79), wherein the boiling enhancing layer is:
a portion of the chamber body (roughened surface on the outer wall of the vapor chamber enclosure is a portion of the chamber body because the outer wall of the vapor chamber enclosure is part of the vapor chamber base, See fig. 1a, ref. no. 130c, 170, and paragraph 62) or
attached to the chamber body by a solder layer.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-7, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Cherian (US 2013/0199770) in view of Hsu et al. (US 2005/0173096).
Regarding Claim 1:
Cherian discloses a semiconductor package comprising:
a package substrate (PCB, See fig. 75, ref. no. PCB)
a semiconductor device (chip in a chip carrier mounted on PCB, See fig. 75 and paragraph 391) mounted on the package substrate; and
a heat dissipation structure (heat pipes and vertically stacked vapor chambers attached to the cover of the chip carrier, See fig. 75, ref. no. VC, paragraphs 391 and 393-394) attached to the semiconductor device, wherein the heat dissipation structure comprises
a plurality of vapor chambers (three vertically stacked vapor chambers, See fig. 75, ref. no. VC, paragraphs 391 and 393-394) at different levels in a vertical direction, and
a plurality of heat pipes (the heat pipes between the vapor chambers, See fig. 75, paragraphs 391, and 393-394) between the plurality of vapor chambers,
wherein each vapor chamber of the plurality of vapor chambers comprises a chamber body (structure of the vaper chamber surrounding the interior chamber, See figs. 75, 77-A, ref. no. VC) configured to provide an internal space for flow of a first working fluid (the interior chamber is an enclosed space, See figs. 75, 77-A, ref. no. VC),
wherein the internal space of each vapor chamber is fluidically isolated from the internal space of each heat pipe (the interior chamber is fluidically isolated from the heat pipes joined to the vapor chamber because the interior chamber is an enclosed space, See fig. 75, ref. no. VC), and
wherein the plurality of heat pipes comprise heat pipes in contact with two vapor chambers of the plurality of vapor chamber (the heat pipes between the bottom vapor chamber and the middle vapor chamber are in contact with the bottom vapor chamber and the middle vapor chamber, See fig. 75 and paragraphs 393-394).
Cherian does not disclose wherein each heat pipe of the plurality of heat pipes comprises a pipe body configured to provide an internal space for flow of a second working fluid.
Hsu discloses a heat exchanger pipe comprising a pipe body (structure of the heat exchanger pipe and porous ceramic tube surrounding the vacuum space, See fig. 7, ref. no. 8, 82, 800 and paragraph 27) configured to provide an internal space for flow of a second working fluid (the vacuum space is an enclosed space, See fig. 7, ref. no. 800).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor package of Cherian to replace the heat pipes with heat exchange pipes as taught by Hsu in order to provide a higher heat dissipating efficiency. (See Hsu paragraph 29).
Regarding Claim 2:
Cherian discloses a first thermally conductive adhesive layer (solder between the heat pipes below the bottom vapor chamber and the bottom vapor chamber, See figs. 75, 77-A, and paragraphs 393-394) between a lowermost vapor chamber of the plurality of vapor chambers and the semiconductor device.
Regarding Claim 4:
Cherian discloses wherein the plurality of vapor chambers comprise three vapor chambers stacked in the vertical direction (three vertically stacked vapor chambers, See fig. 75, ref. no. VC, paragraphs 391 and 393-394), and wherein two vapor chambers neighboring one another in the vertical direction of the three vapor chambers are connected to one another through corresponding heat pipes of the plurality of heat pipes (the three vertically stacked vapor chambers are connected to one another through corresponding heat pipes, See fig. 75, paragraphs 391 and 393-394).
Regarding Claims 5-6:
Cherian discloses wherein each of the plurality of vapor chambers is coupled to corresponding heat pipes among the plurality of heat pipes by solder (the heat pipes are joined to the vapor chambers using solder, See fig. 77-A and paragraphs 393-394).
Regarding Claim 7:
Cherian discloses wherein the chamber body of each vapor chamber has a mounting groove (pocket to accept heat pipe, See fig. 77-A, ref. no. VC and paragraph 393) into which a corresponding heat pipe of the plurality of heat pipes is inserted.
Regarding Claim 20:
Cherian discloses a heat dissipation structure comprising:
a plurality of vapor chambers (three vertically stacked vapor chambers, See fig. 75, ref. nos. VC and paragraphs 391, 393-394) at different levels in a vertical direction; and
a plurality of heat pipes (heat pipes between the vapor chambers, See fig. 75, paragraphs 391 and 393-394) between the plurality of vapor chambers,
wherein each vapor chamber of the plurality of vapor chambers comprises a chamber body (structure of the vaper chamber surrounding the interior chamber, See figs. 75, 77-A, ref. no. VC) configured to provide an internal space for flow of a first working fluid (the interior chamber is an enclosed space, See figs. 75, 77-A, ref. no. VC),
wherein the internal space of each vapor chamber is fluidically isolated from the internal space of each heat pipe (the interior chamber is fluidically isolated from the heat pipes joined to the vapor chamber because the interior chamber is an enclosed space, See fig. 75, ref. no. VC), and
wherein the plurality of heat pipes comprise heat pipes in contact with two vapor chambers of the plurality of vapor chamber (the heat pipes between the bottom vapor chamber and the middle vapor chamber are in contact with the bottom vapor chamber and the middle vapor chamber, See fig. 75 and paragraphs 393-394).
Cherian does not disclose wherein each heat pipe of the plurality of heat pipes comprises a pipe body configured to provide an internal space for flow of a second working fluid.
Hsu discloses a heat exchanger pipe comprising a pipe body (structure of the heat exchanger pipe and porous ceramic tube surrounding the vacuum space, See fig. 7, ref. no. 8, 82, 800 and paragraph 27) configured to provide an internal space for flow of a second working fluid (the vacuum space is an enclosed space, See fig. 7, ref. no. 800).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the heat dissipation structure of Cherian to replace the heat pipes with heat exchange pipes as taught by Hsu in order to provide a higher heat dissipating efficiency. (See Hsu paragraph 29).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Cherian (US 2013/0199770) and Hsu et al. (US 2005/0173096) in view of Lan (US 2017/0343296).
Regarding Claim 3:
The above stated combination of Cherian and Hsu discloses the above stated semiconductor package.
The above stated combination of Cherian and Hsu does not disclose wherein lengths of the plurality of vapor chambers in a horizontal direction are different from each other.
Lan discloses wherein lengths of the plurality of vapor chambers (a first flat shell body defining a first chamber has a length greater than a second flat shell body defining a second chamber, See fig. 1A, ref. nos. 11, 12, and paragraphs 45-47) in a horizontal direction are different from each other.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor package of Cherian and Hsu to increase the lengths of the vapor chambers as the vapor chambers ascend in the vertical direction as taught by Lan in order to increase heat dissipation area.
11. Claims 9 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Cherian (US 2013/0199770) and Hsu et al. (US 2005/0173096) in view of Lin et al. (US 2024/0274504).
Regarding Claim 9:
The above stated combination of Cherian and Hsu discloses the above stated heat dissipation structure.
The above stated combination of Cherian and Hsu does not disclose wherein the heat dissipation structure comprises a porous structure extending along outer surfaces of the plurality of vapor chambers.
Lin discloses a porous structure extending along outer surface of a vapor chamber (enhancement layer including a porous surface on an outer wall of a vapor chamber enclosure, See fig. 1A, 1C, ref. nos. 130a, 170, and paragraphs 78-79).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor package of Cherian and Hsu to include enhancement layers including a porous surface on outer walls of each of the vapor chambers such as that taught by Lin in order to enhance heat spreading. (See Lin paragraph 34.)
Regarding Claim 22:
The above stated combination of Cherian and Hsu discloses the above stated heat dissipation structure.
The above stated combination of Cherian and Hsu does not disclose wherein each vapor chamber of the plurality of vapor chambers comprises a first wick structure extending along an inner wall surface of the chamber body of the vapor chamber.
Lin discloses a vapor chamber (vapor chamber base, See fig. 1A, ref. no. 130, and paragraph 62) comprises a first wick structure (vapor chamber wick structure, See fig. 1A, ref. no. 130c and paragraph 62) extending along an inner wall surface of the chamber body of the vapor chamber (the vapor chamber wick structure extends along the inner walls of the vapor chamber, See fig. 1A, ref. no. 130c).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify heat dissipation structure of Cherian and Hsu to include each vapor chamber of the plurality of vapor chambers comprises a first wick structure extending along an inner wall surface of the chamber body of the vapor chamber as taught by Lin in order increase transfer of heat through the heat dissipation structure.
12. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Cherian (US 2013/0199770) and Hsu et al. (US 2005/0173096) in view of Joshi et al. (US 11,415,370).
Regarding Claim 10:
The above stated combination of Cherian and Hsu discloses the above stated semiconductor package.
The above stated combination of Cherian and Hsu does not disclose wherein the heat dissipation structure comprises a plurality of protruding patterns provided on outer surfaces of the plurality of vapor chambers.
Joshi discloses an expandable vapor chamber having a heat plate comprising a plurality of fins on a curved outer surface of the expandable vapor chamber (See fig. 5B, ref. no. 201, 282, and col. 9 lines 12-34).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor package of Cherian and Hsu to include a plurality of fins on an outer surface of each of the vapor chambers such as that taught by Joshi in order to enhance heat dissipation.
13. Claims 15-16 and 28 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2024/0274504) in view of Chen (CN 111273750 A). The examiner notes that the citations to paragraphs of Chen refer to paragraphs in the attached English language translation.
Regarding Claim 15:
Lin discloses a semiconductor package comprising:
a package substrate (package substrate, See fig. 1A, ref. no. 110 and paragraphs 37-38);
a semiconductor device (second semiconductor die, See fig. 1A, ref. no. 124 and paragraph 52) mounted on the package substrate; and
a heat dissipation structure (package lid, See fig. 1A, ref. no. 180 and paragraph 37) attached onto the semiconductor device,
wherein the heat dissipation structure comprises
a vapor chamber (vapor chamber base, See fig. 1A, ref. no. 130 and paragraphs 62-63) on the semiconductor device, wherein the vapor chamber comprises chamber body (structure of the vapor chamber base surrounding the vapor chamber space, See fig. 1A, ref. no. 130 and paragraph 62) configured to provide an internal space (vapor chamber space, See fig. 1A, ref. no. 130b and paragraph 62), and
a boiling enhancing layer (enhancement surface, See figs. 1A, 1C, ref. no. 170 and paragraphs 78-79) and comprising at least one of a porous structure (the enhancement surface is same material as the vapor chamber wick structure, See paragraph 80) or a structure having an uneven surface.
Lin does not disclose wherein the boiling enhancing layer is:
a portion of the chamber body or
attached to the chamber body by a solder layer.
Chen discloses a copper capillary structure element for a heat pipe that is attached to a solderable surface by solder material (See fig. 1, ref. nos. 1, 12, 14, 121, paragraphs 7 and 36-37).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor package of Lin to include the copper capillary structure element of Chen for more convenient manufacture of the semiconductor package. (See Chen paragraph 7).
Regarding Claim 16:
The above stated combination of Lin and Chen discloses the boiling enhancing layer is attached to the chamber body by the solder layer (the copper capillary structure element for a heat pipe that is attached to a solderable surface by solder material, See fig. 1, ref. nos. 1, 12, 14, 121, paragraphs 7 and 36-37).
Regarding Claim 28:
The above stated combination of Lin and Chen discloses wherein the boiling enhancing layer comprises a metal oxide layer (a copper oxide layer of a copper powder particle, See Lin fig. 2A, ref. nos. 14, 142 and paragraph 37).
14. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US 2024/0274504) and Chen (CN 111273750 A) in view of Cherian (US 2013/0199770) further in view of Hsu et al. (US 2005/0173096).
Regarding Claim 17:
The above stated combination of Lin and Chen discloses the above stated semiconductor package. Chen further discloses wherein the internal space of the vapor chamber comprises a first internal space for flow of a first working fluid (the vapor chamber space is an enclosed space, See fig. 1A, ref. no. 130b and paragraph 62) and wherein the first internal space of the vapor chamber is fluidically isolated from the second internal space of the heat pipe (vapor chamber space is fluidically isolated from the heat pipe on to the vapor chamber base because the vapor chamber space is an enclosed space, See fig. 1A, ref. no. 130b and paragraph 62).
The above stated combination of Lin and Chen does not disclose an upper vapor chamber on the vapor chamber, a heat pipe between the vapor chamber and the upper vapor chamber, wherein the boiling enhancing layer is provided on an outer surface of the heat pipe, and wherein the heat pipe comprises a pipe body comprises a pipe body configured to provide a second internal space for flow of a second working fluid.
Cherian discloses an upper vapor chamber (middle vapor chamber of the vertically stacked vapor chamber, See fig. 75, ref. no. VC, paragraphs 391 and 393-394) on the vapor chamber and a heat pipe (heat pipe between the bottom vapor chamber and the middle vapor chamber, See figs. 75, 77-A paragraphs 391 and 393-394) between the vapor chamber and the upper vapor chamber.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor package of Lin and Chen to include an upper vapor chamber on the vapor chamber and a heat pipe between the vapor chamber and the upper vapor chamber as taught by Cherian in order to provide heat dissipation at a remote distance.
The above stated combination of Lin, Chen, and Cherian does not disclose wherein the boiling enhancing layer is provided on an outer surface of the heat pipe, and wherein the heat pipe comprises a pipe body comprises a pipe body configured to provide a second internal space for flow of a second working fluid.
Hsu discloses a heat exchanger pipe comprising a pipe body (structure of the heat exchanger pipe and porous ceramic tube surrounding the vacuum space, See fig. 7, ref. no. 8, 82, 800 and paragraph 27) configured to provide an internal space for flow of a second working fluid (the vacuum space is an enclosed space, See fig. 7, ref. no. 800).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lin, Chen, and Cherian to replace the heat pipes with heat exchange pipes as taught by Hsu in order to provide a higher heat dissipating efficiency. (See Hsu paragraph 29).
The above stated combination of Lin, Chen, and Cherian does not disclose wherein the boiling enhancing layer is provided on an outer surface of the heat pipe.
Lin discloses an enhancement surface on substantially the entire surface of a structure for cooling the semiconductor dies (See fig. 1A, ref. nos. 100, 170, paragraphs 52, 78-79, 81)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor package of Lin, Chen, Cherian, and Hsu to include the boiling enhancing layer on an outer surface of the heat pipe as taught by Lin in order to enhance heat spreading. (See Lin paragraph 34.)
Response to Arguments
15. Applicant's arguments filed July 10, 2026 have been fully considered but they are not persuasive. The applicant’s arguments, with respect to the references of record not disclosing or rendering obvious independent claim 1 as amended, fail to comply with 37 CFR 1.111(b) because they amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references. The examiner also notes that the grounds of rejection in this Office action in this Office action do not rely on Lan ‘489 and Refai-Ahmed.
16. The applicant’s arguments that Cherian does not describe each heat pipe of the plurality of heat pipes comprises a pipe body configured to provide an internal space for flow of a second working fluid is not persuasive because Cherian is not being relied on to teach this limitation.
17. The applicant’s arguments that Lin does not disclose the boiling enhancing layer is: a portion of the chamber body or attached to the chamber body by a solder layer is not persuasive because Lin discloses the boiling enhancing layer is: a portion of the chamber body. The examiner first notes that this claim limitation recites two claim limitations in the alternative and thus a reference that meets either alternative will meet this claim limitation. The examiner now notes that, as discussed above, Lin discloses the boiling enhancing layer is: a portion of the chamber body, and thus, Lin meets this claim limitation.
Conclusion
18. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/CALEEN O SULLIVAN/Primary Examiner, Art Unit 2899
/B.S./Examiner, Art Unit 2899
