DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Newly submitted claims 39-50 are directed to an invention that is independent or distinct from the invention originally claimed for the following reasons: The applicant originally elected a physical apparatus claim on 10/2/2024. The applicant has received multiple actions on the merits for the originally presented invention. New claims 39-50 claim a method and software for using the circuitry of an apparatus. The new claims would be restrictable from the original claims as being product and the new claims as being a process of using the product (see MPEP 806.05(h)). Previously examined claims 1 and 4-8 are drawn to a product in the form of an apparatus comprising an I/O interface and circuitry configured to update a register and provide updated information stored in a register to a processor though the I/O interface whereas claims 39 and 45 cover a method and instructions for using such an apparatus. In this case the scope of the process claimed in claims 39 and 45 could be implemented by any circuitry and I/O interface and there is nothing that limits them to the apparatus with the I/O interface and circuitry claimed in claim 1. The product of claim 1 could be used to implement any operations for managing the passage of data between elements of the apparatus and is not limited to the process claimed in claims 39-50. The Examiner notes that the applicant claims the purpose of the “update information” in claim 1 but this does not limit the structure of the circuitry in claim 1 because the purpose of the update information would not change how information is stored in in a register or how information is provided to a processor. Section 2114(II) of the MPEP explains that “Apparatus claims cover what a device is, not what a device does”. Claims 39-50 are covering what a device does, not what the device is.
Since applicant has received an action on the merits for the originally presented invention, this invention has been constructively elected by original presentation for prosecution on the merits. Accordingly, claims 39-50 are withdrawn from consideration as being directed to a non-elected invention. See 37 CFR 1.142(b) and MPEP § 821.03.
To preserve a right to petition, the reply to this action must distinctly and specifically point out supposed errors in the restriction requirement. Otherwise, the election shall be treated as a final election without traverse. Traversal must be timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are subsequently added, applicant must indicate which of the subsequently added claims are readable upon the elected invention.
Should applicant traverse on the ground that the inventions are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing the inventions to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the inventions unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other invention.
Response to Arguments
Applicant's arguments filed 1/20/2026 have been fully considered but they are not persuasive.
Regarding the written description of the claimed circuit and how it is “configured” to carry out the invention, the applicant has not pointed to any specific description of a circuit. The applicant points to a number of references to generic concepts of circuits but no specific description of any circuitry which “ensures that the public receives something in return for the exclusionary rights that are granted to the inventor by a patent” (see MPEP section 2162). The Examiner cannot allow a patent for a circuit when the applicant has not described any specific circuit and argues that the circuit could be basically any type of generic computing solution. Regarding the written description issue #4 from the last office action, the applicant has not cited any description of circuitry for that provides information stored in a register to the processor.
The rejections based on 35 USC section 112(b) from the last office action are withdrawn in view of the amendments but the amendments introduce new clarity issues which warrant new rejections based on 35 USC section 112(b).
Regarding the rejection based on 35 USC section 102(a)(2) based on Que, the applicant’s arguments ignore the scope of the claim. The applicant is claiming that they invented circuitry that is configured to: update information stored to a register; and provide the updated information stored in the register to the processor through the I/O interface. The structure of the claimed circuitry would not change based on the purpose of the information it stores and provides so the wherein clause which states “the updated information is to identify a requested amount of cache ways of the processor’s cache” and the statement of purpose “in order to identify an updated requested amount of cache ways to the processor” do nothing to limit the claimed subject matter which is the circuitry. Therefore, the applicant’s arguments regarding Que are irrelevant to the claimed subject matter. The applicant is encouraged to read section 2114(II) to understand the scope of an apparatus claim.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1 and 4-8 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Written Description Issue #1
Claim 1 covers the following:
circuitry configured to
Claims 4 and 6 cover:
wherein the circuitry is configured to
Claim 8 covers:
the circuitry further configured to
The applicant did not describe any specific circuitry for carrying out the invention. The applicant has not provided any specific description of the circuitry that is configured for carrying out the claimed invention. The applicant is claiming the functionality in claims 1 , 4, 6, and 8 explicitly as “circuitry” and therefore it is reasonable to expect a description of novel circuitry. The applicant argued in their remarks on 7/14/2025 that cache QOS manager 222 provides support for the claimed “circuitry”. The applicant has not provided any specific description of circuitry for implementing the cache QOS manager 222. Paragraph 49 references every conceivable generic technique for implementing circuitry but these references to generic techniques are not a description of an actual implementation of circuitry.
Written Description Issue #2
Claim 1 covers the following:
provide the updated information stored in the register to the processor through the I/O interface in order to identify an updated requested amount of cache ways to the processor.
The applicant did not disclose circuitry configured to provide the updated information stored in a register to the processor though the I/O interface. Paragraphs 48 states that register information is provided to a requesting entity but there is no suggestion that such an entity is the processor. Paragraph 58 states that it is the kernel that “reads a state of the cache QOS register on the NIC”. Figure 7 shows the register but there is no description of circuitry for providing the updated information stored in the register to a processor.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 and 4-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the updated information" in the wherein clause. There is insufficient antecedent basis for this limitation in the claim. Claim 1 recites circuitry that is “configured to update information” but not any specific “updated information”.
Claim 1 recites the limitation "the updated information" in the “provide” limitation of the circuitry’s configuration. There is insufficient antecedent basis for this limitation in the claim. Claim 1 recites circuitry that is “configured to update information” but not any specific “updated information”.
Claims 4 and 6 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are: Claim 1 covers an apparatus comprising an I/O interface and circuitry configured to “update information stored in a register” and “provide the updated information stored in the register to the processor through the I/O interface”. It is unclear how the purpose of the circuitry recited in claims 4 and 6 would change the scope of the “circuitry” recited in claim 1 and how it is “configured” to “update information stored to the register” in any way that is different in claims 4 and 6 from what is recited in claim 1. Storage functions of circuits would be the same regardless of the type of data stored so it is unclear how claims 4 and 6 would limit the structure of the circuitry in any way different than claim 1.
Claims 5 and 7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are: It is not clear how the NIC (claim 5) and PCIe (claim 7) are related to the apparatus, that is the subject of the claims. The limitations specify that the “circuitry is included in” these elements but it is unclear what their relationship is to the apparatus of the claim. For example, is the apparatus part of the NIC or PCIe, are the NIC or PCIe part of the apparatus, or is there some relationship where the NIC/PCIe and apparatus both include the circuitry yet also include mutually exclusive elements that are unique to each entity? The claims do not provide clarity to answer such basic questions.
Claim 8 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are: Claim 8 recites that “the circuitry is further configured to: generate an interrupt”. It is not clear how “further configured” alters the “the circuitry” referred to in claim 1 because either the physical circuitry of the claim 1 already performs the functions of claim 8 or the applicant is trying to cover different circuitry that generates the interrupt. The word “further configured” makes no sense in the context of the circuitry that is part of the claimed apparatus.
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claims 4-7 are rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. Claims 4 and 6 cover “the circuitry is configured to update information stored in the register” which is already recited in claim 1. The purpose of the circuitry does not limit the claim as explained in section 2114(II) of the MPEP. Claims 5 and 7 recite that the circuitry is included in either a NIC or PCIe, but neither changes the structure of the circuitry or the apparatus and thus fails to further limit the subject matter of claim 1. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by U.S. Patent Application Publication Number 2018/0300139 by Que.
The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement.
As to claim 1, Que an apparatus (ref. no. 100) comprising: an input/out (I/O) interface (processor 102 features I/O connections between elements within processor) to couple to a processor (processor core 107) having a cache (ref. no. 104, paragraph 55); and circuitry configured to: update the information stored to a register (paragraph 32), wherein the updated information is to identify a requested amount of cache ways of the processor’s cache (paragraph 32, the storage of information in the registers is not limited by any eventual purpose of the information); and provide the updated information stored in the at least one register to the processor through the I/O interface (paragraphs 36 and 55, the processor core 107 has access to the information in register 107) in order to identify the updated requested amount of cache ways to the processor (the purpose of providing the information to a processor does not limit the claimed subject matter which is the circuit configured to provide updated information to a processor).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4, 6, and 8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Number 5,261,057 to Coyle et al.
Regarding the applicant’s limitations which specify the purpose of the “updated information” and the purpose of providing information to the processor these statements of purpose are not given patentable weight based on the guidance given in section 2114(II) of the MPEP. “Apparatus claims cover what a device is, not what a device does”. The circuitry mapped as follows in Coyle is inherently (according to the standards of inherency explained in the second paragraph of 2152.02(b) of the MPEP) capable of storing any type of data for any purpose and providing any type of information for any purpose to a processor. There is nothing about the disclosed and claimed circuitry that is missing from Coyle.
As to claim 1, Coyle teaches an apparatus (information processing system 10 in Figure 1) comprising: an I/O interface (ref. nos. 34, 36, 38, or 40 in Figure 1) to couple to a processor having a cache (ref. nos. 18 or 20 in Figure 1, the examiner notes that the applicant is only reciting the purpose of the I/O interface but is not including the processor and/or cache as part of the claimed apparatus); circuitry configured (ref. no. 44 in Figure 1 and Figure 5, which is detail of ref. no. 44 as explained in col. 9, lines 22-23) to: update information stored to a register (col. 9, lines 57-58); provide the updated information stored in the register to the processor through the I/O interface (col. 9, lines 58-61).
As to claims 4 and 6, Coyle teaches circuitry configured to store information in a register, as shown in the rejection of claim 1.
As to claim 8, see col. 9, lines 58 and 59.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Number 5,261,057 to Coyle et al. in view of U.S. Patent Application Publication Number 2014/022769 by Abraham et al.
As to claims 5 and 7, Coyle teaches the subject matter of claim 1 however Coyle does not suggest that the circuitry of the apparatus is “in” either a NIC or a PCIe.
Abraham shows that circuitry can exist “in” either an NIC or PCIe (paragraph 26).
It would have been obvious to one of ordinary skill in the art at the time of the applicant’s filing to combine the teachings of Coyle regarding the existence of circuitry with the teachings of Abraham regarding including circuitry in either a NIC or PCIe because Abraham shows that these devices can have circuitry. The Examiner notes that the applicant has not claimed any particular relationship between the NIC and the PCIe so the scope of the claim is nebulous.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS B BLAIR whose telephone number is (571)272-3893. The examiner can normally be reached Monday-Friday 9am-5pm.
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/DOUGLAS B BLAIR/Primary Examiner, Art Unit 2454