DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Election/Restrictions
Applicant’s election without traverse of Species II-a in the reply filed on November 17, 2025 is acknowledged.
Claims 1 – 20 are presented.
Claims 16 – 20 are withdrawn.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 includes the limitation “second ramp signal having the second offset voltage level greater than the first slope…”. It is not clear how the slope and the offset voltage are being compared considering they are not corresponding values. For purposes of art rejection, broadest reasonable interpretation will be exercised.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 – 4, 11 – 12 and 15 are rejected under 35 U.S.C. 102(a)(1) and/or (a)(2) as being anticipated by Park (US 2023/0164460).
Regarding claim 1, Park discloses, in at least figures 1, 3, and 5 – 7, an image sensor (100/600), comprising: a pixel array (140/640) including a plurality of pixels configured to output a pixel signal (¶67); a ramp signal generator circuit (160/660) configured to generate a first ramp signal and a second ramp signal (¶80, 179), wherein a first offset voltage level of the first ramp signal rises or falls with a first slope and a second offset voltage level of a second ramp signal rises or falls with a second slope different from the first slope (fig. 7; ¶180-183: R71, R72, R71’, R72’) , wherein a starting time at which the first ramp signal rises or falls with the first slope and a starting time at which the second ramp signal rises or falls with the second slope are different (fig. 7; ¶182-183); and an analog-to-digital converter circuit (150) configured to generate an image signal based on a first comparison result obtained by comparing the pixel signal and the first ramp signal and a second comparison result obtained by comparing the pixel signal and the second ramp signal (¶184: compare pixel signal with ramp1 with 653-1, compare pixel signal with ramp2 with 653-2).
Regarding claim 2, Park discloses the limitations of claim 1. Park also teaches further comprising: a timing controller circuit configured to generate a first ramp control signal that controls the ramp signal generator circuit to generate the first ramp signal and a second ramp control signal that controls the ramp signal generator circuit to generate the second ramp signal (¶170, 179).
Regarding claim 3, Park discloses the limitations of claim 2. Park also teaches wherein the first ramp control signal includes a first ramp reset signal that controls the starting time of the first ramp signal, and the second ramp control signal includes a second ramp reset signal that controls the starting time of the second ramp signal, and the first ramp reset signal is enabled at a different time than the second ramp reset signal (fig. 7; ¶170, 179: different starting times).
Regarding claim 4, Park discloses the limitations of claim 3. Park also teaches wherein the first slope is greater than the second slope, the first ramp reset signal is enabled at a first time, and the second ramp reset signal is enabled at a second time after the first time (fig. 7; ¶180: an absolute value of the first slope s1 may be twice that of the second slope s2).
Regarding claim 11, Park discloses the limitations of claim 1. Park also teaches wherein the analog-to-digital converter circuit includes a first comparator that generates the first comparison result by comparing the pixel signal and the first ramp signal, and a second comparator that generates the second comparison result by comparing the pixel signal and the second ramp signal, and a first time at which the pixel signal and the first ramp signal have a same value is different from a second time at which the pixel signal and the second ramp signal have a same value (fig. 3; ¶118-119).
Claim 12 is rejected as applied to claim 1 above. The method steps as claimed would have been implied by the apparatus of Park.
Regarding claim 15, Park discloses the limitations of claim 12. Park also teaches wherein generating the first ramp signal includes controlling a plurality of first current sources to have the first slope based on a first ramp activation signal, and generating the second ramp signal includes controlling a plurality of second current sources to have the second slope based on a second ramp activation signal (¶80).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5 – 10 and 13 – 14 are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Akhavan (US 2023/0024282).
Regarding claim 5, Park discloses the limitations of claim 2. Park also teaches wherein the first offset voltage level is different from the second offset voltage level (fig. 7; ¶180). Park fails to explicitly disclose wherein the first ramp control signal includes a first emphasis activation signal that controls the first offset voltage level, and the second ramp control signal includes a second emphasis activation signal that controls the second offset voltage level, the ramp signal generator circuit includes a first emphasis circuit that operates based on the first emphasis activation signal, and a second emphasis circuit that operates based on the second emphasis activation signal.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Park with the teachings of Akhavan. Park discloses a ramp signal generator and having different offset levels for the ramp signals, but is silent as to the control of the offset levels. Akhavan teaches a an offset adjuster for adjusting the offset voltage of the ramp signal (¶6). One of ordinary skill in the art would have recognized that applying the known technique of using an offset adjuster, as taught by Akhavan, with the invention of Park would have yielded predictable results and resulted in an improved system with increased accuracy of an ADC.
Regarding claim 6, Park in view of Akhavan disclose the limitations of claim 5. Park also teaches wherein the first slope is greater than the second slope, and the first offset voltage level is less than the second offset voltage level (fig. 7; ¶180).
Regarding claim 7, Park in view of Akhavan disclose the limitations of claim 5. Akhavan also teaches wherein the first emphasis circuit includes a plurality of first emphasis current sources that operate in response to the first emphasis activation signal, and the second emphasis circuit includes a plurality of second emphasis current sources that operate in response to the second emphasis activation signal (¶97-98: switches can be current sources).
Regarding claim 8, Park in view of Akhavan disclose the limitations of claim 5. Park also teaches wherein the first ramp control signal includes a first ramp activation signal that controls the first slope, and the second ramp control signal includes a second ramp activation signal that controls the second slope, and the ramp signal generator circuit further includes a first ramp circuit that operates based on the first ramp activation signal, and a second ramp circuit that operates based on the second ramp activation signal (fig. 7; ¶180).
Regarding claim 9, Park in view of Akhavan disclose the limitations of claim 8. The combination also teaches wherein the first ramp circuit includes a plurality of first current sources operating in response to the first ramp activation signal, and the second ramp circuit includes a plurality of second current sources operating in response to the second ramp activation signal (Park ¶80; Akhavan ¶97-98).
Regarding claim 10, Park discloses the limitations of claim 2. Park also teaches wherein the first ramp control signal includes a first ramp reset signal that controls the starting time of the first ramp signal (fig. 7; ¶170, 179: different starting times), the second ramp control signal includes a second ramp reset signal that controls the starting time of the second ramp signal (fig. 7; ¶170, 179: different starting times), and the first ramp reset signal is enabled at a time different from that of the second ramp reset signal, and the first offset voltage level of the first ramp signal is different from the second offset voltage level of the second ramp signal (fig. 7). Park fails to explicitly disclose a first emphasis activation signal that controls the first offset voltage level of the first ramp signal, and a second emphasis activation signal that controls the second offset voltage level of the second ramp signal, the ramp signal generator circuit includes a first emphasis circuit that operates based on the first emphasis activation signal, and a second emphasis circuit that operates based on the second emphasis activation signal.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Park with the teachings of Akhavan. Park discloses a ramp signal generator and having different offset levels for the ramp signals, but is silent as to the control of the offset levels. Akhavan teaches a an offset adjuster for adjusting the offset voltage of the ramp signal (¶6, 97 – 98). One of ordinary skill in the art would have recognized that applying the known technique of using an offset adjuster, as taught by Akhavan, with the invention of Park would have yielded predictable results and resulted in an improved system with increased accuracy of an ADC.
Regarding claim 13, Park discloses the limitations of claim 12. Park fails to explicitly disclose wherein generating the first ramp signal includes generating the first ramp signal having a first offset voltage level based on a first emphasis activation signal, and generating the second ramp signal includes generating the second ramp signal having a second offset voltage level different from the first offset voltage level based on a second emphasis activation signal.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Park with the teachings of Akhavan. Park discloses a ramp signal generator and having different offset levels for the ramp signals, but is silent as to the control of the offset levels. Akhavan teaches a an offset adjuster for adjusting the offset voltage of the ramp signal (¶6). One of ordinary skill in the art would have recognized that applying the known technique of using an offset adjuster, as taught by Akhavan, with the invention of Park would have yielded predictable results and resulted in an improved system with increased accuracy of an ADC.
Regarding claim 14, Park in view of Akhavan disclose the limitations of claim 13. Park also teaches wherein generating the second ramp signal includes generating the second ramp signal having the second offset voltage level .
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Contact
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTOINETTE T. SPINKS whose telephone number is (571)270-3749. The examiner can normally be reached M-Th 7am - 5pm EST.
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/ANTOINETTE T SPINKS/Primary Examiner, Art Unit 2639
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