DETAILED ACTION
The office action is in response to application filed on 12-19-25. Claims 1-20 are pending in the application and have been examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 6-7, 10, 12-16 and 19-20 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by JP H0779574 (IDS) to KAMIYA SHIGERU (“KAMIYA SHIGERU”)
Regarding claim 1, KAMIYA discloses a system (fig. 11, abstract, [0010]) comprising: a controller ([0013]); and a DC-AC inverter circuit (fig. 1, inverter 11) operatively coupled to the controller, the DC-AC inverter circuit comprising: two terminals (ED1, ED2) for configured to receive a DC-link voltage (capacitor voltage in both C1, C2) and two or more capacitors connected in series (C1, C2 are connected series) between the two terminals, wherein each capacitor is configured to have a capacitor voltage ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor); wherein the DC-AC inverter circuit is configured to convert an input electrical power to an output electrical power ([0010]- [0013]) for operating a main electrical load (Motor); and wherein the controller is configured, in response to the main electrical load becoming non-operational ([0032], As a result, it is possible to perform effective capacitor voltage balancing control regardless of the operation mode even when there is no load or light load), to configure the DC-AC inverter circuit into a balancing mode ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor); and wherein in the balancing mode, the controller is configured to configure the DCAC inverter circuit to output electrical power to an electrical component ([0032], DC component driving / braking) such that the DC-AC inverter circuit remains operational to balance the capacitor voltages ([0032], As a result, it is possible to perform effective capacitor voltage balancing control regardless of the operation mode even when there is no load or light load) while the main electrical load remains non-operational ([0032], As a result, it is possible to perform effective capacitor voltage balancing control regardless of the operation mode even when there is no load or light load).
Regarding claim 2, KAMIYA discloses the main electrical load comprises a Field Orientated Controller for a motor: and the controller is further configured, in the balancing mode ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor), to configure the main electrical load to be the electrical component; and configure the DC-AC inverter circuit to provide the output electrical power such that, when the Field Orientated Controller receives the output electrical power, a current builds up in the Field Orientated Controller.
Regarding claim 6, KAMIYA discloses the DC-AC inverter circuit further comprises a resistive load ([0014], DC component or an AC component), and the controller is further configured in the balancing mode ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor), to configure the resistive load to be the electrical component such that the DC-AC inverter circuit provides the output electrical power to the resistive load ([0014], the output voltage command of the inverter includes a DC component or an AC component).
Regarding claim 7, KAMIYA discloses the DC-AC inverter circuit further comprises two or more inverters (fig. 11, three-level inverter) configured to convert the input electrical power to the output ([0013] –[0014]) electrical power; and the controller is further configured, in the balancing mode, to: configure a first of the inverters (fig. 11, one of the three inverters) to provide the output electrical power; and configure a second of the inverters (fig. 11, one of the three inverters) to be the electrical component such that the first inverter provides the output electrical power to the second inverter (Claim 1, an inverter basic voltage is applied to each phase output voltage command of the inverter. A control circuit for a three-level inverter).
Regarding claim 10, KAMIYA discloses the DC-AC inverter circuit further comprises: one or more inverters (fig. 11, three-level inverter) configured to receive the DC-link voltage ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor) and the capacitor voltages (capacitor voltage in both C1, C2) and to convert the input electrical power to the output electrical power.
Regarding claim 12, KAMIYA discloses comprising two or more inverters (fig. 11, three-level inverter), and/or a resistive load ([0014], DC component or an AC component), a plurality of main electrical loads, a multiplexer, or a combination thereof.
Regarding claim 13, KAMIYA discloses a main electrical load (motor) or a plurality of main electrical loads; and a power source (DC power source) configured to supply the DC-link voltage.
Regarding claim 14, KAMIYA discloses the main electrical load comprises a motor (Motor) for an auxiliary system within an aircraft (the prior art is inherently capable of use a motor for an auxiliary system within an aircraft).
Regarding claim 15, KAMIYA discloses method for controlling a DC-AC inverter (fig. 1, inverters 11) circuit, comprising: configuring the DC-AC inverter circuit into a balancing mode ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor) in response to mam electrical load (motor) becoming non-operational ([0032], As a result, it is possible to perform effective capacitor voltage balancing control regardless of the operation mode even when there is no load or light load), wherein the DC-AC inverter circuit comprises: two terminals configured to receive a DC-link voltage (capacitor voltage in both C1, C2): and two or more capacitors connected in series (fig. 1, C1, C2 are series) between the two terminals: wherein each capacitor is configured to have a capacitor voltage ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor) and wherein the DC-AC inverter circuit is configured to convert an input electrical power to an output electrical power ([0010]- [0013]) for operating the main electrical load; wherein configuring the DC-AC inverter circuit into the balancing mode ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor) comprises configuring the DC-AC inverter circuit to output electrical power to an electrical component ([0032], DC component driving / braking) such that the DC-AC inverter circuit remains operational to balance the capacitor voltages while the main electrical load remains non-operational ([0032], As a result, it is possible to perform effective capacitor voltage balancing control regardless of the operation mode even when there is no load or light load).
Regarding claim 16, KAMIYA discloses an aircraft (the prior art is inherently capable of use the system within an aircraft) electrical network comprising: a DC-AC inverter circuit (fig. 1, inverter 11) comprising: two terminals configured to receive a DC-link voltage (capacitor voltage in both C1, C2); two or more capacitors connected in series (fig. 1, C1, C2 are series) between the two terminals, wherein each capacitor is configured to have a capacitor voltage ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor); and one or more inverters (fig. 11, three-level inverter) configured to receive the DC-link voltage ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor) and the capacitor voltages and to convert an input electrical power to provide an output electrical power ([0010]-[0013]) to operate a main electrical load (Motor); a power source (DC power source) configured to supply the DC-link voltage; and a controller ([0013]) configured, in response to the main electrical load becoming non-operational, to configure the DC-AC inverter circuit into a balancing mode ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor); wherein, in the balancing mode, the controller is configured to configure the DC-AC inverter circuit to output electrical power to an electrical component ([0032], DC component driving / braking) such that the DC-AC inverter circuit remains operational to balance the capacitor voltages while the main electrical load remains non-operational ([0032], As a result, it is possible to perform effective capacitor voltage balancing control regardless of the operation mode even when there is no load or light load).
Regarding claim 19, KAMIYA discloses the DC-AC inverter circuit further comprises a resistive load ([0014], DC component or an AC component); and the controller is configured, in the balancing mode, to configure the resistive load to be the electrical component such that the DC-AC inverter circuit provides the output electrical power to the resistive load ([0014], the output voltage command of the inverter includes a DC component or an AC component).
Regarding claim 20, KAMIYA discloses the controller is configured, in the balancing mode ([0010], to enable control even under no load or light load to balance the voltage of a DC input capacitor), to configure a first of the inverters (fig. 11, first is one of the three inverters) to provide the output electrical power; and configure a second of the inverters (fig. 11, second is one of the three inverters) to be the electrical component such that the first inverter provides the output electrical power to the second inverter (Claim 1, an inverter basic voltage is applied to each phase output voltage command of the inverter. A control circuit for a three-level inverter).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 4-5, 8, 11 and 18 are rejected under 35 U.S.C. 103 (a) as being unpatentable over JP H0779574 to KAMIYA SHIGERU (“KAMIYA SHIGERU”) in view of US 2016/0248354 Liu et al. (“Liu”).
Regarding claim 4, KAMIYA discloses all the claim limitation as set forth in the rejection of claims above.
But, KAMIYA does not discloses the DC-AC inverter circuit further comprises an output filter configured to filter the output electrical power for the main electrical load; and the controller is further configured, in the balancing mode, to configure an inverter to demand high-frequency switching; and configure the filter to be the electrical component such that the DC-AC inverter circuit provides the output electrical power to the filter.
However, Liu discloses the DC-AC inverter circuit further comprises an output filter (para; 0010, lines 27-29, motor drive system 2 may include an output filters and/or transformers (not shown) coupled between the motor drive 10 and the motor load 6) configured to filter the output electrical power for the main electrical load (motor); and the controller is further configured, in the balancing mode, to configure an inverter to demand high-frequency switching; and configure the filter to be the electrical component such that the DC-AC inverter circuit provides the output electrical power to the filter (para; 0015, lines 7-10, high frequency signals are inserted into the AC output power delivered to the motor load 6 at a frequency generally corresponding to the inverter pulse width modulation frequency).
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art at the time of the invention to modify KAMIYA by adding output filter as part of its configuration as taught by Liu, in order to reduce output voltage and minimize voltage stress at motor windings, protect AC motors.
Regarding claim 5, KAMIYA discloses the claimed invention except for “the High-frequency switching is at a frequency greater than 1 kHz.”.
One of ordinary skill in the art prior to the effective filing date would recognize that the particular switching frequency used would depend on the desired switching frequency of the particular system/components used.
Since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art at the time of the invention to modify KAMIYA by adding parameters of High-frequency switching range of the inverter in order to minimize the leakage current.
Furthermore, the particular known technique of modifying the High-frequency switching range of inverter was recognized as part of the ordinary capabilities of one skilled in the art, as evidenced by Liu (Para; 0009).
Regarding claim 8, KAMIYA discloses all the claim limitation as set forth in the rejection of claims above.
But, KAMIYA does not discloses the DC-AC inverter circuit further comprises a multiplexer; and the controller is further configured to connect or disconnect one or more inverters to the main electrical load through the multiplexer.
However, Liu discloses the DC-AC inverter circuit further comprises a multiplexer (para; 0019, line 4, phase current sensors serially using a multiplexer); and the controller is further configured to connect or disconnect one or more inverters (fig. 1, inverter 40) to the main electrical load through the multiplexer.
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art at the time of the invention to modify KAMIYA by adding multiplexer as part of its configuration as taught by Liu, in order to measuring the inverter output currents signals to increases data transmission efficiency, allowing multiple signals to share a single path to reduce wiring.
Regarding claim 11, KAMIYA discloses all the claim limitation as set forth in the rejection of claims above.
But, KAMIYA does not discloses the DCAC inverter circuit further comprises an output filter configured to filter the output electrical power for the main electrical load.
However, Liu discloses the DCAC inverter circuit further comprises an output filter (para; 0010, lines 27-29, motor drive system 2 may include an output filters and/or transformers (not shown) coupled between the motor drive 10 and the motor load 6) configured to filter the output electrical power for the main electrical load.
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art at the time of the invention to modify KAMIYA by adding output filter as part of its configuration as taught by Liu, in order to reduce output voltage and minimize voltage stress at motor windings, protect AC motors.
Regarding claim 18, KAMIYA discloses all the claim limitation as set forth in the rejection of claims above.
But, KAMIYA does not discloses the DC-AC inverter circuit further comprises an output filter configured to filter the output electrical power for the main electrical load; and the controller is configured, in the balancing mode, to configure at least one of the one or more inverters to demand high-frequency switching; and configure the filter to be the electrical component such that the DC-AC inverter circuit provides the output electrical power to the filter.
However, Liu discloses the DC-AC inverter circuit further comprises an output filter (para; 0010, lines 27-29, motor drive system 2 may include an output filters and/or transformers (not shown) coupled between the motor drive 10 and the motor load 6) configured to filter the output electrical power for the main electrical load; and the controller is configured, in the balancing mode, to configure at least one of the one or more inverters (fig. 1, inverter 40) to demand high-frequency switching; and configure the filter to be the electrical component such that the DC-AC inverter circuit provides the output electrical power to the filter (para; 0015, lines 7-10, high frequency signals are inserted into the AC output power delivered to the motor load 6 at a frequency generally corresponding to the inverter pulse width modulation frequency).
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art at the time of the invention to modify KAMIYA by adding output filter as part of its configuration as taught by Liu, in order to reduce output voltage and minimize voltage stress at motor windings, protect AC motors.
Allowable Subject Matter
Claims 3, 9 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for the indication of allowable subject matter:
Claim 3 indicated as containing allowable subject matter because prior art fails to teach or suggest, either alone or in combination all of the limitations of claim 3, especially wherein the current that builds up in the Field Orientated Controller is defined by orthogonal components that are configured to have an orientation that prevents the motor from producing torque.
Claim 9 indicated as containing allowable subject matter because prior art fails to teach or suggest, either alone or in combination all of the limitations of claim 9, especially wherein: the DC-AC inverter circuit further comprises: a plurality of main electrical loads; a plurality of inverters; and a multiplexer configured to connect the inverters to the main electrical loads; and the controller is configured to configure the multiplexer such that an equal number of inverters are connected to an equal number of electrical loads; a greater number of inverters are connected to a fewer number of electrical loads; or a fewer number of inverters are connected to a greater number of electrical loads.
Claim 17 indicated as containing allowable subject matter because prior art fails to teach or suggest, either alone or in combination all of the limitations of claim 17, especially wherein the main electrical load comprises a Field Orientated Controller for a motor; and the controller is configured, in the balancing mode, to configure the main electrical load to be the electrical component; and configure the DC-AC inverter circuit to provide the output electrical power such that, when the Field Orientated Controller receives the output electrical power, a current builds up in the Field Orientated Controller.
Response to argument
Applicant’s argument filed on 12-19-25 with respect to claims 1-15 has been fully considered but are moot in view of the new grounds of rejection.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ESAYAS G YESHAW whose telephone number is (571)270-1959. The examiner can normally be reached Mon-Sat 9AM-7PM.
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/ESAYAS G YESHAW/Examiner, Art Unit 2836
/Menatoallah Youssef/SPE, Art Unit 2849