DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-4, & 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Datta et al. (US 2023/0402988 A1), hereinafter Datta, in view of Cao et al. (WO 2023/051840 A1), hereinafter Cao.
Regarding claim 1, Datta discloses, in figure 3, a system, comprising:
a primary coil including a first end and a second end (Para [0047], “primary coil 1A”);
a first series combination comprising a first conducting wire and a first capacitor coupled in series (conducting wire 5A and capacitor 1D constituting the first series combination), wherein a first end of the first series combination is coupled to the first end of the primary coil (first end of the first series combination 5A & 1D are coupled to a first end of the primary coil 1A);
a second conducting wire (conducting wire 4A), wherein a first end of the second conducting wire is coupled to the first end of the primary coil (first end of wire 4A is coupled to the first end of primary coil 1A), and a second end of the second conducting wire is coupled to a second end of the first series combination (second end of wire 4A is coupled to the second end of series combination 5A & 1D); and
a secondary coil including a first end and a second end (Para [0048], “secondary coil 1B”), wherein the first end of the secondary coil is coupled to an output end (Para [0048], “secondary coil…is connected at the output side of the balun transformer circuit 1”);
the first end of the first capacitor is coupled to the first end of the primary coil (first end of capacitor 1D is coupled to the first end of the primary coil 1A via wire 5A);
the second end of the first capacitor is coupled to the first end of the first conducting wire (second end of the first capacitor 1D is coupled to the first end of the first conducting wire 5A via the second end of the first conducting wire 5A); and
the second end of the first conducting wire is coupled to the second end of the second conducting wire (second of the first conducting wire 5A is coupled to the second end of the second conducting wire 4A via capacitor 1D);
the first conducting wire is a first bonding wire which is wire-bonded between a first chip and a second chip (Para [0057], “module 10 can be a multi-chip module…balun transformer circuit 1 can be a laminated balun transformer circuit having a primary coil 1A is connected via conductor elements 4A, 4B [and wires 5A, 5B] (e.g., flip chip bumps or wire bonds) to the differential power amplifier 2 integrated in the power amplifier chip package”);
the second conducting wire is a second bonding wire which is wire-bonded between the first chip and the second chip (DC wire-bond 4A between the first chip and second chip), but fails to disclose the primary coil and the first capacitor are disposed on the first chip.
However, Cao discloses, in figure 10, the primary coil and the first capacitor are disposed on the first chip (pg. 16, para. 2, “chip 100 further includes a first capacitor C1”…coupled to wire bond S1 and S3…primary coil of the first balun 30 is also disposed on the chip 100).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the structure of Cao in the impedance matching system of Datta, to achieve the benefit of implementing further impedance matching in the chip so that the chip can support a larger bandwidth (Cao, pg. 16, para. 3).
Regarding claim 3, Datta in view of Cao discloses the system of claim 1, and Datta continues to disclose, in figure 3, a third conducting wire (conducting wire 4B), wherein a first end of the third conducting wire is coupled to the second end of the primary coil (conducting wire 4B is coupled to the second end of primary coil 1A); and
a second series combination comprising a fourth conducting wire and a second capacitor coupled in series (conducting wire 5B and capacitor 1E constituting the second series combination), wherein a first end of the second series combination is coupled to the second end of the primary coil (first end of second series combination 5B & 1E is coupled to the second of the primary coil 1A), and a second end of the second series combination is coupled to a second end of the third conducting wire (second end of second series combination 5B & 1E is coupled to the second end of third wire 4B).
Regarding claim 4, Datta in view of Cao discloses the system of claim 3, and Datta continues to disclose, in figure 3, a first end of the fourth conducting wire is coupled to the second end of the primary coil (first end of wire 5B is coupled to the second end of primary coil 1A), a second end of the fourth conducting wire is coupled to a first end of the second capacitor (second end of wire 5B is coupled to the first end of capacitor 1E), and a second end of the second capacitor is coupled to the second end of the third conducting wire (second end of capacitor 1E is coupled to the second end of wire 4B); or
the first end of the second capacitor is coupled to the second end of the primary coil (first end of capacitor 1E is coupled to the second end of the primary coil 1A), the second end of the second capacitor is coupled to the first end of the fourth conducting wire (second end of capacitor 1E is coupled to the first end of wire 5B), and the second end of the fourth conducting wire is coupled to the second end of the third conducting wire (second end of wire 5B is coupled to the second end of wire 4B via capacitor 1E).
Regarding claim 6, Datta in view of Cao discloses the system of claim 1, and Datta continues to disclose, in figure 3, wherein the second conducting wire generates an inductive impedance (Para [0040], “the leakage inductance and the inductance L.sub.CE of the conductor elements 4A, 4B, upconvert the real impedance presented by the balun transformer circuit 1”), and the first conducting wire and the first capacitor together generate a capacitive impedance which reduces the inductive impedance (Para [0053], “RF capacitors 1D, 1E are connected in parallel to both conductor elements 4A, 4B of the differential output of the differential power amplifier 2 to compensate at least partially the leakage inductance of the balun transformer circuit 1. FIG. 3 illustrates a broadband series inductor cancellation by means of the RF capacitors 1D, 1E being connected to associated conductor elements 4A, 4B such as wire bonds”).
Regarding claim 7, Datta in view of Cao discloses the system of claim 1, and Datta continues to disclose, in figure 3, a first pad is disposed on the first chip and connected to a first end of the first bonding wire (first pad disposed on the power amplifier package 2 and coupled to the first end of the first bonding wire [i.e., wire 5A]); and
a second pad is disposed on the second chip and connected to a second end of the first bonding wire (second pad disposed on the laminated balun transformer circuit [i.e., chip] and connected to the second end of the first bonding wire [i.e., wire 5A]).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Datta in view of Cao, as applied to claims 1, 3-4, & 6-7 above, and further in view of Tsutsui et al. (US 2022/0189936 A1), hereinafter Tsutsui.
Regarding claim 5, Datta in view of Cao discloses the system of claim 1, but fails to disclose wherein the primary coil comprises a center tap coupled to a power voltage.
However, Tsutsui discloses, in figure 1, wherein the primary coil comprises a center tap coupled to a power voltage (Para [0032], “a power supply voltage Vcc is applied to a center tap of the primary coil [of balun 35]”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the center tap of Tsutsui in the primary coil of Datta and Cao, to achieve the benefit of providing a balanced system with reduced noise and prevented oscillation while maintaining linearity (Tsutsui, Para [0032]).
Allowable Subject Matter
Claims 9-20 are allowed.
Regarding claim 9, Datta discloses, in figure 3, a system, comprising:
a primary coil including a first end and a second end (Para [0047], “primary coil 1A”);
a first bonding wire including a first end coupled to the first end of the primary coil (first wire 4A coupled to the primary coil 1A);
a first series combination comprising a second bonding wire and a first capacitor coupled in series (conducting wire 5A and capacitor 1D constituting the first series combination), wherein a first end of the first series combination is coupled to the first end of the primary coil (first end of the first series combination 5A & 1D are coupled to a first end of the primary coil 1A);
a second series combination comprising a third bonding wire and a second capacitor coupled in series (conducting wire 5B and capacitor 1E constituting the second series combination), wherein a first end of the second series combination is coupled to the second end of the primary coil (first end of the second series combination 5B & 1E is coupled to the second end of the primary coil 1A);
a fourth bonding wire including a first end coupled to the second end of the primary coil (first end of wire 4B coupled to the second end of the primary coil 1A); and
a secondary coil including a first end and a second end (Para [0048], “secondary coil 1B”), wherein the first end of the secondary coil is coupled to an output end (Para [0048], “secondary coil…is connected at the output side of the balun transformer circuit 1”).
However, Datta, alone or in combination, does not disclose nor render obvious wherein the second end of the second series combination is coupled to a second end of the first bonding wire, and the second end of the fourth bonding wire is coupled to the second end of the first series combination.
Regarding claim 20, Datta discloses, in figure 3, a system, comprising:
a primary coil including a first end and a second end (Para [0047], “primary coil 1A”);
a first wire including a first end coupled to the first end of the primary coil (first wire 4A coupled to the primary coil 1A);
a first series combination comprising a second wire and a first capacitor coupled in series (conducting wire 5A and capacitor 1D constituting the first series combination), wherein a first end of the first series combination is coupled to the first end of the primary coil (first end of the first series combination 5A & 1D are coupled to a first end of the primary coil 1A);
a second series combination comprising a third wire and a second capacitor coupled in series (conducting wire 5B and capacitor 1E constituting the second series combination), wherein a first end of the second series combination is coupled to the second end of the primary coil (first end of the second series combination 5B & 1E is coupled to the second end of the primary coil 1A);
a fourth wire including a first end coupled to the second end of the primary coil (wire 4B includes a first end coupled to the second end of primary coil 1A); and
a secondary coil including a first end and a second end (Para [0048], “secondary coil 1B”), wherein the first end of the secondary coil is coupled to an output end (Para [0048], “secondary coil…is connected at the output side of the balun transformer circuit 1”).
Barbell discloses, in figure 2, wherein the wires are a trace (Para [0076], “the one or more interconnects 104 may utilize…a trace”).
However, Datta and Barbell, alone or in combination, do not disclose nor render obvious wherein the second end of the second series combination is coupled to the second end of the first wire, and the second end of the fourth wire is coupled to the second end of the first series combination.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Visser et al. (US 2012/0075019 A1) [Figure 2. Discloses an on-chip power amplifier includes first and second variable capacitors connected in parallel with first and second windings, respectively, of an on-chip balun. The first balun winding connects between the differential outputs of an on-chip differential amplifier. Varying the first variable capacitor changes the imaginary part of the load impedance of the differential amplifier, while varying the second variable capacitor changes the real part of the load impedance of the differential amplifier.]
Embar et al. (US 2015/0263681 A1) [Figure 1. Discloses providing compensation for mutual inductance in a multi-path device. In one embodiment, a device includes a multi-path integrated device. The multi-path integrated device includes a first output and a second output. The first output is configured to be coupled to a first output lead through a first bonding wire, and the second output is configured to be coupled to a second output lead through a second bonding wire. Due to their proximity, the second bonding wire has a first mutual inductance with the first bonding wire. A first compensation network is coupled to the first output, and a second compensation network is coupled to the second output. The second compensation network is configured to have a second mutual inductance with the first compensation network. The second mutual inductance at least partially cancels the effects of the first mutual inductance.]
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/TYLER J PERENY/ Examiner, Art Unit 2836
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