DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim Interpretation
The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met. The broadest reasonable interpretation of a system (or apparatus or product) claim having structure that performs a function, which only needs to occur if a condition precedent is met, requires structure for performing the function should the condition occur. The system claim interpretation differs from a method claim interpretation because the claimed structure must be present in the system regardless of whether the condition is met and the function is actually performed. See MPEP 2111.04(II). "[i]f the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed" (quotation omitted). Ex parte Schulhauser, Appeal 2013-007847 (PTAB April 28, 2016).
As a courtesy to Applicant, and in an effort to expedite prosecution, alternative rejections have been provided treating the contingent step(s) as being required by the claims.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3, 6, 12, 16, 17, and 21-22 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US Patent Application Publication Number 2011/0242088 to Kim (“Kim-1”).
In reference to Claim 1, Kim-1 discloses a display device (See Figure 6 and Paragraphs 30 and 54) comprising: a display panel (See Figure 6 Number 92 and Paragraphs 52 and 54); and a plurality of source drivers configured to convert image data into a data voltage and provide the data voltage to the display panel (See Figures 6, 7, and 8 Number 88 and Paragraphs 54-59), wherein each of the plurality of source drivers includes a reception circuit configured to reconstruct at least one of the image data, control data, or a clock from a data packet (See Figure 8 Numbers 128 and 130, Figure 10, and Paragraphs 58-59 and 62) received from a transmission circuit (See Figure 8 Number 118 and Paragraphs 58-60) of a timing controller (See Figures 6, 7, and 8 Number 86 and Paragraphs 54-55), and a source output circuit configured to output the data voltage to the display panel (See Figure 8 Number 134 and Paragraphs 59, 70, and 75), wherein the display device includes a lock signal indicating an output stable state between the timing controller and the plurality of source drivers (See Figure 10 Number 180 [bit pattern of 10 indicate a skip frame where the output is stable]), wherein the transmission circuit and the reception circuit are configured to be disabled (See Paragraphs 65 and 70) in response to the lock signal being deactivated (See Figure 10 Number 180 [bit pattern of 10 indicate a skip frame; a 0 bit is a deactivated logic low level]) during a skip frame (See Paragraphs 65 and 70) in a variable refresh rate mode operation (See Paragraphs 8, 70, and 75 [insertion of skip frames is variable, and thus the refresh rate is variable]), and wherein, while the transmission circuit and the reception circuit are disabled during the skip frame, the source output circuit is configured to maintain and output a data voltage corresponding to image data latched at a last time during a refresh frame (See Figure 8 Number 134 and Paragraphs 70 and 75).
In reference to Claim 3, Kim-1 discloses the limitations as applied to Claim 1 above. Kim-1 further discloses that the timing controller includes the transmission circuit configured to: generate the data packet including at least one of the image data, the control data, and the clock; and transmit the data packet to the plurality of source drivers (See Paragraphs 58-59 and 62).
In reference to Claim 6, Kim-1 discloses the limitations as applied to Claim 5 above. Kim-1 further discloses the transmission circuit and the reception circuit are configured to enter a sleep mode in response to the lock signal being deactivated during the skip frame (See Paragraphs 64-65 and 70).
In reference to Claim 12, Kim-1 discloses a method for operating a display device (See Figure 6 and Paragraphs 30 and 54) that includes a display panel (See Figure 6 Number 92 and Paragraphs 52 and 54) and a plurality of source drivers configured to convert image data into a data voltage and provide the data voltage to the display panel (See Figures 6, 7, and 8 Number 88 and Paragraphs 54-59), wherein each of the plurality of source drivers includes a reception circuit configured to reconstruct at least one of the image data, control data, and a clock from a data packet (See Figure 8 Numbers 128 and 130, Figure 10, and Paragraphs 58-59 and 62) received from a timing controller (See Figures 6, 7, and 8 Number 86 and Paragraphs 54-55), the method comprises: providing a lock signal indicating an output stable state between the timing controller and the plurality of source drivers (See Figure 10 Number 180 [bit pattern of 10 indicate a skip frame where the output is stable]); deactivating (See Paragraphs 65 and 70) a transmission circuit (See Figure 8 Number 118 and Paragraphs 58-60) and the reception circuit in response to the lock signal being deactivated (See Figure 10 Number 180 [bit pattern of 10 indicate a skip frame; a 0 bit is a deactivated logic low level]) during a skip frame (See Paragraphs 65 and 70) in a variable refresh rate mode operation (See Paragraphs 8, 70, and 75 [insertion of skip frames is variable, and thus the refresh rate is variable]); and while the transmission circuit and the reception circuit are deactivated during the skip frame, maintaining and outputting, by a source output circuit of each source driver (See Figure 8 Numbers 134 and 136 and Paragraph 59), a data voltage corresponding to image data latched at a last time during a refresh frame (See Figure 8 Number 134 and Paragraphs 59, 70, and 75).
It is noted that Claim 12 is a method claim reciting contingent limitations as highlighted. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art.
In reference to Claim 16, Kim-1 discloses the limitations as applied to Claim 15 above. Kim-1 further discloses that the method further comprises causing the transmission circuit and the reception circuit to enter a sleep mode in response to the lock signal being deactivated during the skip frame (See Paragraphs 64-65 and 70).
It is noted that Claim 16 is a method claim reciting further actions performed in response to the contingent limitation recited in the parent claim as highlighted. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art.
In reference to Claim 17, Kim-1 discloses the limitations as applied to Claim 15 above. Kim-1 further discloses that the display device is configured to: count a time upon entering the skip frame, and activating the transmission circuit in response to the counted time reaching a reference time.
It is noted that Claim 17 is a method claim reciting further actions performed in response to the contingent limitation recited in the parent claim as highlighted. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art.
In reference to Claim 21, Kim-1 discloses a method for operating a display device (See Figure 6 and Paragraphs 30 and 54), the display device including a display panel (See Figure 6 Number 92 and Paragraphs 52 and 54), the method comprising: converting image data into data voltage, and providing the data voltage to the display panel (See Figures 6, 7, and 8 Number 88 and Paragraphs 54-59); providing a lock signal indicating an output stable state (See Figure 10 Number 180 [bit pattern of 10 indicate a skip frame where the output is stable]) between a timing controller (See Figures 6, 7, and 8 Number 86 and Paragraphs 54-55) and a source driver (See Figures 6, 7, and 8 Number 88 and Paragraphs 54-59); deactivating reconstruction (See Paragraphs 64-65 and 70) of at least one of image data, control data, and a clock from a data packet received from the timing controller (See Figure 8 Numbers 128 and 130, Figure 10, and Paragraphs 58-59 and 62) in response to the lock signal being deactivated (See Figure 10 Number 180 [bit pattern of 10 indicate a skip frame; a 0 bit is a deactivated logic low level]) during a skip frame (See Paragraphs 65 and 70) in a variable refresh rate mode operation (See Paragraphs 8, 70, and 75 [insertion of skip frames is variable, and thus the refresh rate is variable]); and while the reconstruction is deactivated during the skip frame, maintaining and outputting the data voltage corresponding to image data latched at a last time during a refresh frame (See Figure 8 Number 134 and Paragraphs 59, 70, and 75).
It is noted that Claim 21 is a method claim reciting contingent limitations as highlighted. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art.
In reference to Claim 22, Kim-1 discloses the limitations as applied to Claim 21 above. Kim-1 further discloses that maintaining and outputting the data voltage comprises: outputting the data voltage at a level corresponding to the data voltage latched at a last refresh frame while reconstruction of the image data, the control data, and the clock is deactivated (See Figure 8 Number 134 and Paragraphs 59, 70, and 75)
It is noted that Claim 22 is a method claim reciting further actions performed in response to the contingent limitation recited in the parent claim as highlighted. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim-1 as applied to Claims 1 and 12 above, and further in view of knowledge commonly known in the art, as evidenced by US Patent Application Publication Number 2009/0252140 to Imaeda (“Imaeda”) and admitted by Applicant to be prior art.
In reference to Claim 7, Kim-1 discloses the limitations as applied to Claim 1 above. Kim-1 further discloses that the display device is configured to: determine the start point of the skip frame (See Figure 11 Number 202), and activate the transmission circuit (See Paragraphs 64-65 and 70) in response to the determining the end point of the skip frame (See Figure 11 Number 204). However, Kim-1 is silent as to how the end point of the skip frame is determined, and does not explicitly disclose that that the display device is configured to: count a time upon entering the skip frame, and activate the transmission circuit in response to the counted time reaching a reference time. Official Notice is taken that using a timer in a transmitter to determine if an elapsed time from a start point of a data frame has reached a threshold in order to determine the end point of the frame is well known in the art, as evidenced by Imaeda (See Paragraphs 46 and 49). This has been admitted by Applicant to be prior art.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Kim-1 using a well-known timer to determine the end point of the skip frame, resulting in the invention of Claim 7, because Kim-1 is silent as to how the end point of the skip frame is determined, and the simple substitution of a well-known timer for determining the end point of a transmission data frame to determine the end point of the skip frame of Kim-1 would have yielded the predictable result of determining the start and end points of the skip frame (See Paragraph 65 of Kim-1 and Paragraphs 46 and 49 of Imaeda).
In reference to Claim 17, Kim-1 discloses the limitations as applied to Claim 12 above. Kim-1 further discloses that the method further comprises: determining the start point of the skip frame (See Figure 11 Number 202), and activating the transmission circuit (See Paragraphs 64-65 and 70) in response to the determining the end point of the skip frame (See Figure 11 Number 204). However, Kim-1 is silent as to how the end point of the skip frame is determined, and does not explicitly disclose counting a time upon entering the skip frame, and activating the transmission circuit in response to the counted time reaching a reference time. Official Notice is taken that using a timer in a transmitter to determine if an elapsed time from a start point of a data frame has reached a threshold in order to determine the end point of the frame is well known in the art, as evidenced by Imaeda (See Paragraphs 46 and 49). This has been admitted by Applicant to be prior art.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Kim-1 using a well-known timer to determine the end point of the skip frame, resulting in the invention of Claim 17, because Kim-1 is silent as to how the end point of the skip frame is determined, and the simple substitution of a well-known timer for determining the end point of a transmission data frame to determine the end point of the skip frame of Kim-1 would have yielded the predictable result of determining the start and end points of the skip frame (See Paragraph 65 of Kim-1 and Paragraphs 46 and 49 of Imaeda).
It is noted that Claim 17 is a method claim reciting contingent limitations as highlighted. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art.
Claim(s) 8 and 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim-1 and knowledge commonly known in the art as applied to Claims 7 and 17 above, and further in view of US Patent Application Publication Number 2018/0190238 to Park et al. (“Park”).
In reference to Claim 8, Kim-1 and knowledge commonly known in the art disclose the limitations as applied to Claim 7 above. Kim-1 further discloses that the transmission circuit is configured to transmit a data packet to the reception circuit when activated (See Figure 11 and Paragraphs 64-65 and 70). Kim-1 is silent as to the particular protocol used between the timing controller and the source driver, and does not explicitly disclose the data packet including at least the clock. Park discloses the use of an EPI protocol for communicating between a timing controller (See Figure 3 Number 400) and a source driver (See Figure 3 Number 300), in which image data, control data, and a clock are embedded into a packet for transmission (See Paragraphs 5-7).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Kim-1 and knowledge commonly known in the art using the EPI protocol for communicating between the timing controller and the source driver of Park, resulting in the invention of Claim 8, because Kim-1 is silent as to particular protocol used between the timing controller and the source driver, and the simple substitution of the EPI protocol of Park as the protocol used between the timing controller and the source driver of Kim-1 would have yielded the predictable result of reducing the number of transmission lines and achieving fast transmission (See Paragraph 5 of Park).
In reference to Claim 18, Kim-1 and knowledge commonly known in the art disclose the limitations as applied to Claim 17 above. Kim-1 further discloses transmitting, by the transmission circuit, a data packet to the reception circuit when the transmission circuit is activated (See Figure 11 and Paragraphs 64-65 and 70). Kim-1 is silent as to the particular protocol used between the timing controller and the source driver, and does not explicitly disclose the data packet including at least the clock. Park discloses the use of an EPI protocol for communicating between a timing controller (See Figure 3 Number 400) and a source driver (See Figure 3 Number 300), in which image data, control data, and a clock are embedded into a packet for transmission (See Paragraphs 5-7).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Kim-1 and knowledge commonly known in the art using the EPI protocol for communicating between the timing controller and the source driver of Park, resulting in the invention of Claim 18, because Kim-1 is silent as to particular protocol used between the timing controller and the source driver, and the simple substitution of the EPI protocol of Park as the protocol used between the timing controller and the source driver of Kim-1 would have yielded the predictable result of reducing the number of transmission lines and achieving fast transmission (See Paragraph 5 of Park).
It is noted that Claim 18 is a method claim reciting contingent limitations as highlighted. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art.
In reference to Claim 19, Kim-1, knowledge commonly known in the art, and Park disclose the limitations as applied to Claim 18 above. Park further discloses reconstructing the clock from the data packet (See Paragraph 7). Kim-1, knowledge commonly known in the art, and Park further disclose activating the lock signal in response to a phase and a frequency of an internal clock being fixed via clock training.
It is noted that Claim 19 is a method claim reciting contingent limitations as highlighted. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art.
Claim(s) 9-11 and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim-1, knowledge commonly known in the art, and Park as applied to Claims 8 and 18 above, and further in view of US Patent Application Publication Number 2021/0201757 to Kim et al. (“Kim-2”).
In reference to Claim 9, Kim-1, knowledge commonly known in the art, and Park disclose the limitations as applied to Claim 8 above. Park further discloses that the reception circuit is configured to: reconstruct the clock from the data packet (See Paragraph 7). Kim-1, knowledge commonly known in the art, and Park do not explicitly disclose that the reception circuit is configured to: activate the lock signal in response to a phase and a frequency of an internal clock being fixed via clock training. Kim-2 discloses a display device (See Paragraph 4) using an EPI protocol (See Paragraphs 5 and 66) to communicate between a timing controller (See Figure 2 TCON and Paragraph 57) and a source driver (See Figure 2 Number 110 and Paragraph 58), the display device is configured to switch a lock signal indicating an output stable state of a recovered clock to a low logic level during when there is no stable reconstructed clock due to no packets being received (See Figure 3 and Paragraph 79) and further configured to: reconstruct the clock from the data packet (See Paragraph 68); and activate the lock signal in response to a phase and a frequency of an internal clock being fixed via clock training (See Paragraphs 68-71).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Kim-1, knowledge commonly known in the art, and Park using the EPI protocol lock signaling of Kim-2, resulting in the invention of Claim 9, in order to yield the predictable result of notifying the timing controller whether the internal clock of the source driver is locked and has a stable output (See Paragraphs 68-69 and 79 of Kim-2).
In reference to Claim 10, Kim-1, knowledge commonly known in the art, Park, and Kim-2 disclose the limitations as applied to Claim 9 above. Kim-1 further discloses that the transmission circuit is configured to enter the refresh frame at the starting point of a refresh frame period (See Figure 11 and Paragraphs 64-65 and 70). Kim-2 further discloses that the transmission circuit is configured to enter the refresh frame in response to the activated the lock signal (See Paragraphs 68-71).
In reference to Claim 11, Kim-1, knowledge commonly known in the art, Park, and Kim-2 disclose the limitations as applied to Claim 10 above. Kim-1 further discloses that upon entering the refresh frame, the transmission circuit is configured to transmit the data packet including the image data and the control data to the reception circuit (See Paragraphs 58-59 and 62). Park further discloses that upon entering the refresh frame, the transmission circuit is configured to transmit the data packet including the image data, the control data, and the clock to the reception circuit (See Paragraphs 5-7).
Alternatively, in reference to Claim 19, Kim-1, knowledge commonly known in the art, and Park disclose the limitations as applied to Claim 18 above. Park further discloses reconstructing the clock from the data packet (See Paragraph 7). Kim-1, knowledge commonly known in the art, and Park do not explicitly disclose that the reception circuit is configured to: activate the lock signal in response to a phase and a frequency of an internal clock being fixed via clock training. Kim-2 discloses a display device (See Paragraph 4) using an EPI protocol (See Paragraphs 5 and 66) to communicate between a timing controller (See Figure 2 TCON and Paragraph 57) and a source driver (See Figure 2 Number 110 and Paragraph 58), the display device is configured to switch a lock signal indicating an output stable state of a recovered clock to a low logic level during when there is no stable reconstructed clock due to no packets being received (See Figure 3 and Paragraph 79) and further configured to: reconstruct the clock from the data packet (See Paragraph 68); and activate the lock signal in response to a phase and a frequency of an internal clock being fixed via clock training (See Paragraphs 68-71).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Kim-1, knowledge commonly known in the art, and Park using the EPI protocol lock signaling of Kim-2, resulting in the invention of Claim 19, in order to yield the predictable result of notifying the timing controller whether the internal clock of the source driver is locked and has a stable output (See Paragraphs 68-69 and 79 of Kim-2).
It is noted that Claim 19 is a method claim reciting contingent limitations as highlighted. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art.
In reference to Claim 20, Kim-1, knowledge commonly known in the art, Park, and Kim-2 disclose the limitations as applied to Claim 19 above. Kim-1 further discloses causing the transmission circuit to enter the refresh frame at the starting point of a refresh frame period (See Figure 11 and Paragraphs 64-65 and 70). Kim-2 further discloses causing the transmission circuit to enter the refresh frame in response to the activated the lock signal (See Paragraphs 68-71).
It is noted that Claim 20 is a method claim reciting contingent limitations as highlighted. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art.
Response to Arguments
Applicant's arguments filed 21 January 2026 have been fully considered but they are not persuasive.
Official Notice was taken in the previous Office Action. To adequately traverse such a finding, an Applicant must specifically point out the supposed errors in the Examiner’s action, which would include stating why the noticed fact is not considered to be common knowledge or well-known in the art. If the Applicant does not traverse the Examiner’s assertion of Official Notice, the common knowledge or well-known in the art statement is taken to be admitted prior art. (See MPEP 2144.03 C). The Examiner’s assertion of Official Notice is hereby taken to be admitted prior art due to the Applicant’s failure to traverse the assertion.
Applicant has argued that the claimed invention does not rely on packet header interpretation to determine an operational mode (See Pages 9-10). In response the Examiner notes that the features upon which applicant relies are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Applicant has argued that the Kim-1 does not disclose the claimed lock signal that explicitly indicates an output stable state between the timing controller and the source drivers and actively disables both the transmission circuit and the reception circuit during a skip frame based on the lock signal, as the use of a header by Kim-1 requires the reception circuit to remain active to decode the packet header (See Pages 9-10). In response, the Examiner notes that Kim-1 discloses that after transmission of the data header (lock signal), the data channel is closed to conserve power (See Paragraph 70), and that shutting down of the data channels includes placing both the transmitters and receivers into a low-power state (See Paragraph 65). Thus, Kim-1 discloses the transmission circuit and the reception circuit are configured to be disabled (See Paragraphs 65 and 70) in response to the lock signal being deactivated (See Figure 10 Number 180 [bit pattern of 10 indicate a skip frame; a 0 bit is a deactivated logic low level]) during a skip frame (See Paragraphs 65 and 70) in a variable refresh rate mode operation (See Paragraphs 8, 70, and 75 [insertion of skip frames is variable, and thus the refresh rate is variable]).
Applicant has argued that Kim-1 does not disclose maintaining and outputting, by a source output circuit, a data voltage corresponding to image data latched in a previous refresh frame while such digital circuits are disabled (See Page 10). In response, the Examiner notes that Kim-1 discloses that “The column driver 88 receiving the data packet 196 may identify the transmission mode from the header 198 (such as from a portion 180 set to "10" in the header 198), and the column driver 88 may drive the corresponding row of pixels of region 106 based on data previously stored within the latch 134 for a previous row of pixels. The data channel may be closed after transmission of the header 198 (during shutdown period 210) until transmission of the next data packet to conserve power” (See Paragraph 70) and “For the subsequent rows until the text 216 begins (i.e., until row 230), the timing controller 86 may transmit a data packet 196 indicating that the data sampling skip mode has been enabled, and that the column driver 88 is to drive the row of pixels to the same values stored in the latch 134 and used for the previous row of pixels. For instance, each of rows 220, 222, 224, 226, and 228 may be driven to the same color as the pixels of the preceding row. Consequently, rather than transmitting individual pixel data values for each pixel 218 of these rows, the timing controller 86 may simply transmit an indication that the rows are to be driven to identical values (e.g., by setting a portion 180 of the header 198 for each data packet 196 to indicate the data sampling skip transmission mode). As transmission of such indications would be much shorter in duration than transmitting pixel data values for each pixel of each row, the data channel between the timing controller 86 and the column driver 88 may be selectively placed in a low-power state or otherwise deactivated during the transmission sequence. In other words, the data channel may be deactivated following transmission of each data packet 196, and then reactivated to enable transmission of the next data packet” (See Paragraph 75). Kim-1 further discloses that that shutting down of the data channels includes placing both the transmitters and receivers into a low-power state (See Paragraph 65). Thus, Kim-1 discloses maintaining and outputting, by a source output circuit, a data voltage corresponding to image data latched in a previous refresh frame while such digital circuits are disabled (See Paragraphs 70 and 75).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THOMAS J CLEARY whose telephone number is (571)272-3624. The examiner can normally be reached Monday-Friday 8AM-5PM.
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/THOMAS J. CLEARY/Primary Examiner, Art Unit 2175