DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/27/2023. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Election/Restrictions
Applicant’s election without traverse of claims 1-11 in the reply filed on 05/18/2026 is acknowledged.
Claim Rejections - 35 USC § 103
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6 are rejected under 35 U.S.C. 103 as being unpatentable over Fujikawa (US 20020079920 A1) in view of Gotoh (US20060237849 A1).
Regarding claim 1, Fujikawa teaches a display area and a test area disposed adjacent to the display area; (a display device substrate having a display portion and a region outside the display portion in which TEGs are formed. The test elements are formed in a free region of the substrate other than the region occupied by the display device circuit, with terminals and TEGs formed in the frame portion outside the display portion ([0006], [0009]; Figs. 1A, 1B, and 3)).
a first test element disposed on a substrate in the test area, wherein the first test
element comprises: (a contact resistance test element Rc1 disposed on insulating substrate 101 as part of the TEG, wherein Fig. 9C shows Rc1 for measuring drain gate contact resistance ([0098]-[0099]; Fig. 9C)).
a first pad part including a first-first voltage pad, a first-second voltage pad, a first current pad, and a first ground pad; (four test terminals 107a, 107b, 107c, and 107d connected to contact resistance test element Rc1-1 ([0081]). Two of the four terminals are used to apply current and the remaining two are used to measure voltage ([0101]). During measurement, current is applied between terminals 107a and 107d and voltage is measured between terminals 107b and 107c ([0133])).
a first test pattern electrically connecting the first-first voltage pad and the first ground pad; and gate sheet 204 forming a first conductive test pattern of Rc1, with wiring portions Wa, Wb, Wc, and Wd connecting element portion P to the four test terminals ([0099]; Fig. 9C).
"a second test pattern contacting the first test pattern and electrically connecting the
first current pad and the first-second voltage pad, and" drain sheet 208 forming a second conductive test pattern, wherein element portion P of Rc1 is the portion where drain sheet 208 and gate sheet 204 contact each other ([0099]; Fig. 9C). A through hole is formed through gate insulation film 201 to gate sheet 204, followed by formation of drain sheet 208 to establish the conductive contact ([0100]).
"in an area where the first test pattern and the second test pattern contact each other, a direction of a first current that flows into the first ground pad and a direction of a second current that flows into the first-first voltage pad are opposite to each other." Fujikawa applies current through Rc1 between terminals 107a and 107d while measuring voltage between terminals 107b and 107c ([0132]-[0133]), but does not expressly disclose a second current flowing toward a voltage terminal in a direction opposite to the current flowing toward the return terminal in the area where the two conductive patterns contact.
Gotoh in a relevant art teaches a four terminal Kelvin pattern for measuring contact resistance between two contacting conductive materials, including current terminals 11 and 12, voltage terminals V1 and V2, and conductive patterns contacting at contact portion C (Fig. 22; [0137]-[0138]). The current and voltage branches extend from opposed sides of the common contact region.
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the four terminal contact resistance test element of Fujikawa in view of Gotoh by providing the current return terminal as a ground terminal and arranging the current return and voltage measurement paths on opposite sides of the common contact region, such that the respective current paths extend in opposite directions from the contact region, to reduce additional resistance outside the contact being measured and thereby improve the accuracy of the contact resistance measurement. Fujikawa expressly recognizes that four terminal measurement removes additional resistance, including terminal contact resistance, resulting in accurate measurement of contact resistance ([0082]).
Regarding claim 2, Fujikawa further teaches the first current flows into the first ground pad through the first current pad, the second test pattern, and the first test pattern, (Fujikawa applies a constant current between current applying terminals 107a and 107d of
Contact resistance test element Rc1-1 ([0133]). The element includes drain sheet 208 and gate
sheet 204 contacting at element portion P ([0099]-[0101]; Fig. 9C), such that the applied
current passes from one current terminal through the conductive sheets and their contact
portion toward the current return terminal.
the second current flows into the first-first voltage pad through the first-second voltage pad, the second test pattern, and the first test pattern (Fujikawa uses the remaining two terminals 107b and 107c as voltage measuring terminals across the drain sheet 208/gate sheet 204 contact ([0133])).
However, Fujikawa does not expressly disclose applying a second current between the two voltage terminals such that the second current passes through the second test pattern, the contact portion, and the first test pattern.
Gotoh in a relevant art teaches a four terminal Kelvin contact resistance structure having current terminals 11/12, voltage terminals V1N2, and first and second conductive patterns contacting at contact portion C (Fig. 22 [0137]-[0138]). The separate terminal branches are connected through the respective conductive patterns about the common contact region.
It would have been obvious to one of ordinary skill in the art before the effective filing date to configure the four terminal contact resistance test element of Fujikawa according to the Kelvin arrangement of Gotoh such that the first current passes from the current pad through the second test pattern and first test pattern to the grounded current return pad, and the second measurement current passes from the second voltage pad through the second test pattern and first test pattern to the first voltage pad, to provide separate measurement paths through the same contact region and reduce the effect of additional resistance outside the contact being measured, thereby improving the accuracy of the contact resistance measurement.
Regarding claim 3, Fujikawa further teaches wherein the first-first voltage pad, the first current pad, the first ground pad, and the first-second voltage pad are arranged side by side in a first direction (Fujikawa discloses contact resistance test element Rc1-1 connected to four test terminals 107a, 107b, 107c, and 107d ([0081]), with two terminals used for applying current and the remaining two terminals used for measuring voltage ([0101]). During measurement, current is applied between terminals 107a and 107d, while voltage is measured between terminals 107b and 107c ([0133])). Fujikawa further shows the test terminals of the TEG blocks arranged in a common terminal pattern on the substrate (Figs. 3-4).
Fujikawa does not expressly disclose the four pads arranged side by side in the particular claimed order of first-first voltage pad, first current pad, first ground pad, and first-second voltage pad.
Gotoh in a relevant art teaches a four terminal Kelvin contact resistance pattern having voltage terminals V1 and V2 and current terminals 11 and 12 arranged about the conductive test patterns and common contact portion C (Fig. 22 [0137]-[0138]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to arrange the four measurement pads of the modified Fujikawa test element side by side in a first direction in the claimed order, as a matter of terminal layout, to provide an orderly
Probe accessible pad arrangement while maintaining the electrical connections required for the
Four terminal contact resistance measurement. Fujikawa expressly recognizes the use of test
terminals arranged according to a common pattern so that the test elements can be measured
using a common probe ([0008]-[0009]).
Regarding claim 4, Fujikawa further teaches wherein the first current pad, the first-first voltage pad, the first-second voltage pad, and the first ground pad are arranged side by side in a first direction (Fujikawa discloses contact resistance test element Rc1-1 connected to four test terminals 107a, 107b, 107c, and 107d ([0081]), with two terminals used for applying current and the remaining two terminals used for measuring voltage ([0101]). During measurement, current is applied between terminals 107a and 107d, while voltage is measured between terminals 107b and 107c ([0133])).
Fujikawa further discloses the test terminals arranged according to a common terminal pattern for access by a common probe ([0008]-[0009]; Figs. 3-4).
Fujikawa does not expressly teach the four pads arranged side by side in the particular claimed order of first current pad, first-first voltage pad, first-second voltage pad, and first ground pad.
Gotoh in a relevant art teaches a four terminal Kelvin contact resistance pattern having current terminals 11 and 12 and voltage terminals V1 and V2, with the terminals connected to respective branches of the conductive patterns about common contact portion C (Fig. 22 [0137]-[0138]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to arrange the four measurement pads of the modified Fujikawa test element side by side in a first direction in the claimed order, as a predictable terminal layout arrangement, to permit convenient probe access while maintaining the electrical connections required for four terminal contact resistance measurement. Fujikawa expressly provides a common terminal arrangement so that test elements can be measured using a common probe ([0008]-[0009]).
Regarding claim 5, Fujikawa further teaches an active pattern disposed on the substrate in the display area (a semiconductor film 203 patterned as part of TFT 202 in display portion 102 ([0092]-[0095]; Fig. 7). Fujikawa states that the semiconductor film is formed and patterned during formation of the TFT in the display portion).
a gate electrode layer disposed on the active pattern, wherein (gate electrode 204a of TFT 202 in display portion 102, with gate insulation film 201 and semiconductor film 203 formed relative to gate sheet 204 during the TFT manufacturing process (0092]-[0095]; Fig. 7)).
the first test pattern and the active pattern are disposed on a same layer (each test element is formed together with TFT 202 in display portion 102 using the TFT manufacturing process, and that corresponding structures bearing the same reference numerals are formed from the same film ([0092]-[0095]).
the gate electrode layer and each of the second test pattern and the first pad part are
disposed on a same layer (Fujikawa discloses forming the resistance test elements by the same manufacturing steps used to form TFT 202 in display portion 102 ([0100]). For example, structures corresponding to gate sheet 204 are formed from the same film as gate electrode 204a and formed together with gate electrode 204a. The Rc1 structure, however, uses drain sheet 208 as the second contacting pattern, and the test terminals include subsequently formed terminal electrodes).
Fujikawa does not expressly teach both the second test pattern and the first pad part on the same layer as the gate electrode layer.
Gotoh in a relevant art teaches contacting conductive patterns used in a four terminal Kelvin contact resistance structure (Fig. 22 [0137]-[0138]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to form the test patterns and associated pad structures of the modified Fujikawa test element using the corresponding semiconductor and gate level layers already used to fabricate TFT 202, such that the first test pattern and the active pattern are disposed on a same layer, and the gate electrode layer and each of the second test pattern and the first pad part are
disposed on a same layer, in order to form the TEG concurrently with the corresponding TFT
layers without additional fabrication steps. Fujikawa expressly teaches forming the test elements together with TFT 202 using the TFT manufacturing process and forming corresponding test structures from the same films as the TFT structures ([0092]-[0100]).
Regarding claim 6, Fujikawa further teaches the first test pattern and the active pattern include a same material (Fujikawa discloses forming each test element together with TFT 202 in display portion 102 using the same TFT manufacturing process. Fujikawa further states that structures denoted by the same reference numerals as the films of TFT 202 in the display portion are formed from the same film ([0092]-[0095]). The semiconductor film 203 forming the active semiconductor structure is formed and patterned during the TFT process).
the gate electrode layer and each of the second test pattern and the first pad part
include a same material (gate sheet 204 of the test element formed from the same film as gate electrode 204a of TFT 202 in display portion 102 ([0095]). Fujikawa further discloses forming the resistance test elements using the same steps used to form TFT 202 and expressly states that the gate sheet resistance test element is formed from the same film as gate electrode 204a and is formed together with gate electrode 204a ([01001)).
Fujikawa does not expressly teach both the second test pattern and the first pad
part of the Rc1 structure including the same material as the gate electrode layer.
Gotoh in a relevant art teaches the contacting conductive patterns and associated terminals of the four terminal Kelvin structure relied upon above.
It would have been obvious to one of ordinary skill in the art before the effective filing date to form the first test pattern from the same material as the active pattern and to form the second test pattern and first pad part from the same material as the gate electrode layer, consistent with Fujikawa's practice of forming TEG structures concurrently with corresponding TFT structures and from the same films, to simplify fabrication of the test element by using the existing TFT material deposition and patterning steps without requiring additional material layers or processing steps. Fujikawa expressly teaches that the test elements are formed together with TFT 202 using the TFT manufacturing process, thereby suppressing increased
manufacturing/evaluation costs.
Allowable Subject Matter
Claim 7-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
None of the prior art of record discloses or teaches the claimed combinations, or feature the following:
Re-claim 7, The display device of claim 1, further comprising: a second test element disposed on the substrate in the test area, wherein the second test element includes: a second pad part including a second-first voltage pad, a second- second voltage pad, a second current pad, and a second ground pad; a third test pattern electrically connecting the second-first voltage pad and the second ground pad; a fourth test pattern electrically connecting the second current pad and the second-second voltage pad; and a connection pattern electrically connecting the third test pattern and the fourth test pattern, and in an area where the connection pattern and the fourth test pattern contact each other, a direction of a third current that flows into the second ground pad and a direction of fourth current that flows into the second-first voltage pad are same.
Claims 8-11 are also objected over the prior art because of their dependencies.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Kim (US 20220172653) discloses DISPLAY DEVICE AND PAD CONTACT TEST METHOD THEREOF.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAQI R NASIR whose telephone number is (571)270-1425. The examiner can normally be reached 9AM-5PM EST M-F.
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/TAQI R NASIR/Examiner, Art Unit 2858
/JERMELE M HOLLINGTON/Primary Examiner, Art Unit 2858
