Prosecution Insights
Last updated: October 02, 2026
Application No. 18/398,355

ANALOG-DIGITAL HYBRID INTEGRATOR CIRCUIT

Non-Final OA §112
Filed
Dec 28, 2023
Priority
Jan 25, 2023 — RE 10-2023-0009598
Examiner
NGUYEN, HAI L
Art Unit
Tech Center
Assignee
Korea Advanced Institute of Science and Technology
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
823 granted / 944 resolved
+27.2% vs TC avg
Moderate +9% lift
Without
With
+9.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
15 currently pending
Career history
954
Total Applications
across all art units

Statute-Specific Performance

§101
2.5%
-37.5% vs TC avg
§103
21.6%
-18.4% vs TC avg
§102
29.1%
-10.9% vs TC avg
§112
35.0%
-5.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 944 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Examiner Notes Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. Response to Election Applicants’ election without traverse to prosecute Species A, corresponding to Fig. 5 and encompassing Claims 1-7, as identified by Applicants, in the reply filed on Augst 3, 2026, is acknowledged. Claims 8-18 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being directed to a non-elected Species. Accordingly, a complete reply to this Office Action must include cancellation of the withdrawn, non-elected claims 8-18. Drawings Figures 1-4 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification 35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112, requires the specification to be written in “full, clear, concise, and exact terms.” The specification is replete with terms which are not clear, concise and exact. The specification should be revised carefully in order to comply with 35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112. Examples of some unclear, inexact or verbose terms used in the specification are: Paragraph [0062] states: “Referring to FIG. 5, a hybrid integrator according to an exemplary embodiment of the present disclosure includes an operational amplifier 110 coupled to an input terminal, a first capacitor 120 coupled to the input terminal in parallel with the operational amplifier 110, a plurality of second capacitors 130 coupled in parallel with the first capacitor 120, and a plurality of buffers 140 that is coupled in series and is coupled in parallel with the plurality of second capacitors 130, respectively.” (emphasis added). Additionally, paragraph [0065] states: “Referring to FIGS. 5 and 6, the second capacitors 130 are coupled in parallel with the first capacitor 120 and form a digital domain together with the buffers 140, and receive the output of the operational amplifier 110 as a control signal, thereby operating.” (emphasis added). The above descriptions are unclear and appear inconsistent with the circuit configurations illustrated in Figs. 5 and 6. In particular, in the electrical arts, two electrical components are generally understood to be connected in parallel when the components are connected between the same two electrical nodes, such that the components have the same voltage across them. Thus, the recitation that the plurality of second capacitors 130 is “coupled in parallel with the first capacitor 120” should correspond to a circuit configuration in which the second capacitors 130 are connected between the same two nodes as the first capacitor 120. However, as illustrated in Figs. 5 and 6, the plurality of second capacitors 130 does not appear to be connected in parallel with the first capacitor 120. Likewise, the plurality of buffers 140, which is depicted as being coupled in series, does not appear to be coupled in parallel with the plurality of second capacitors 130, respectively. Accordingly, the cited descriptions do not clearly and accurately describe the corresponding circuit configurations shown in Figs. 5 and 6. Therefore, the specification should be amended to clearly, concisely, and accurately describe the structural and electrical relationships among the operational amplifier 110, first capacitor 120, second capacitors 130, and buffers 140, including the intended connections between these components. The Applicant is required to review and revise the specification as appropriate to place the application in compliance with the requirements of 35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. With regard to independent Claim 1, the structural limitations, “a first capacitor coupled to the input terminal in parallel with the operational amplifier; a plurality of second capacitors coupled in parallel with the first capacitor; and a plurality of buffers that is coupled in series and is coupled in parallel with the plurality of second capacitors, respectively.” (emphasis added) are misdescriptive of the disclosed embodiment. For example, as illustrated in Fig. 5, the plurality of second capacitors 130 do not appear to be connected in parallel with the first capacitor 120. Likewise, the plurality of buffers 140, which are depicted as being coupled in series, do not appear to be coupled in parallel with the plurality of second capacitors 130, respectively. Accordingly, the above recited structural limitations are inconsistent with the structure illustrated in Fig. 5 and therefore render Claim 1 indefinite under 35 U.S.C. § 112(b). Claims 2-7 are likewise rejected under 35 U.S.C. § 112(b) because they depend from Claim 1 and therefore incorporate the above-noted deficiency of Claim 1. Claim 6 is rejected under 35 U.S.C. § 112(b) as being indefinite. Claim 6 recites, in pertinent part, “The hybrid integrator according to claim 4, wherein when an output voltage fed from the operational amplifier back to the buffers is greater than an existing voltage, the fourth buffers output '1', thereby changing to first buffers, whereby the number of first buffers increases and the fourth buffers that form falling edges are propagated and migrated toward the second buffers.” (Emphasis added). The above-identified limitation is unclear because it is not clear what structure or component of the hybrid integrator generates or provides the recited “existing voltage”. Furthermore, it unclear what structure or component determines whether the output voltage fed from the operational amplifier back to the buffers is greater than the existing voltage. Accordingly, the scope of the recited limitation cannot be ascertained with reasonable certainty, and Claim 6 is therefore indefinite under 35 U.S.C. § 112(b). Claim 7 is rejected under 35 U.S.C. § 112(b) as being indefinite. Claim 7 recites, in pertinent part, “The hybrid integrator according to claim 4, wherein when an output voltage fed from the operational amplifier back to the buffers is smaller than an existing voltage, the third buffers output '0', thereby changing to second buffers, whereby the number of second buffers increases and the third buffers that form rising edges are propagated and migrated toward the first buffers” (Emphasis added). The above-identified limitation is unclear because it is not clear what structure or component of the hybrid integrator generates or provides the recited “existing voltage”. Furthermore, it unclear what structure or component determines whether the output voltage fed from the operational amplifier back to the buffers is smaller than the existing voltage. Accordingly, the scope of the recited limitation cannot be ascertained with reasonable certainty, and Claim 7 is therefore indefinite under 35 U.S.C. § 112(b). Reference of Note The prior art of Record and not relied upon is considered pertinent to applicant’s disclosure: Brannick et al. (US 9,397,823) teaches a charge rebalancing integration circuit can help keep an output node of a front-end integration circuit within a specified range, e.g., without requiring resetting of the integration capacitor. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAI L NGUYEN whose telephone number is (571)272-1747. The examiner can normally be reached Monday-Friday from 09:00am to 06:00pm Eastern time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Regis Betsch can be reached on 571-270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HAI L NGUYEN/Primary Examiner, Art Unit 2836 August 20, 2026
Read full office action

Prosecution Timeline

Dec 28, 2023
Application Filed
Aug 24, 2026
Non-Final Rejection mailed — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
97%
With Interview (+9.4%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 944 resolved cases by this examiner. Grant probability derived from career allowance rate.

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