DETAILED ACTION
This action is a response to an application filed on 12/28/23 in which claims 1-20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Intel Corporation et al. (Non-Patent Literature: Multi-TRP Enhancements for PDCCH, PUCCH and PUSCH), herein Intel.
As to claim 1, Intel teaches a method for an uplink channel transmission, performed by a terminal device, comprising:
receiving transmission indication information from a network device, wherein the transmission indication information is configured to indicate a first repetition scheme for transmitting a physical uplink shared channel (PUSCH), and the first repetition scheme is a combination of an inter-slot repetition scheme and an intra-slot beam hopping scheme (Intel section 3.2 PUSCH repetitions and beams in single DCI based multi -TRP PUSCH repetition type A and Type B and Fig. 17 inter-slot case PUSCH repetitions spans 2 slots); and
transmitting cooperatively the PUSCH to a plurality of transmit-receive points (TRPs) of the network device based on the first repetition scheme (Intel Fig. 17 transmitting to two TRPs using intra-slot beam hopping and inter-slot rep)
As to claim 12, Intel teaches a method for an uplink channel transmission, performed by a network device, comprising:
transmitting transmission indication information to a terminal device, wherein the transmission indication information is configured to indicate a first repetition scheme for transmitting a physical uplink shared channel (PUSCH) by the terminal device, and the first repetition scheme is a combination of an inter-slot repetition scheme and an intra-slot beam hopping scheme (Intel section 3.2 PUSCH repetitions and beams in single DCI based multi -TRP PUSCH repetition type A and Type B and Fig. 17 inter-slot case PUSCH repetitions spans 2 slots); and
receiving the PUSCH from the terminal device based on a plurality of transmit-receive points (TRPs) of the network device Intel Fig. 17 transmitting to two TRPs using intra-slot beam hopping and inter-slot rep)
As to claim 20, Intel teaches a terminal device, comprising:
a processor (Intel Sec 2.4 UE) ; and
a transceiver connected to the processor (Intel Sec 2.4 UE);
wherein the processor is configured to load and execute executable instructions to implement:
receiving transmission indication information from a network device, wherein the transmission indication information is configured to indicate a first repetition scheme for transmitting a physical uplink shared channel (PUSCH), and the first repetition scheme is a combination of an inter-slot repetition scheme and an intra-slot beam hopping scheme (Intel section 3.2 PUSCH repetitions and beams in single DCI based multi -TRP PUSCH repetition type A and Type B and Fig. 17 inter-slot case PUSCH repetitions spans 2 slots); and
transmitting cooperatively the PUSCH to a plurality oftransmit-receive points (TRPs) of the network device based on the first repetition scheme Intel Fig. 17 transmitting to two TRPs using intra-slot beam hopping and inter-slot rep)
As to claim 2, Intel teaches the method according to claim 1, wherein the transmission indication information comprises: an intra-slot transmission scheme being the intra-slot beam hopping scheme (Intel Fig. 17 intra-slot beam hopping); or, the transmission indication information comprises: transmission of the PUSCH using the first repetition scheme in response to an intra-slot frequency hopping scheme and/or an inter- slot frequency hopping scheme being configured.
As to claim 3, Intel teaches the method according to claim 1, wherein the first repetition scheme comprises: performing an inter-slot repetition within n slots, and performing an intra-slot beam hopping within each of the n slots; wherein n is an integer greater than or equal to 1 (Intel Fig. 17 n = 2)
As to claim 4, Intel teaches the method according to claim 3, further comprising: receiving a radio resource control (RRC) signaling from the network device, wherein the RRC signaling is configured to configure n; or, receiving a media access control (MAC) control element (CE) or downlink control information (DCI) from the network device, wherein the MAC CE or the DCI is configured to indicate n (Intel section 2.1 consider two configurations n = 1 or n = 2 and section 3.2 in a single DCI configurable mapping patterns)
Claim 14 is rejected for the same reasons stated in claim 4.
As to claim 5, Intel teaches the method according to claim 3, wherein a resource size occupied by a frequency hopping resource corresponding to each of the n slots is same, and resource sizes occupied by different frequency hopping resources corresponding to a same slot of the n slots are same or different (Intel Fig. 17)
As to claim 6, Intel teaches the method according to claim 3, wherein a frequency resource occupied by a frequency hopping resource corresponding to each of the n slots is same, and frequency resources occupied by different frequency hopping resources corresponding to a same slot of the n slots are same or different, and a beam mapping of the frequency hopping resource corresponding to each of the n slots is same (Intel Fig. 17 and section 3.2 configurable mapping)
As to claim 7, Intel teaches the method according to claim 6, wherein each of the n slots corresponds to a first frequency hopping resource and a second frequency hopping resource (Intel Fig. 17); and the beam mapping of the frequency hopping resource corresponding to each of the n slots being same comprises: the first frequency hopping resource corresponding to each of the n slots being mapped to a transmitting beam corresponding to a first transmit-receive point (TRP) (Intel Fig. 17); and the second frequency hopping resource corresponding to each of the n slots being mapped to a transmitting beam corresponding to a second transmit-receive point (TRP) (Intel Fig. 17);
As to claim 8, Intel teaches the method according to claim 6, further comprising: receiving beam flipping mapping information from the network device, wherein the beam flipping mapping information is configured to indicate that only a beam mapping flipping occurs within k of the n slots, wherein k is a positive integer less than or equal to n (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); wherein each of the n slots corresponds to a first frequency hopping resource and a second frequency hopping resource (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); and only the beam mapping flipping occurring within k of the n slots comprises: a first frequency hopping resource corresponding to each of (n-k) slots being mapped to a transmitting beam corresponding to a first transmit-receive point (TRP) (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); a second frequency hopping resource corresponding to each of the (n-k) slots being mapped to a transmitting beam corresponding to a second transmit-receive point (TRP) (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); the first frequency hopping resource corresponding to each of the k slots being mapped to the transmitting beam corresponding to the second TRP (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); and the second frequency hopping resource corresponding to each of the k slots being mapped to the transmitting beam corresponding to the first TRP (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping);
As to claim 9, Intel teaches the method according to claim 6, further comprising: receiving frequency flipping mapping information from the network device, wherein the frequency flipping mapping information is configured to indicate that only a beam mapping flipping occurs within i of the n slots, wherein i is a positive integer less than or equal to n (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); wherein each of the n slots corresponds to a first frequency hopping resource and a second frequency hopping resource (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); and only the frequency mapping flipping occurring within i of the n slots comprises: a frequency resource occupied by the first frequency hopping resource corresponding to each of (n-i) slots being a first frequency resource (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); a frequency resource occupied by the second frequency hopping resource corresponding to each of the (n-i) slots being a second frequency resource (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); the frequency resource occupied by the first frequency hopping resource corresponding to each of the i slots being the second frequency resource; and the frequency resource occupied by the second frequency hopping resource corresponding to each of the i slots being the first frequency resource (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping);
Claim 17 is rejected for the same reasons stated in claim 9.
As to claim 10, Intel teaches the method according to claim 3, wherein frequency resources occupied by frequency hopping resources corresponding to adjacent slots of the n slots are different, frequency resources occupied by different frequency hopping resources corresponding to a same slot of the n slots are same or different, and a beam mapping of a frequency hopping resource corresponding to each of the n slots is same (Intel Fig. 17) wherein each of the n slots corresponds to a first frequency hopping resource and a second frequency hopping resource (Intel Fig. 17); and the beam mapping of the frequency hopping resource corresponding to each of the n slots being same comprises: a first frequency hopping resource corresponding to each of the n slots being mapped to a transmitting beam corresponding to a first transmit-receive point (TRP) (Intel Fig. 17); and a second frequency hopping resource corresponding to each of the n slots being mapped to a transmitting beam corresponding to a second transmit-receive point (TRP) (Intel Fig. 17)
Claim 18 is rejected for the same reasons stated in claim 10.
As to claim 11, Intel teaches the method according to claim 10, further comprising: receiving beam flipping mapping information from the network device, wherein the beam flipping mapping information is configured to indicate that only a beam mapping flipping occurs within k of the n slots, wherein k is a positive integer less than or equal to n (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); wherein each of the n slots corresponds to a first frequency hopping resource and a second frequency hopping resource (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); and only the beam mapping flipping occurring within k of the n slots comprises: a first frequency hopping resource corresponding to each of (n-k) slots being mapped to a transmitting beam corresponding to a first transmit-receive point (TRP) (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); a second frequency hopping resource corresponding to each of the (n-k) slots being mapped to a transmitting beam corresponding to a second transmit-receive point (TRP); the first frequency hopping resource corresponding to each of the k slots being mapped to the transmitting beam corresponding to the second TRP (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping); and the second frequency hopping resource corresponding to each of the k slots being mapped to the transmitting beam corresponding to the first TRP (Intel Fig. 17 and section 3.2 how the beams are mapped to different PUSCH repetitions and configurable mapping);
Claims 16 and 19 are rejected for the same reasons stated in claim 11.
As to claim 13, Intel teaches the method according to claim 12, wherein the first repetition scheme comprises: performing an inter-slot repetition within n slots, and performing an intra-slot beam hopping within each of the n slots; wherein n is an integer greater than or equal to 1 (Intel Fig. 17 n = 2);
wherein a resource size occupied by a frequency hopping resource corresponding to each of the n slots is same, and resource sizes occupied by different frequency hopping resources corresponding to a same slot of the n slots are same or different. (Intel Fig. 17 n = 2)
As to claim 15, Intel teaches the method according to a claim 13, wherein a frequency resource occupied by a frequency hopping resource corresponding to each of the n slots is same, and frequency resources occupied by different frequency hopping resources corresponding to a same slot of the n slots are same or different, and a beam mapping of the frequency hopping resource corresponding to each of the n slots is same (Intel Fig. 17); wherein each of the n slots corresponds to a first frequency hopping resource and a second frequency hopping resource (Intel Fig. 17); and the beam mapping of the frequency hopping resource corresponding to each of the n slots being same comprises: the first frequency hopping resource corresponding to each of the n slots being mapped to a transmitting beam corresponding to a first transmit-receive point (TRP) (Intel Fig. 17); and the second frequency hopping resource corresponding to each of the n slots being mapped to a transmitting beam corresponding to a second transmit-receive point (TRP) (Intel Fig. 17)
Conclusion
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AYANAH S. GEORGE
Primary Examiner
Art Unit 2467
/AYANAH S GEORGE/Primary Examiner, Art Unit 2467