DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Amendment
Receipt is acknowledged of the amendment filed 4/2/26.
Response to Arguments
Applicant's amendments and arguments filed 4/2/2026 have been fully considered but they are not persuasive.
Regarding claim 1, previous dependent claim 9 has been incorporated into claim 1 and the applicant argues that the Pezeshki reference does not teach that the micro-LED assembly comprises one or more photodiode dies.
The applicant notes that Paragraph 51 of Pezeshki disclose that a photodetector is on a second IC chip and concludes that the assembly 523a does not include each of a micro LED and photodiode die.
However, Paragraph 51 goes on to disclose: “In many embodiments, the optical waveguide also passes light from an LED (not shown) on the second IC chip, to a photodetector (not shown) on the first IC chip, with driver circuitry for the LED of the second chip part of the second IC chip and receive circuitry associated with the photodetector part of the first IC chip.”. Furthermore, the assemblies 523a/523b are described as transceiver circuitry which implies that there is both transmitting and receiving devices in each respective assembly.
Hence, the examiner maintains that the cited disclosures of Pezeshki disclose the newly amended limitation of claim 1. Regarding arguments of the claims 2-4, 6, 14, and 17 in response, upon further consideration they are persuasive and indicated as allowable as set forth below.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5, 6, 8 and 10-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by USPGPub 2020/0411587 to Pezeshki et al. (hereinafter “Pezeshki”).
Regarding claim 1, Pezeshki teaches an apparatus comprising:
an integrated circuit die (Fig. 4, 419 and Paragraph 49; Fig. 5A, 511a);
a micro-light-emitting diode (micro-LED) assembly comprising one or more micro-LEDs (Fig. 4, 421 and Paragraph 34; Fig. 5A, 521); wherein the micro-LED assembly is mounted on the integrated circuit die; and
a glass interposer (Fig. 4, 41 and Paragraph 24 and 39; Fig. 5A, 513), wherein one or more waveguides are defined in the glass interposer, wherein the one or more waveguides terminate at the micro-LED assembly;
wherein the micro-LED assembly comprises a base die (Fig. 5A, 523), one or more micro-LED dies (Fig. 5A, 521), and one or more photodiode dies (Fig. 5, not shown, Paragraphs 51 and 37).
Regarding claim 5, Pezeshki one or more mirrors (Fig. 4, 425 and Paragraph 49) are defined in the glass interposer, wherein the one or more waveguides are coupled to the one or more micro-LEDs by the one or more mirrors.
Regarding claim 6, Pezeshki teaches a cavity is defined in the glass interposer (Fig. 5B, 513), wherein the micro-LED assembly (fig. 5B, 521/532a) is disposed in the cavity of the glass interposer.
Regarding claim 8, Pezeshki teaches a plurality of through-glass vias (Fig. 4, 427; Fig. 5, 517are defined in the glass interposer, wherein the plurality of through-glass vias carry input signals, output signals, and power signals to or from the integrated circuit die (see Fig. 1 for I/O and power signal, Paragraph 48).
Regarding claim 10, Pezeshki teaches that driver circuitry for the micro-LED assembly is located on the micro-LED assembly (Paragraph 56).
Regarding claim 11, Pezeshki teaches a second integrated circuit die (see Fig. 5A-5C, 511b); and
a second micro-LED assembly, wherein the second micro-LED assembly is mounted on the second integrated circuit die, wherein the one or more waveguides are configured to carry light between the micro-LED assembly and the second micro-LED assembly (Paragraph 51).
Regarding claim 12, Pezeshki teaches a circuit board (Fig. package substrate), wherein the glass interposer is mounted on the circuit board.
Regarding claim 13, Pezeshki teaches that the one or more micro-LEDs comprise gallium and nitrogen (Paragraph 42, etc.).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Pezeshki, in view of Wei et al (U.S. PGPub 2022/0065407).
Regarding claim 7, Pezeshki does not teach an index-matching material disposed within the cavity.
Wei teaches a microLED coupled to a waveguide, wherein a cavity space between the elements has an index matching material disposed within (Paragraph 40-41).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an index matching material disposed in the cavity of Pezeshki as taught by Wei in order to improve the coupling (Paragraph 40-41).
Allowable Subject Matter
Claims 2-4 and 21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 14-20 are allowed.
The following is a statement of reasons for the indication of allowable subject matter: the best prior art does not teach or fairly suggest
in claim 14:
wherein the micro-LED assembly is adjacent to the integrated circuit die and the glass interposer (note: in the present application the term “adjacent to” is defined and limited to layers or components that are in physical contact with each other”; see instant application Paragraph 21);
in claim 18:
wherein the means for converting electrical signals from the integrated circuit die to optical signals is adjacent to the glass interposer and the integrated circuit die.
(note: in the present application the term “adjacent to” is defined and limited to layers or components that are in physical contact with each other”; see instant application Paragraph 21. Furthermore, the means plus function limitation of “means for converting electrical signals” has been interpreted according to Paragraph 147 of the present application).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LISA M CAPUTO whose telephone number is (571)272-2388. The examiner can normally be reached Monday-Friday 9-5 EST.
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/LISA M CAPUTO/Primary Patent Examiner, Art Unit 2874
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