Prosecution Insights
Last updated: October 02, 2026
Application No. 18/399,552

MICRO LIGHT EMITTING DIODE DISPLAY PANELS, METHODS OF MANUFACTURING THE SAME, AND DISPLAY DEVICES

Non-Final OA §102§103
Filed
Dec 28, 2023
Priority
Nov 14, 2023 — CN 202311520226.X
Examiner
QUARTERMAN, KEVIN J
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
730 granted / 882 resolved
+14.8% vs TC avg
Moderate +12% lift
Without
With
+11.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
16 currently pending
Career history
901
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
38.4%
-1.6% vs TC avg
§102
46.3%
+6.3% vs TC avg
§112
11.4%
-28.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 882 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Invention I, claims 1-13 and 16-20, in the reply filed on 31 July 2026 is acknowledged. Claims 14-15 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 31 July 2026. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 7, 10, and 16-17 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Goto (US 2021/0351328). Regarding independent claim 1, Goto teaches a light emitting diode display panel comprising a driving circuit substrate (Fig. 20, Element 30; ¶ [0151]) having a first surface and a second surface disposed oppositely; a plurality of light emitting diodes (Fig. 20, Element 21; ¶ [0132]) disposed on the first surface; a protective layer (Fig. 20, Element 35; ¶ [0132]) disposed at least on the first surface, wherein the protective layer covers the plurality of light emitting diodes, and a material of the protective layer is selected from a Parylene system or an acrylic acid system (¶ [0174]). Regarding claim 7, Goto teaches the acrylic acid system comprising at least one of epoxy acrylate, polyurethane acrylate, pure acrylate, or polyester acrylate (¶ [0174]). Regarding claim 10, Goto teaches a thickness of the protective layer being greater than or equal to 10 microns and less than or equal to 30 microns (¶ [0181]). Regarding independent claim 16, Goto teaches a display device comprising a light emitting diode display panel including a driving circuit substrate (Fig. 20, Element 30; ¶ [0151]) having a first surface and a second surface disposed oppositely; a plurality of light emitting diodes (Fig. 20, Element 21; ¶ [0132]) disposed on the first surface; a protective layer (Fig. 20, Element 35; ¶ [0132]) disposed at least on the first surface, wherein the protective layer covers the plurality of light emitting diodes, and a material of the protective layer is selected from a Parylene or an acrylic acid system (¶ [0174]). Regarding claim 17, Goto teaches the display device comprising at least two micro light emitting diode display panels, and the at least two micro light emitting diode display panels disposed in a spliced manner (Fig. 1). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2-6, 8-9, 11-13, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Goto (US 2021/0351328) in view of Sasaki (US 2017/0096538). Regarding claim 2, Goto teaches the limitations of independent claim 1 discussed earlier. Goto also teaches the driving circuit substrate comprising a side surface, wherein the side surface is disposed between the first surface and the second surface, and the side surface is connected to the first surface and the second surface respectively. However, Goto fails to exemplify the protective layer continuously disposed on the first surface and the side surface. Sasaki teaches an electronic device comprising a protective layer (Fig. 7, Element 24; ¶ [0083]) continuously disposed on the first surface and the side surface of a substrate (Fig. 7, Element 14; ¶ [0077]) for reducing transmission of oxygen and water vapor (¶ [0083]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the display panel of Goto with the protective layer taught by Sasaki for reducing transmission of oxygen and water vapor. Regarding claim 3, Goto teaches a thickness of the protective layer being less than or equal to 50 microns (¶ [0181]). Regarding claim 4, Goto teaches the limitations of independent claim 1 discussed earlier. Goto also teaches a hydrophobic layer (Fig. 20, Element 39; ¶ [0161], [0323]; e.g., silicone) at least partially disposed on a surface of the protective layer; wherein the driving circuit substrate comprises a side surface, the side surface is disposed between the first surface and the second surface, and the side surface is connected to the first surface and the second surface respectively. However, Goto fails to exemplify the hydrophobic layer covering the first surface and the side surface. Sasaki teaches a hydrophobic layer (Fig. 7, Element 24; ¶ [0083]) covering the first surface and the side surface of the substrate for reducing transmission of oxygen and water vapor (¶ [0083]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the display panel of Goto with the hydrophobic layer taught by Sasaki for reducing transmission of oxygen and water vapor. Regarding claim 5, Sasaki teaches a thickness of the hydrophobic layer being greater than or equal to 0.05 microns and less than or equal to 5 microns (¶ [0159]). Same motivation applies as for claim 4 earlier. Regarding claim 6, Sasaki teaches an inorganic packaging layer (Fig. 7, Element 14; ¶ [0077]) disposed on a surface of the hydrophobic layer. Regarding claim 8, Sasaki teaches a hydrophobic layer (Fig. 7, Element 24; ¶ [0083]) covering the first surface and the side surface of the substrate for reducing transmission of oxygen and water vapor (¶ [0083]). Same motivation applies as for claim 4 earlier. Regarding claim 9, Sasaki teaches a hydrophobic layer (Fig. 7, Element 24; ¶ [0083]) covering the first surface and the side surface of the substrate for reducing transmission of oxygen and water vapor (¶ [0083]). Same motivation applies as for claim 4 earlier. Regarding claim 11, Sasaki teaches a thickness of the hydrophobic layer being greater than or equal to 0.5 microns and less than or equal to 2 microns (¶ [0159]). Same motivation applies as for claim 4 earlier. Regarding claim 12, Sasaki teaches the inorganic packaging layer continuously disposed on the first surface and the side surface (Fig. 7). Regarding claim 13, Sasaki teaches a thickness of an inorganic packaging layer greater than or equal to 0.1 microns and less than or equal to 0.2 microns (¶ [0159]). Regarding claim 18, Goto teaches the limitations of independent claim 16 discussed earlier. Goto also teaches the driving circuit substrate comprising a side surface, wherein the side surface is disposed between the first surface and the second surface, and the side surface is connected to the first surface and the second surface respectively. However, Goto fails to exemplify the protective layer continuously disposed on the first surface and the side surface. Sasaki teaches an electronic device comprising a protective layer (Fig. 7, Element 24; ¶ [0083]) continuously disposed on the first surface and the side surface of a substrate (Fig. 7, Element 14; ¶ [0077]) for reducing transmission of oxygen and water vapor (¶ [0083]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the display panel of Goto with the protective layer taught by Sasaki for reducing transmission of oxygen and water vapor. Regarding claim 19, Goto teaches the limitations of independent claim 16 discussed earlier. Goto also teaches a hydrophobic layer (Fig. 20, Element 39; ¶ [0161], [0323]; e.g., silicone) at least partially disposed on a surface of the protective layer; wherein the driving circuit substrate comprises a side surface, the side surface is disposed between the first surface and the second surface, and the side surface is connected to the first surface and the second surface respectively. However, Goto fails to exemplify the hydrophobic layer covering the first surface and the side surface. Sasaki teaches a hydrophobic layer (Fig. 7, Element 24; ¶ [0083]) covering the first surface and the side surface of the substrate for reducing transmission of oxygen and water vapor (¶ [0083]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to provide the display panel of Goto with the hydrophobic layer taught by Sasaki for reducing transmission of oxygen and water vapor. Regarding claim 20, Sasaki teaches an inorganic packaging layer (Fig. 7, Element 14; ¶ [0077]) disposed on a surface of the hydrophobic layer. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Tsukada (US 2022/0243901) teaches an LED lighting sheet for animal/plant growth. Huang (US 2021/0210470) teaches an electronic device with a protective layer having a Young’s modulus less than or equal to 20 MPa. Choi (US 2019/0189863) teaches a wavelength-converting film for a semiconductor light emitting apparatus. Ota (US 2019/0055467) teaches an electronic device with a protective sheet having a multilayer structure. Engl (US 2013/0313604) teaches a semiconductor component with an encapsulation layer applied to the semiconductor chip. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kevin Quarterman whose telephone number is (571)272-2461. The examiner can normally be reached Monday-Friday, 10am-6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Greece can be reached at (571) 272-3711. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Kevin Quarterman/Primary Examiner, Art Unit 2875 22 September 2026
Read full office action

Prosecution Timeline

Dec 28, 2023
Application Filed
Sep 24, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
94%
With Interview (+11.5%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 882 resolved cases by this examiner. Grant probability derived from career allowance rate.

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