Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 9/1/2026 have been fully considered but they are not persuasive.
Applicant argues, “[t]he Office Action does not identify which specific limitations fall within which enumerated grouping. Instead, the Office Action lists nearly every step of the claims without explaining how each limitation falls within the ‘mental processes’ or ‘mathematical concepts’ groupings.” Remarks 12. The listed limitations of the abstract idea fall into both categories of mental concept and mathematical relationship. By finding the elements in the abstract idea, the office action found that the element were also mental concepts and mathematical relationships.
Applicant argues, that “the multiplicity limitations of claim 1 are recited functionally… [and that] No mathematical formula, equation or calculation is set forth in the claim.” Remarks 12-13. The claims recite “calculating a first multiplicity… calculating a second multiplicity…” Claim 1. The elements are a mental concept and mathematical relationship.
Applicant argues,
The specification provides sufficient detail such that one of ordinary skill in the art would recognize the claimed invention as providing an improvement. The specification explains that "[a]n advantage of calculating the multiplicity may accordingly be that a rejection-free MCMC process may be used instead of a rejection-based MCMC process, thus cutting down on repetition of samples and processing time while preserving the information related to local extrema." As- Filed Specification, paragraph [0017]. The specification further explains that "[t]he multiplicity allows for detection of local minima or maxima by determining where the multiplicity is high. This allows a computing system to more efficiently form an accurate estimate of the state space. This may thus improve the functioning of a computing device configured to perform MCMC processes." Id. Additionally, the specification discloses that "the embodiments of the present disclosure may be used to implement a Digital Sampler that is computationally more efficient than both ordinary MCMC trials and a digital annealer functioning as a sampler." As-Filed Specification, paragraph [0018]. The specification also explains that "the DRAM block 140 may transfer the multiplicity data from the MCMC block 130 to DRAM to preserve information about one or more intermediate states of the replicas, which may be less computationally expensive than determining the end states of the replicas via Digital Annealing." As-Filed Specification, paragraph [0037].
Remarks 14
Ex parte DESJARDINS Appeal 2024-000567 stated “We are persuaded that constitutes an improvement to how the machine learning model itself operates, and not, for example, the identified mathematical calculation.” P. 9. This is not an improvement to computer functionality because the claims only use a generic computer to execute and allegedly improved algorithm. There is no machine learning training in this application. The specification states that the algorithm is allegedly “computationally more efficient…” However, there is an accuracy penalty for rejection-free MCMC process. Therefore, the claimed method doesn’t improve a computer, it is not an improved training algorithm, and it doesn’t improve on more accurate models – it just skips a step needed for removing bias from the data.
Applicant argues,
The Examiner has alleged that "obtaining replicas and writing to memory are mere data gathering which is insignificant extra solution activity." Applicant respectfully disagrees. The memory-writing limitations are not antecedent data gathering. Rather, they capture intermediate states that are the very mechanism by which the representation of the system and the end-state representation are generated. The claims recite writing replicas to specific states of memory as part of the claimed sequence, not as pre- or post-solution activity.
Remarks 15
The office action found that those steps were “insignificant extra solution activity”. The timing of insignificant extra solution activity is not at issue. The issue is that data gathering and storing is not significant and it is outside of the solution activity. The intermediate values could just as well be written down or remembered. Using a computer to store the data is, therefore, insignificant extra solution activity.
Applicant argues that the claims are similar to Example 48 of the USPTO Subject Matter Eligibility. The difference is that example 48 is actually applied to something, i.e. speech separation. The current claims are completely abstracted from any application, and the extra limitations that aren’t abstract are directed to generic computer parts and insignificant extra solution activity.
Applicant argues, “the claims may amount to significantly more than an abstract idea if the claims are organized in a ‘non-conventional and non-generic arrangement of known, conventional pieces.’ BASCOM Global Internet Servs. V. AT&T Mobility LLC, 827 F.3d 1341, 1350 (Fed. Cir. 2016); see also, e.g., DDR Holdings, LLC V. Hotels.com, L.P., 773 F.3d 1245, 1257-59 (Fed. Cir. 2014); Amdocs (Isr.) Ltd. V. Openet Telecom, Inc., 841 F.3d 1288, 1300 (Fed. Cir. 2016).” There is no unconventional hardware arrangement in this application.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea of a mental concept and mathematical relationship without significantly more. The claims recite the mental concept and mathematical relationship of:
1. A method comprising:
…a plurality of replicas, wherein each replica of the plurality of replicas includes a plurality of bits that represent a respective estimated state of a system;
assigning each respective replica of the plurality of replicas to a different corresponding temperature of a first set of temperatures;
identifying a first replica having a first temperature lower than any other temperature in the first set of temperatures;
…performing a first Markov Chain Monte Carlo (MCMC) trial on each respective replica of the plurality of replicas in which a random respective bit of the plurality of bits that represents a change in the state of the system is flipped in each respective replica of the plurality of replicas, wherein flipping the random bit affects a change in the corresponding temperature of the respective replica;
identifying a second replica having a second temperature lower than any other temperature in a second set of temperatures, the second set of temperatures including the temperatures corresponding to each of the respective replicas after performing the first MCMC trial;
writing the second replica to a second state of the memory;
generating a representation of the system based on the first state of the memory including the first replica and the second state of the memory including the second replica;
calculating a first multiplicity of the first replica representing an estimation of a first quantity of MCMC trials which would result in rejection if performed on the first replica at the first temperature;
calculating a second multiplicity of the second replica representing an estimation of a second quantity of MCMC trials which would result in rejection if performed on the second replica at the second temperature;
applying the first multiplicity and the second multiplicity to the representation of the system;
performing parallel swapping with respect to the plurality of replicas by swapping adjacent temperatures of the first set of temperatures and the second set of temperatures;
performing a second MCMC trial on each respective replica of the plurality of replicas based on the second set of temperatures; and
generating a representation of an end state of the system based on the first replica, the second replica, the first multiplicity, and the second multiplicity.
2. The method of claim 1, wherein the first MCMC trial and the second MCMC trial are each performed as rejection-free trials.
3. The method of claim 1, wherein writing the first replica to the first state of memory occurs concurrently with performing the first MCMC trial on each respective replica of the plurality of replicas.
4. The method of claim 1, wherein the first MCMC trial and the second MCMC trial each include generating a random number for use by a first neuron in a replica of the plurality of replicas in the first MCMC trial and providing the random number to a second neuron in the replica of the plurality of replicas for use in the second MCMC trial.
5. The method of claim 4, wherein calculating the first multiplicity and the second multiplicity is based on the random number used in the first MCMC trial and the second MCMC trial.
6. The method of claim 1, wherein calculating the first multiplicity comprises:
identifying one or more bits associated with a replica of the plurality of replicas as flag bits;
summing the flag bits;
calculating the first multiplicity using the sum of the flag bits.
7. The method of claim 1, wherein calculating the first multiplicity comprises:
determining a minimum energy difference based on potential changes in energy with respect to respective bit flips corresponding to each replica of the plurality of replicas;
identifying one or more bits associated with the replica corresponding to the minimum energy difference as flag bits;
summing the flag bits;
determining an offset value corresponding to the minimum energy difference; and
calculating the first multiplicity using the sum of the flag bits and the offset value.
Claims 8-20 have similar subject matter to claims 1-7, and are likewise rejected. This judicial exception is not integrated into a practical application because the additional claim elements of “obtaining a plurality of replicas… writing the first replica to a first state of a memory;…[and] writing the second replica to a second state of the memory;” are mere data gathering which is insignificant extra solution activity. MPEP 2106.05(g). The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception because the additional elements of a processor and memory are generic computer parts. MPEP 2106.05(h).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/AUSTIN HICKS/Primary Examiner, Art Unit 2142
