Prosecution Insights
Last updated: August 18, 2026
Application No. 18/400,022

PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE

Final Rejection §103
Filed
Dec 29, 2023
Priority
Jul 01, 2021 — continuation of PCTCN2021103976
Examiner
GANI, OBAIDUL NMN
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Huawei Technologies Co., Ltd.
OA Round
2 (Final)
100%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
2 granted / 2 resolved
+32.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
12 currently pending
Career history
8
Total Applications
across all art units

Statute-Specific Performance

§103
72.7%
+32.7% vs TC avg
§102
27.3%
-12.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 2 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment/ Argument The amendment filed June 5th 2026 - has been entered in this application. Modifications to the drawings are received & Objection to the drawings were removed in this office action. Additional Claims 16-20 were received, and carefully examined by using a new art of reference, examination details for Claim 16-20 are provided below. Applicant’s amendments to the Drawings, and Claims have overcome each and every objection previously set forth in the Non-Final Office Action. However, new Claim 16-20 were examined with a new prior art of reference. Claims 1-15 are Allowable after careful consideration of the amendment filed by the applicant on June 5th 2026. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 16 through 20 - are rejected under 35 U.S.C. 103 as being unpatentable over Chen [US20180177056] in view of Kariya et.al., [US 20070134910], and further in view of Dutta [US 7975378 B1, Patent No- 7975378 B1]: Regrading Claim-16, Chen discloses that a printed circuit board (in Fig.-3), comprising: a core board and a substrate (Fig. 3, Item- 101) - wherein the core board covers (Fig. 3, Item- 103, 104, 1021) and is disposed on one of two opposing outer surfaces of the substrate (Fig. 3, Item-101); and the core board comprises: a first conductive layer, located on a side that is of the core board and that is away from the substrate (Fig. 3, Item-104); a second conductive layer (Fig. 3, Item- 1021), located on a side that is of the core board and that is close to the substrate; and a first dielectric layer, located between the first conductive layer and the second conductive layer and comprising a flexible dielectric layer (Fig. 3, Item- 103). Chen does not disclose that the first dielectric layer that further comprises prepreg layers that cover and are disposed on an upper surface and a lower surface of the flexible dielectric layer, and the first dielectric layer is formed through hybrid lamination on the flexible dielectric layer and the prepreg layers, However, Dutta – discloses that the first dielectric layer that further comprises prepreg layers that cover and are disposed on an upper surface and a lower surface of the flexible dielectric layer (Fig.1, Item- 105 and 125), and the first dielectric layer is formed through hybrid lamination on the flexible dielectric layer and the prepreg layers, wherein the prepeg layers include a prepeg (Fig.1, Item-130) that partially or completely covers the upper surface of the flexible dielectric layer and the prepeg (Fig.1, Item-130) layers include a prepeg that partially or completely covers the lower surface of the flexible dielectric layer, and the flexible dielectric layer is closely connected to both the first conductive layer and the second conductive layer by using the prepreg layers (Fig.1, Item-130). It would have been obvious to one skilled in the art at the time of the invention using a prepreg between layers on both sides of a dielectric layer for better support and insulating properties.. Chen- does not disclose having a flexible dielectric layer, wherein a Young's modulus of the flexible dielectric layer is less than or equal to a preset Young's modulus, wherein the preset Young's modulus is less than or equal to 15 GPa. However, Kariya et. al. discloses having a flexible dielectric layer, wherein a Young's modulus of the flexible dielectric layer is less than or equal to a preset Young's modulus, wherein the preset Young's modulus is less than or equal to 15 GPa (Kariya, Paragraph 30). It would have been obvious to one skilled in the art at the time of the invention having a flexible dielectric layer, wherein a Young's modulus of the flexible dielectric layer is less than or equal to a preset Young's modulus, wherein the preset Young's modulus is less than or equal to 15 GPa as shown Kariya et. al. -with the circuit board of Chen, since this is commonly done so as to provide certain flexibility to the circuit board to help prevent damage from bending. Note the limitation ” the first dielectric layer is formed through hybrid lamination on the flexible dielectric layer “ is not given patentable weight since the method of making the device is not germane to the patentability of the device its self. PNG media_image1.png 719 1153 media_image1.png Greyscale Regarding Claim-18, Chen- does not disclose that the core board also covers and is disposed on the other outer surface of the two opposing outer surfaces of the substrate. However, Dutta- discloses that the core board also covers and is disposed on the other outer surface of the two opposing outer surfaces of the substrate (Fig. 1, Item- 140 & Item-100). Regarding Claim-19, Chen- does not disclose that the prepreg of the prepreg layers is an FR4 prepreg. However, Dutta- discloses that the prepreg of the prepreg layers is an FR4 prepreg [Fig. 6(B) and Fig.7(B)]. It would have been obvious to one skilled in the art at the time of the invention to use the prepreg layers is an FR4 prepreg as shown by Dutta since this material is commonly used for its durability. Claim-20 – is rejected under 35 U.S.C. 103 as being unpatentable over Chen [US20180177056] in view of Kariya et.al., US 20070134910 as detailed in Claim-1 rejection in the previous office action (NFR), and further in view of YANG [US 12041717 B2]. Regarding Claim-20, modified Chen- does not disclose that- wherein a pad is disposed at the first conductive layer, and the flexible dielectric layer is disposed at a position that corresponds to the pad and is at the first dielectric layer. However, Yang- discloses that wherein a pad is disposed at the first conductive layer, and the flexible dielectric layer is disposed at a position that corresponds to the pad and is at the first dielectric layer [Fig. 2B, 230]. It would have been obvious to one skilled in the art at the time of the invention to use a pad that is disposed at the first conductive layer, and the flexible dielectric layer is disposed at a position that corresponds to the pad and is at the first dielectric layer as shown by Yang, with the circuit board of modified Chen. This is commonly done to allow the flexible circuit board to be electrically attached to an external component. Allowable Subject Matter Claim-17 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to OBAIDUL GANI whose telephone number is (571)272-8665. The examiner can normally be reached Mon-Fri: 7:30 - 5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /OBAIDUL GANI/ Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/ Supervisory Patent Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Dec 29, 2023
Application Filed
Mar 10, 2026
Non-Final Rejection mailed — §103
Jun 05, 2026
Response Filed
Jul 23, 2026
Final Rejection mailed — §103 (current)

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
2y 2m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 2 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month