DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to amendments filed on February 26, 2026.
Claims 1-3, 10-11, 13-14 have been amended.
Claims 1-20 are pending.
Response to Arguments
The objection has been withdrawn as the claims have been amended.
Applicant's arguments filed February 26, 2026 have been fully considered but they are not persuasive.
Regarding the rejection of Claim 5 under 35 U.S.C. 112(b), Applicant argues that Claim 5 is definite. Examiner respectfully disagrees. In reading the limitations of Claim 5 as a whole, Claim 5 recites “the controller writes a value into the end memory address as the lock data” and “the controller further reads the ciphertext and the lock data being the value from the encrypted memory address”. With regards to the value, there is an inconsistency with how the value is referred to as being initially stored in the end memory address and then later referred to as “the value from the encrypted memory address”. While it is true that the encrypted memory address is recited to comprise the end memory address previously in Claim 2, this recitation is still ambiguous as the encrypted memory address additionally comprises a start memory address which may possibly contain a value, and for the sake of clarity, it is recommended by the Examiner to consistently refer to this value as being from the end memory address.
Applicant argues that reference Lyakhovitskiy does not teach some aspects of the newly amended limitations on pages 14-17 of Remarks. Examiner respectfully disagrees, and argues that Lyakhovitskiy teaches the claimed limitations in combination with new prior art reference Kuo as argued below.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5-8, 10-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites the limitation “the value from the encrypted memory address” in lines 4-5 of Claim 5. There is insufficient antecedent basis for this limitation in the claim. Claim 5 recites writing a value into an end memory address and a predetermined value, but it is not clear whether “the value from the encrypted memory address” is meant to refer to a previous value or is a new value altogether, since the associated memory addresses are not consistently referred to, rendering the claim indefinite.
Claims 6-8 are rejected for the same reasons as above by virtue of depending upon Claim 5.
Claim 10 recites the limitation “enabling the first register using a write lock enable signal, wherein the first register is configured to store the write lock”. There is insufficient antecedent basis for this limitation in the claim. First, Claim 10 does not previously recite a “first register” or any register, making it unclear as to what is being referred to, rendering the claim indefinite. Second, the first register is recited to store “the write lock”, but “a write lock” is only introduced in the following line after. It is therefore recommended by the Examiner to amend the claim such that it initially recites “a first register” and such that “a write lock” is recited before iterations of “the write lock”.
Claims 11-20 are rejected for the same reasons as above by virtue of depending upon Claim 10.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 10 are rejected under 35 U.S.C. 103 as being unpatentable over Lyakhovitskiy et al. (U.S. Pub. No. 2013/0067242 A1) hereinafter referred to as “Lyakhovitskiy”, and in view of Kuo et al. (U.S. Pub. No. 2009/0089526 A1) hereinafter referred to as “Kuo”.
Regarding Claim 1:
Lyakhovitskiy teaches the following limitations:
An encryption device, comprising: a memory array, configured to store lock data [key] (Par. [0024], Par. [0025], Par. [0035], Par. [0053], Par. [0054], Par. [0055], Par. [0056]). Lyakhovitskiy teaches a system with a self-encrypting drive which contains memory, and this self-encrypting drive an assigned key for changing the lock status of the drive.
and a memory control device, determining whether the lock data is equal to a predetermined value according to an operation instruction [authenticate using key] (Par. [0024], Par. [0025], Par. [0035], Par. [0036], Par. [0053], Par. [0054], Par. [0055], Par. [0056]). Lyakhovitskiy teaches this system including processing units which authenticate a preset key, i.e. match predetermined value, in order to allow writes to the drive.
wherein when the memory control device determines that the lock data is equal to the predetermined value, the memory control device performs a logic operation on write data and an output key to generate encrypted write data [encrypt write data] (Par. [0035], Par. [0036], Par. [0053], Par. [0054], Par. [0055], Par. [0056]). Lyakhovitskiy teaches handling write requests by encrypting data according to the drive being unlocked after authentication.
and writes the encrypted write data to the memory array as ciphertext (Par. [0035], Par. [0036], Par. [0053], Par. [0054], Par. [0055], Par. [0056]).
wherein the memory control device comprises: a (Par. [0044], Par. [0053], Par. [0054]). Lyakhovitskiy teaches a write lock flag.
and a controller, determining whether the lock data is equal to the predetermined value (Par. [0022], Par. [0044], Par. [0053], Par. [0054], Par. [0056]). Lyakhovitskiy teaches the operating system, i.e. as part of the hardware device, using authentication in matching the predetermined value, and this hardware can be considered a controller under the broadest reasonable interpretation.
wherein when the lock data is equal to the predetermined value, the controller enables the (Par. [0044], Par. [0053], Par. [0054]). Lyakhovitskiy teaches there being both a write lock enable field which can be signaled with True/False, and additionally setting the write lock to True/False depending on needing to lock/unlock the device. Kuo teaches the following limitation:
first register [security register] (Par. [0021]). Kuo teaches that a security register can be used to store a write lock-down bit which can be used to prevent undesired modifications to a write-protect bit. This is akin to the write lock enable and write lock as argued in Lyakhovitskiy above.
Lyakhovitskiy teaches write/read locking a device for encrypted data but does not teach explicitly a first register. Kuo however teaches that a security register can be used store a write lock-down bit (Par. [0021]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the write/read lock system of Lyakhovitskiy with the security register of Kuo in order to gain the predictable result of a first register being used to store a write lock. One of ordinary skill in the art would have recognized that the security register of Kuo is compatible with the system of Lyakhovitskiy as both are directed towards write lock and enable bits, and that using such a register to store a write lock would have been a predictable implementation of storing such a bit.
Regarding Claim 10:
Lyakhovitskiy teaches the following limitations:
An operation method adapted to an encryption device, wherein the encryption device comprises a memory array and the memory array stores lock data (Par. [0024], Par. [0025], Par. [0035], Par. [0053], Par. [0054], Par. [0055], Par. [0056]).
wherein the operation method comprises: determining whether lock data is equal to a predetermined value (Par. [0024], Par. [0025], Par. [0035], Par. [0036], Par. [0053], Par. [0054], Par. [0055], Par. [0056]).
enabling the first register using a write lock enable signal (Par. [0044], Par. [0053], Par. [0054]). wherein the (Par. [0044], Par. [0053], Par. [0054]).
when it is determined that the lock data is equal to the predetermined value, setting a write lock to an unlocked state using a write lock input signal (Par. [0035], Par. [0036], Par. [0044], Par. [0053], Par. [0054], Par. [0055], Par. [0056]). Lyakhovitskiy teaches setting the write status of the drive to be unlocked after authentication.
when the write lock is in the unlocked state, encrypting write data with an output key to generate encrypted write data (Par. [0035], Par. [0036], Par. [0053], Par. [0054], Par. [0055], Par. [0056]). Lyakhovitskiy teaches that write data is written and encrypted if the drive is in an unlocked state.
and writing the encrypted write data into the memory array (Par. [0035], Par. [0036], Par. [0053], Par. [0054], Par. [0055], Par. [0056]).
Kuo teaches the following limitation:
first register [security register] (Par. [0021]).
Lyakhovitskiy teaches write/read locking a device for encrypted data but does not teach explicitly a first register. Kuo however teaches that a security register can be used store a write lock-down bit (Par. [0021]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the write/read lock system of Lyakhovitskiy with the security register of Kuo in order to gain the predictable result of a first register being used to store a write lock. One of ordinary skill in the art would have recognized that the security register of Kuo is compatible with the system of Lyakhovitskiy as both are directed towards write lock and enable bits, and that using such a register to store a write lock would have been a predictable implementation of storing such a bit.
Claims 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Lyakhovitskiy/Kuo as applied to claim 10 above, and further in view of Durham et al. (U.S. Pub. No. 2011/0154059 A1) hereinafter referred to as “Durham”.
Regarding Claim 11:
Lyakhovitskiy teaches the following limitations:
executing a setting method comprising setting an encrypted memory address (Par. [0035], Par. [0036], Par. [0053], Par. [0054], Par. [0055], Par. [0056]). Lyakhovitskiy teaches setting memory address ranges in which encrypted data is to be read/written.
executing a comparison method comprising comparing the lock data (Par. [0024], Par. [0025], Par. [0035], Par. [0036], Par. [0053], Par. [0054], Par. [0055], Par. [0056])
(taught by Durham below)
(taught by Durham below)
executing a writing method comprising performing a write operation on the memory array (Par. [0036], Par. [0040], Par. [0044]).
executing a reading method performing a read operation on the memory array (Par. [0036], Par. [0040], Par. [0044]).
wherein before the writing method is executed, the setting method and the comparison method must be sequentially executed at least once (Par. [0035], Par. [0036], Par. [0053], Par. [0054], Par. [0055], Par. [0056]). Lyakhovitskiy teaches establishing the locking range and authenticating for unlocking the range in sequential order before writing data.
(taught by Durham below)
Durham teaches the following limitations:
executing a programming method comprising programming a message authentication code of the encrypted memory address (Par. [0026], Par. [0027], Par. [0037], Par. [0045]). Durham teaches using a message authentication code for integrity checking.
executing a verification method comprising verifying the message authentication code (Par. [0026], Par. [0027], Par. [0034], Par. [0037], Par. [0045], Par. [0046]). Durham teaches using this message authentication code for read data and verifying the integrity of data. Durham further teaches this integrity checking can be flexibly configured to occur whenever desired.
wherein before the reading method is executed, the setting method, the programming method, and the verification method must be sequentially executed at least once (Par. [0026], Par. [0027], Par. [0034], Par. [0037], Par. [0045], Par. [0046]). As Durham used message authentication codes for reads and integrity checking for read data, this suggests occurring sequentially before the reading method.
Lyakhovitskiy/Kuo teaches write/read locking a device for encrypted data but does not teach using message authentication codes. Durham however teaches that using message authentication codes can be used to improve security by checking the integrity of read data (Par. [0025], Par. [0046]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the write/read lock system of Lyakhovitskiy/Kuo with the message authentication code of Durham in order to gain the benefit of additional security. One of ordinary skill in the art would have recognized that the message authentication code of Durham is compatible with the system of Lyakhovitskiy/Kuo as both are directed towards reading and writing from memory, and that such message authentication codes provide additional security by integrity checking against attacks.
Regarding Claim 12:
Lyakhovitskiy teaches the following limitations:
wherein the setting method further comprises: setting the encrypted memory address, a key, (Par. [0044], Par. [0052], Par. [0053], Par. [0054]). Lyakhovitskiy teaches assigning various information for creating and activating a protected locking range.
through a bus interface (taught by Durham below)
wherein the key, (Par. [0044], Par. [0052], Par. [0053], Par. [0054]). This information corresponds to the locking range in question.
wherein the encrypted memory address comprises a starting memory address, an end memory address (Par. [0044]). Lyakhovitskiy teaches locking ranges containing a field for a start and length of the memory address range. This suggests a starting and ending memory address.
(taught by Durham below)
and setting the write lock and a key lock corresponding to the encrypted memory address to a locked state (Par. [0035], Par. [0053], Par. [0054], Par. [0055], Par. [0056]). Lyakhovitskiy teaches activating locking of the range upon creation.
Durham teaches the following limitations:
a random number (Par. [0028]). Durham teaches storing a random number as part of using a message authentication code for integrity checking.
through a bus interface (Par. [0025]). Durham teaches memory controllers using an address/data bus for communication.
and a message authentication code memory address (Par. [0025], Par. [0027]). Durham teaches using a separate register for storing message authentication codes, i.e. a memory address.
The reasons for motivation/combination of references remain the same as in Claim 11.
Allowable Subject Matter
Claims 2-4, 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 5-8, 13-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Related Art
The following prior art made of record and cited on PTO-892, but not relied upon, is considered pertinent to applicant’s disclosure:
Kershaw et al. (U.S. Pub. No. 2008/0046762 A1) – Includes methods regarding register protection
Shin et al. (U.S. Pub. No. 2015/0350206 A1) – Includes methods regarding write protection
Chambers et al. (U.S. Pub. No. 2010/0077230 A1) – Includes methods regarding memory protection
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/E.V.V./Examiner, Art Unit 2431 /SHIN-HON (ERIC) CHEN/Primary Examiner, Art Unit 2431
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