DETAILED ACTION
1. Applicant’s Amendment filed 05/21/2026 has been reviewed and placed of record in the file.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
2. Claims 20-21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hata et al. U.S. Patent Application Publication 2005/0023670 A1 (the ‘670 reference).
The reference discloses in Figs. 1-2, para [76] (paragraph(s) [0076]) and other text a semiconductor package as claimed.
Referring to claim 20, the ‘670 reference discloses a semiconductor package, comprising:
a leadframe comprising a die carrier (not labeled) and at least one first lead (13) connected with the die carrier;
a semiconductor transistor die (16) connected with the die carrier and comprising a first surface (lower surface) and a second surface (upper surface) opposite to the first surface, a source pad (bump electrode 17 that is connected to source electrode plate 9) disposed on the first surface, and a drain pad (not depicted pad that is connected to drain electrode plate 13, para [74, 76]) disposed on the second surface, wherein the first surface (the lower surface) faces a bottom side of the semiconductor package and the second surface (the upper surface) faces a top side of the semiconductor package; and
a clip (source electrode 9),
wherein the clip (9) is substantially planar (as clearly depicted in Fig. 1), and
wherein the source pad (the bump electrode 17 that is connected to source electrode plate 9) is connected with the clip (9) by at least one electrical connector (conductive adhesive 18).
Referring to claim 21 and using the same reference characters, interpretations, and citations as detailed above for claim 20 where applicable, the reference discloses a semiconductor package, comprising:
a leadframe comprising a die carrier and at least one first lead (13) connected with the die carrier;
a semiconductor transistor die (16) connected with the die carrier and comprising a first surface and a second surface opposite to the first surface, a source pad (17) disposed on the first surface, and a drain pad (not depicted) disposed on the second surface, wherein the first surface faces a bottom side of the semiconductor package and the second surface faces a top side of the semiconductor package;
a clip (9); and
an encapsulant (sealing member 2, para [73]) at least partially covering the die carrier, the semiconductor die, and the clip,
wherein the source pad (17) is connected with the clip (9) by at least one electrical connector (18), and
wherein a bottom surface of the clip (9) is exposed from a bottom surface (3, para [73]) of the encapsulant (2) at the bottom side of the semiconductor package.
Conclusion
3. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
4. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TU TU V HO whose telephone number is (571)272-1778. The examiner can normally be reached on Monday to Thursday 6:30 - 15:00, Monday through Thursday.
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07-19-2026
/TU-TU V HO/Primary Examiner, Art Unit 2818
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