DETAILED ACTION
This Office action for U.S. Patent Application No. 18/402,017 is responsive to communications filed 25 November 2025, in reply to the Non-Final Rejection of 29 August 2025.
Claims 1–10 are pending, of which claim 10 is new.
In the previous Office action, claims 1–7 and 9 were rejected under 35 U.S.C. § 102(a)(1) as anticipated by U.S. Patent Application Publication No. 2022/0174230 A1 (“Kim”). Claim 8 was rejected under 35 U.S.C. § 103 as obvious over Kim in view of EP 3,203,726 A1 (“Ono”).
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see p. 7, filed 25 November 2025, with respect to the rejection of claim 1 under 35 U.S.C. § 102 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. Specifically, the examiner finds that in Kim, the current control circuit does not necessarily adjust the ramp signal before a first reference signal generation period immediately after a sampling period so that voltage approaches a second voltage at a second reference signal generation period. However, upon further consideration, a new ground of rejection is made in view of US 2016/0330387 A1 (“Hwang”). As will be shown in more detail below, Hwang suppresses ramp ground bouncing, which appears to be the function of the claimed analog voltage adjustment. Also, claim 1 is rejected under 35 U.S.C. § 112(b) for a latent self-contradiction among the timing of various voltage generations.
Applicant’s arguments, see pp. 8–12, with respect to claim 2 are persuasive. The rejections of claims 2–4 under 35 U.S.C. § 102(a)(1) are withdrawn.
Claim Rejections - 35 U.S.C. § 112
The following is a quotation of 35 U.S.C. § 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1 and 9 are rejected under 35 U.S.C. § 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1 and 9 each recite that the voltage adjustment adjusts the analog voltage “before the timing of the first period such that a value of the first voltage nears a value of the second voltage”. However, the second voltage is generated “at the first timing of a second period that is the reference signal generation period after the first period”. Because the second voltage is compared with the first voltage before it is even created, the claims are self-contradictory and indefinite.
Claim Rejections - 35 U.S.C. § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. §§ 102 and 103 (or as subject to pre-AIA 35 U.S.C. §§ 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. § 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 5–7, and 9 are rejected under 35 U.S.C. § 103 as being unpatentable over U.S. Patent Application Publication No. 2022/0174230 A1 (“Kim”) in view of U.S. Patent Application Publication No. 2016/0330387 A1 (“Hwang”).
Kim, directed to an image sensor, teaches with respect to claim 1 an imaging device, comprising:
pixels disposed in a matrix shape having two or more rows and two or more columns (¶ 0059, pixel array comprising a plurality of rows and a plurality of columns of unit pixels);
a sampling circuit configured to sample an analog signal output from each of the pixels disposed in a multiple predetermined number of the columns in a sampling period (¶¶ 0088–90, correlated double sampling circuit 320);
a reference signal generation circuit configured to generate a reference signal having a voltage that gradually increases or decreases from a first timing by using an analog voltage in a reference signal generation period (¶¶ 0076–82, ramp signal generator 250 that generates reference current Iref; Fig. 16, time t23 or t27 where Vref ramp voltage starts decreasing);
a comparator configured to execute comparison processing of comparing a volage of the analog signal sampled by the sampling circuit with a voltage of the reference signal (¶¶ 0116–18, comparator 325 that compares a reference voltage to an analog pixel signal AS);
a measurement circuit configured to measure a length of a period from the first timing to a second timing at which the voltage of the analog signal and the voltage of the reference signal match each other (¶¶ 0123–28, counter 340 generates clock signal that indicates when the voltage levels of the ramp reference voltage and the image signal are the same; Fig. 16, times t24 and t28 where the comparator goes to a low voltage as the counter stops increasing; counter voltage increase is the same as ramp voltage decrease); and
a voltage adjustment circuit (¶ 0081, current control unit 275 adjusts the magnitude of the reference current),
wherein the sampling circuit is configured to sample the predetermined number of the analog signals in the sampling period (¶ 0090–91, sampling the analog pixel signals until the comparison signal transitions to a low level),
wherein the reference signal generation circuit is configured to generate the reference signal having a second voltage at the first timing of a second period that is the reference signal generation period after the first period (Fig. 16, ramp shape of reference voltage; time t29 when the reference voltage resets to high voltage after t25 when the reference voltage resets to high voltage), and . . .
wherein the comparator is configured to compare the voltage of each of the analog signals with the voltage of the reference signal changing from the first voltage so as to execute the comparison processing in the first period (Fig. 16, time t24) and
compare the voltage of each of the analog signals with the voltage of the reference signal changing from the second voltage so as to execute the comparison processing in the second period (id., time t28).
The claimed invention differs from Kim in the functionality of the voltage adjustment circuits. Specifcally, the claim recites that the voltage adjustment circuit adjusts the analog voltage provided to the reference signal generation circuit before the timing of the first period such that a value of the first voltage nears a value of the second voltage. The apparent impossibility of this adjustment before the second voltage is known or created aside, Kim Fig. 16 shows the base voltage levels of the reference voltage Vref at the same level at times t22, t25, and t29, but this constant level is assumed, not created by the current control unit 275. However, Hwang, directed to a ramp signal generator for an image sensor, teaches with respect to claim 1:
wherein the voltage adjustment circuit is configured to adjust the analog voltage provided to the reference signal generation circuit before the timing of the first period such that a value of the first voltage nears a value of the second voltage (¶ 0042, noise control unit 320 controls ramp ground bouncing, thus mitigating the irregular ramp voltage shown in Figs. 1 and 2).
It would have been obvious to one of ordinary skill in the art at the time of effective filing to incorporate the Hwang noise control unit into the Kim ramp generator, as taught by Hwang, in order to reduce noise in the images produced.
Regarding claim 5, Kim teaches the imaging device according to Claim 1,
wherein the voltage adjustment circuit is configured to adjust the analog voltage by consuming the same amount of current as an amount of current consumed by the measurement circuit before the first period (¶¶ 0078–82, adjusting magnitude of reference current; since resistor 260 has constant reference value R1, reference subsequently increases or decreases with current).
Regarding claim 6, Kim teaches the imaging device according to Claim 5,
wherein the voltage adjustment circuit and the reference signal generation circuit are connected in parallel to a voltage terminal to which the analog voltage is provided (Fig. 7, current amplification unit 280 controlled by current source unit 275, and current source 270, in parallel with resistor 260 to analog signal processing voltage).
Regarding claim 7, Kim teaches the imaging device according to Claim 1,
wherein the reference signal generation circuit is configured to output the reference signal having a third voltage in a third period,
wherein the third period is included in the sampling period and occurs before a period during which the voltage adjustment circuit adjusts the analog voltage, and
wherein a difference between the first voltage and the second voltage is less than a difference between the third voltage and the second voltage.
Regarding claim 9, Kim in view of Hwang teaches a signal-processing method, comprising:
a step in which a sampling circuit sampling circuit samples an analog signal output from each of pixels disposed in a multiple predetermined number of columns in a sampling period (Kim ¶¶ 0088–90, correlated double sampling circuit 320);
a step in which a reference signal generation circuit generates a reference signal having a voltage that gradually increases or decreases from a first timing by using an analog voltage in a reference signal generation period (¶¶ 0076–82, ramp signal generator 250 that generates reference current Iref; Fig. 16, time t23 or t27 where Vref ramp voltage starts decreasing);
a step in which a comparator executes comparison processing of a comparing a voltage of the analog signal sampled by the sampling circuit with a voltage of the reference signal (¶¶ 0116–18, comparator 325 that compares a reference voltage to an analog pixel signal AS);
a step in which a measurement circuit measures a length of a period from the first timing to a second timing at which the voltage of the analog signal and the voltage of the reference signal match each other (¶¶ 0123–28, counter 340 generates clock signal that indicates when the voltage levels of the ramp reference voltage and the image signal are the same; Fig. 16, times t24 and t28 where the comparator goes to a low voltage as the counter stops increasing; counter voltage increase is the same as ramp voltage decrease); and
a step in which a voltage adjustment circuit adjusts the analog voltage provided to the reference signal generation circuit (¶ 0081, current control unit 275 adjusts the magnitude of the reference current),
wherein the step of sampling the analog signal includes sampling the predetermined number of the analog signals in the sampling period (¶ 0090–91, sampling the analog pixel signals until the comparison signal transitions to a low level),
wherein the step of generating the reference signal includes generating the reference signal having a first voltage at the first timing of a first period that is the reference signal generation period immediately after the sampling period (Fig. 16, ramp shape of reference voltage; time t29 when the reference voltage resets to high voltage when the reference voltage resets to high voltage), and
includes generating the reference signal having a second voltage at the first timing of a second period that is the reference signal generation period after the first period (id., second ramp), . . . and
wherein the step of comparing the voltage of the analog signal with the voltage of the reference signal includes comparing the voltage of each of the analog signals with the voltage of the reference signal changing from the first voltage so as to execute the comparison processing in the first period (Fig. 16, time t24) and
comparing the voltage of each of the analog signals with the voltage of the reference signal changing from the second voltage so as to execute the comparison processing in the second period (id., time t28).
The claimed invention differs from Kim in the functionality of the analog voltage adjusting step. Specifcally, the claim recites that the analog voltage adjustment step adjusts the analog voltage provided to the reference signal generation circuit before the timing of the first period such that a value of the first voltage nears a value of the second voltage. The apparent impossibility of this adjustment before the second voltage is known or created aside, Kim Fig. 16 shows the base voltage levels of the reference voltage Vref at the same level at times t22, t25, and t29, but this constant level is assumed, not created by the current control unit 275. However, Hwang, directed to a ramp signal generator for an image sensor, teaches with respect to claim 1:
wherein the step of adjusting the voltage includes adjusting the analog voltage provided to the reference signal generation circuit before the timing of the first period such that a value of the first voltage nears a value of the second voltage (¶ 0042, noise control unit 320 controls ramp ground bouncing, thus mitigating the irregular ramp voltage shown in Figs. 1 and 2).
It would have been obvious to one of ordinary skill in the art at the time of effective filing to incorporate the Hwang noise control unit into the Kim ramp generator, as taught by Hwang, in order to reduce noise in the images produced.
Claim 8 is rejected under 35 U.S.C. § 103 as being unpatentable over Kim in view of Hwang and in view of EP 3,203,726 A1 (“Ono”)1.
Claim 8 is directed to the claim 1 device being disposed in a distal end of an endoscope. Kim does not specifically state an endoscope application for its image sensor. However, Ono, directed to an image sensor for an endoscope, teaches with respect to claim 8:
a scope to be inserted to a living body (¶ 0021, endoscope captures in-vivo images); and
the imaging device according to Claim 1 [claim 1 rejection supra],
wherein the imaging device is disposed in a distal end of the scope (¶ 0021, imaging unit is on distal end of insertion portion of endoscope).
It would have been obvious to one of ordinary skill in the art at the time of effective filing to place the Kim image sensor in an endoscope, as taught by Ono, in order to effectuate this utility of in-vivo imaging, as would be expected to one of ordinary skill in the art. Ono ¶ 0021. See M.P.E.P. § 2143(I)(A) (combining prior art elements according to known methods to yield predictable results obvious).
Allowable Subject Matter
Claims 2–4 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: claim 2 recites the voltage adjustment circuit selectively short circuits a reference signal generation circuit and a voltage terminal. Closest prior art Hwang operates on a different principle, either using an amplifier (Fig. 3) or comparator (Fig. 4) to suppress voltage bounce.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 2024/0323554 A1
US 2025/0350862 A1
US 2020/0260037 A1
US 2019/0124285 A1
US 2017/0195601 A1
US 2016/0301883 A1
US 2016/0028974 A1
US 2012/0006974 A1
US 2011/0019047 A1
US 2006/0012698 A1
US 2003/0214597 A1
The following prior art was found using an Artificial Intelligence assisted search using an internal AI tool that uses the classification of the application under the Cooperative Patent Classification (CPC) system, as well as from the specification, including the claims and abstract, of the application as contextual information. The documents are ranked from most to least relevant. Where possible, English-language equivalents are given, and redundant results within the same patent families are eliminated. See “New Artificial Intelligence Functionality in PE2E Search”, 1504 OG 359 (15 November 2022), “Automated Search Pilot Program”, 90 F.R. 48,161 (8 October 2025).
US 2025/0168529 A1
US 2023/0225600 A1
US 2018/0035868 A1
Any inquiry concerning this communication or earlier communications from the examiner should be directed to David N Werner whose telephone number is (571)272-9662. The examiner can normally be reached M--F 7:30--4:00 Central.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dave Czekaj can be reached at 571.272.7327. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/David N Werner/Primary Examiner, Art Unit 2487
1 Although this reference shares assignee Olympus Corp. with the present application, it was published in 2017, over one year before the earliest priority date of the present application of 23 January 2023.