DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3-5, 7-8, 10-11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2021/0036181 (Nitta).
For claim 1, Nitta teaches a method (fig. 1A-3D) of manufacturing a semiconductor optical element including a chip including a III-V compound semiconductor (fig. 1B, 10-14; [0026]); and a first substrate (fig. 1B, 20), wherein the chip includes a second substrate (fig. 1B, 10) and a semiconductor layer stacked on the second substrate (fig. 1B, 12-14),
wherein the method comprises:
bonding the semiconductor layer of the chip to the first substrate (fig. 1B; [0028]);
forming a mask on the chip bonded to the first substrate (fig. 3B, 22); and
removing the second substrate by performing etching on the chip provided with the mask (fig. 3C; [0034]),
wherein the mask has an opening (fig. 3B, either the opening containing the left triangular portion 11 or alternatively both openings containing both triangular portions 11),
wherein the second substrate is exposed from the opening (fig. 3B, 11),
wherein the opening does not have a side perpendicular to a first direction (fig. 3B, the opening does not have a side perpendicular to a first direction perpendicular to the hypotonus of triangular portion 11), and
wherein the etching in the removing the second substrate is more likely to progress in a second direction (fig. 3B, either into the image or horizontal in the image) intersecting with the first direction than in the first direction (see [0065] of the filed specification which discusses etch rates in various directions corresponding to those in Nitta).
For claim 3, Nitta teaches the opening of the mask is one opening (fig. 3B, either the opening containing the left triangular portion 11).
For claim 4, Nitta teaches a distance from an end portion of the opening (fig. 3B, lower left end of 11) to an end portion of the second substrate (portion of substrate 11 where a line segment perpendicular to the hypotonus of triangle 11 may be drawn to intersect with the right angle of triangle 11) in the first direction is 1/4 to two times a thickness of the second substrate (inherent based on the geometry of triangle 11 in 3B).
For claim 5, Nitta teaches the opening of the mask includes a plurality of openings (fig. 3B, both openings containing both triangular portions 11).
For claim 7, Nitta teaches the opening has a long axis (fig. 2C, vertical direction and fig. 3B into page) and a short axis (fig. 2C and 3B, horizontal direction), and wherein the long axis is inclined with respect to the second direction (fig. 3B, horizontal direction).
For claim 8, Nitta teaches the long axis has an inclination angle of 30º to 150º from the second direction (fig. 2C, vertical and horizontal axis).
For claim 10, Nitta teaches the second substrate includes indium phosphide ([0026]), wherein the semiconductor layer includes indium gallium arsenide ([0026]), and wherein, in the removing the second substrate, the second substrate is removed by wet etching using an etchant including hydrochloric acid ([0034]).
For claim 11, Nitta teaches the semiconductor layer includes a first semiconductor layer (fig. 1B, 12) and a second semiconductor layer (fig. 1B, 14),
wherein the second substrate (fig. 1B, 10), the first semiconductor layer (fig. 1B, 12), and the second semiconductor layer (fig. 1B, 14) are stacked in this order (fig. 1A and 1B), and
wherein, in the bonding, the second semiconductor layer is bonded to the first substrate (fig. 1B, 14 and 20), and
wherein the method comprises:
removing the first semiconductor layer after the removing the second substrate (fig. 3C, first layer 12 in region not covered by 22); and
etching the second semiconductor layer (fig. 3C, second layer 14 is etched in region not covered by 22 [0034]).
Allowable Subject Matter
Claims 2, 6, and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michael W Carter whose telephone number is (571)270-1872. The examiner can normally be reached M-F, 9:00-5:30.
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/Michael Carter/ Primary Examiner, Art Unit 2828
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