Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 4-5 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Liu (US 20230040780 A1), hereafter referred to as “Liu”.
Regarding claim 4, in the embodiment of Fig. 2, Liu discloses:
A power amplifier circuit (Fig. 2, Doherty power amplifier 200) comprising:
a first amplifier (carrier amplifier 206);
a second amplifier (peaking amplifier 208); and
an impedance inverter (differential inverter 209) configured to delay an output of the first amplifier by a time equivalent to 1/4 of a wavelength of a transmission line (differential inverter provides a phase shift of 90 degrees along the carrier amplifier path, it is known in the art that a quarter-wavelength of a transmission line is 90 electrical degrees, per paragraphs [0083]),
wherein the power amplifier circuit is configured to combine the output of the first amplifier delayed by the impedance inverter and an output of the second amplifier, and to output a combined output (combiner 226, configured to combine the phase-shifted amplified first portion with the amplified second portion to yield an amplified radio-frequency signal per paragraph [0094]),
wherein the first amplifier and the second amplifier each include a pair of amplifier elements that operate differentially (paragraph [0084], carrier amplifier 206 comprises of a first (positive) 212 and second (negative) 213 path and peaking amplifier 208 also operates as a push-pull amplifier having a positive 216 and negative 217 path per paragraph [0091], positive and negative inputs in an amplifier are known in the art to be differential),
wherein the impedance inverter comprises a plurality of unit circuits, each unit circuit comprising a pair of first elements corresponding to the pair of amplifier elements (inductance 214 shown as a pair in Fig. 2) and a second element (capacitors 221 and parasitic capacitance 224), the pair of first elements being one of a pair of inductors (inductance 214, as shown in Fig. 2) or capacitors and the second element being the other of the inductor and the capacitor (inductance 219 and parasitic capacitance 224 or capacitor 222),
wherein the plurality of unit circuits are cascade-connected to an output side of the first amplifier (inductor 214, 219, and capacitors 221, 224, 222 are shown to be cascade-connected),
wherein the pair of first elements of each unit circuit are connected in series to the pair of first elements of an adjacent unit circuit (as shown in Fig. 2), and
wherein the second element of each unit circuit is connected between a first end of a first of the pair of first elements of that unit circuit, and a first end of a second of the pair of first elements of that unit circuit (capacitors 221 and 224 are connect to the first end of inductances 214 and 219), each first end being the end of the first element that is closest to the first amplifier (carrier amplifier 206 is connected to the first ends of 214 and 219 with capacitors connected, as shown in Fig. 2).
Regarding claim 5, in the embodiment of Fig. 2, Liu discloses:
wherein the first amplifier and the second amplifier constitute a Doherty amplifier circuit (Fig. 2, Doherty amplifier 200), and
wherein the first amplifier is one of a carrier amplifier (CR_A of carrier amplifier 206, shown in Fig. 2) and a peak amplifier (PK_A of peaking amplifier 208) of the Doherty amplifier circuit, and the second amplifier is the other of the carrier amplifier (CR_B of carrier amplifier 206) and the peak amplifier (PK_B of of peaking amplifier 208) of the Doherty amplifier circuit.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MALANE LIENG whose telephone number is (571)272-5739. The examiner can normally be reached Monday-Friday 6:30 - 4:00 CST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Baltzell can be reached at (571) 272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Malane Lieng/Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843
Prosecution Insights