DETAILED ACTION
This action is responsive to the communication filed 7 May 2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
Acknowledgment is made of Applicant' s Information Disclosure Statement(s) (IDS). The IDS(es) has/have been considered.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election with traverse of the Species 4 (FIGS. 11-15) embodiment in the reply filed on 7 May 2026 is acknowledged.
Applicant states:
The Applicant respectfully disagrees with the Election of Species Requirement set forth in the Office Action. It is respectfully submitted that, although not elected, the manufacturing method of an electronic device shown in FIG. 8 (Species 2) illustrates nothing more than the preparation of a first substrate 20 that is shown in FIG. 2 (Species 1) and provided by step S11 of FIG. 1 (Species 1), and thus FIG. 8 (corresponding to claim 9) should be directed to Species 1 but not Species 2. Moreover, the manufacturing method of an electronic device shown in FIG. 9 (Species 2) merely illustrates the use of a circuit substrate as a target substrate 40 that is shown in FIG. 4 (Species 1) and provided by step S15 of FIG. 1 (Species 1), and thus FIG. 9 (corresponding to claims 11 and 12) should also be directed to Species 1 but not Species 2.
In addition, it is respectfully submitted that it should be no undue burden on the Examiner to consider all claims in the single application.
Applicant Arguments/Remarks Made in an Amendment (filed 7 May 2026) at 3-4. The Examiner respectfully notes that those differences identified by Applicant are each different species of the invention, which is why the species were enumerated according to the Requirement for Restriction/Election mailed 9 March 2026. See MPEP § 806.04(f).
Even in light of Applicant’s arguments, the differences between embodiments noted in the Requirement for Restriction provide prima facie evidence that a serious search burden exists. See Requirement for Restriction (mailed 9 March 2026) at 2-4.
Accordingly, the requirement is still deemed proper and is therefore made FINAL.
Claims 1-12 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected species, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 7 May 2026.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 13 and 15-20 are rejected under 35 U.S.C. § 103 as being unpatentable over U.S. Patent Publication No. 2019/0097081 (filed Sept. 5, 2018) (hereinafter “Liao”) in view of U.S. Patent Publication No. 2021/0050336 (filed Aug. 12, 2020) (hereinafter “Koo”).
Regarding independent claim 13, Liao discloses: A manufacturing method of an electronic device (FIGS. 1-10, depicting a method for manufacturing a light-emitting module, [0026]), comprising the steps of:
providing a first substrate including a base layer (FIGS. 1-10, e.g., substrate 2, [0034]) and a plurality of electronic components disposed on the base layer (FIGS. 1-10, light-emitting chips S11, [0034]);
providing a target substrate (FIGS. 1-10, circuit board C, [0035]),
wherein the target substrate and the first substrate are separated from each other by a distance (FIGS. 1-10, depicting wherein the circuit board C and substrate 2 are separated by a distance including, e.g., trench C10, [0038]); and
transferring at least part of the electronic components disposed on the first substrate to the target substrate through a laser process (FIGS. 1-10, depicting wherein a contact surface between a second adhesive layer 20 and the light-emitting chip S11 is irradiated by a light source L3, which may be a laser light source, [0037]),
wherein at least part of the electronic components are attached to the target substrate (FIGS. 1-10, depicting wherein the light-emitting chip S11 is attached to the circuit board C).
Liao does not specifically disclose wherein the target substrate includes an adhesive layer, and further wherein the electronic components are attached to the target substrate via the adhesive layer.
In the same field of endeavor, Koo discloses a manufacturing method of an electronic device (FIGS. 2A-2F, depicting a process for manufacturing a micro LED display, [0040]), wherein the method comprises a step of providing a substrate including an adhesive layer (FIGS. 2A-2F, depicting wherein substrate 11 is provided with conductive film 12, which is an anisotropic conductive film including conductive particles 122 and bonding film 120, [0042]-[0043]), and further wherein electronic components are attached to the target substrate via the adhesive layer (FIGS. 2A-2F, depicting wherein micro-led chips 20 are attached to the substrate 11 by the conductive film 12, [0045]). Regarding the step of providing the substrate with a conductive film, in [0013], Koo states: “According to the present disclosure, an electronic element such as a micro LED chip can easily have an electrical connection with a substrate through simple processes of curing, laser transfer, and bonding of an anisotropic conductive film including conductive particles of several micrometers or lower.” Koo further states in [0014]: “According to the present disclosure, a manufacturing process is very simple and thus can contribute the improvement of a yield rate of a large-area process of a display element such as a micro LED display.”
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the disclosed method of Liao by adding the step of providing a substrate including a conductive film of Koo in order to simplify the manufacturing process and improve yield rate. See Koo [0013]-[0014].
Moreover, addition of the step of providing a substrate including a conductive film of Koo would result in a configuration wherein the light-emitting chips S11 are attached to the circuit board C via the conductive film 12.
Regarding claim 15, Liao in view of Koo further discloses wherein the step of providing a target substrate includes: providing a second substrate (Liao FIGS. 1-10; Koo FIGS. 2A-2F; circuit board C); and forming an adhesive layer on the second substrate (Liao FIGS. 1-10; Koo FIGS. 2A-2F; depicting wherein the conductive film 12 of Koo would be formed on the circuit board C).
Regarding claim 16, Liao in view of Koo further discloses wherein the distance is greater than 0 μm and smaller than or equal to 200 μm (Liao FIGS. 1-10, depicting wherein the light emitting chips S11 are disposed a nonzero distance from the circuit board C in one step, and then directly contact the circuit board C in another step, such that the distance must necessarily be between 0 μm and 200 μm at some point in the method for manufacturing a light-emitting module).
Regarding claim 17, Liao in view of Koo further discloses wherein the adhesive layer (Liao FIGS. 1-10; Koo FIGS. 2A-2F; conductive film 12) has adhesive material including a flux, an anisotropic conductive paste, or an anisotropic conductive film (Koo FIGS. 2A-2F, depicting wherein substrate 11 is provided with conductive film 12, which is an anisotropic conductive film including conductive particles 122 and bonding film 120, [0042]-[0043]).
Regarding claim 18, Liao in view of Koo further discloses a bonding process for bonding the at least part of the electronic components to the target substrate (Liao FIGS. 1-10, depicting wherein the light emitting chips S11 and circuit board C are bonded, [0036]: “At last, referring to FIG. 1 and FIG. 10, the solder balls B are irradiated by a fourth light source L4 to firmly connect the at least two lands S111 of each the light-emitting chip S11 with the corresponding two solder balls B (step S118) which completes the preparation of the light-emitting module.”).
Regarding claim 19, Liao in view of Koo further discloses wherein the bonding process includes light irradiation, heating, pressurization, or a combination thereof (Liao FIGS. 1-10, depicting wherein the light emitting chips S11 and circuit board C are bonded, [0036]: “At last, referring to FIG. 1 and FIG. 10, the solder balls B are irradiated by a fourth light source L4 to firmly connect the at least two lands S111 of each the light-emitting chip S11 with the corresponding two solder balls B (step S118) which completes the preparation of the light-emitting module.”).
Regarding claim 20, Liao in view of Koo further discloses wherein the step of providing a first substrate further includes providing a carrier with the electronic components (Liao FIGS. 1-10, depicting wherein the light emitting chips S11 are first provided on a substrate 1, [0031]); and transferring the electronic components from the carrier to the base layer (Liao FIGS. 1-10, depicting wherein the light emitting chips S11 are transferred from the substrate 1 to the substrate 2, [0031]).
Claim 14 is rejected under 35 U.S.C. § 103 as being unpatentable over Liao and Koo, and further in view of U.S. Patent Publication No. 2022/0352442 (filed Dec. 14, 2021) (hereinafter “Yeo”).
Regarding claim 14, Liao in view of Koo does not specifically disclose wherein the base layer is an epitaxial wafer.
In the same field of endeavor, however, Yeo discloses a carrier substrate, wherein the carrier substrate is formed from, e.g., silicon ([0118]: “The carrier substrate CWF may be a silicon wafer. On the other hand, the carrier substrate CWF may be made of a light-transmitting material, for example, at least one of sapphire (AL2O3), a single crystal substrate, SiC, GaAs, GaN, ZnO, AlN, Si, GaP, InP, and Ge.”).
Accordingly, before the effective filling date of the invention, it would have been obvious to one having ordinary skill in the art to select a known carrier substrate material such as one including silicon, as shown by Yeo in [0118], since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. See MPEP § 2144.07 (citing In re Leshin, 277 F.2d 197 (C.C.P.A. 1960)). One would be motivated to choose an carrier substrate material including silicon over other materials depending on manufacturing considerations such as cost of materials or time it takes to process the layer.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Publication Nos.: 2014/0175481 (filed July 24, 2013) (disclosing a method similar to claim 13 of Applicant’s disclosed method); 2020/0357951 (filed May 8, 2020) (disclosing a method similar to claim 20 of Applicant’s disclosed method); 2021/0005796 (filed June 29, 2020) (disclosing a method similar to claim 20 of Applicant’s disclosed method); 2017/0358505 (published Dec. 14, 2017) (disclosing a method similar to claim 13 of Applicant’s disclosed method); 2023/0028998 (filed Nov. 20, 2020); 2020/0321234 (filed June 22, 2020); 2017/0033076 (filed Dec. 22, 2014) (disclosing a method similar to claim 20 of Applicant’s disclosed method).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM D WEILAND whose telephone number is (703)756-4760. The examiner can normally be reached Monday - Friday 9am-5pm.
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/ADAM D WEILAND/Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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