Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species II (Figs. 3A and 3B) in the reply filed on May 19, 2026, is acknowledged. The traversal is on the grounds that the species were patentably indistinct. This is not found persuasive because the applicant did not provide any substantial arguments showing that the species were patentably indistinct.
The requirement is still deemed proper and is therefore made FINAL.
Claims 17-20 withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected species, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on May 19, 2026.
Regarding claim 17, the elected species does not teach “a second insulation layer, disposed on the transparent conduction layer and the first insulation layer, wherein the second transparent electrode is disposed on the second insulation layer, and the second transparent electrode penetrates through the first insulation layer and the second insulation layer to be electrically connected to the first transparent electrode.”
Claims 18-20 are dependent on claim 17, and thus contain the same missing limitations.
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Fig. 16 of Itou, reproduced above with annotations added by the examiner.
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Fig. 17 of Itou, reproduced above with annotations added by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3 and 8-9 are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Itou et. al., Pub. No. US 2021/0247653, hereafter referred to as Itou.
Regarding claim 1, Itou teaches all of the limitations of the claim in Figs. 16 and 17, reproduced above with annotations added by the examiner: “An electronic device” ([0002]), “comprising: a substrate” ([0062]; Fig. 17, substrate 10); “a thin film transistor, disposed on the substrate” ([0041], [0043]; Fig. 17, scanning line G1 and semiconductor layer OS, hereafter referred to as transistor G1 and OS; in this case, the portions of the semiconductor layer OS contacted by the signal line S1 and the first transparent electrode IT1 function as the source and drain; also see [0043]: “The semiconductor layer OS constitutes a thin-film transistor serving as a switching element SW.”); “a first organic layer, disposed on the thin film transistor” ([0065]; Fig. 17, note that the insulating layer 15 is above the transistor G1 and OS; also see [0065]: “The color filter layer CF is covered with an insulating layer (planarizing layer) 15 formed of a transparent organic insulating material.”), “and having a hole” (Fig. 17; note the existence of a hole in the insulating layer 15 containing the second transparent electrode IT2 and the insulating layer 18); “a first transparent electrode, disposed on the first organic layer” ([0049]; Fig. 17, note that the second transparent electrode IT2 is disposed over the insulating layer 15), “and being at least partially disposed in the hole” (Fig. 17; note that the second transparent electrode IT2 is disposed inside the hole in the insulating layer 15), “wherein the first transparent electrode is electrically connected to the thin film transistor through the hole” (Fig. 17; note that the second transparent electrode IT2 contacts the first transparent electrode IT1, which in turn contacts the semiconductor layer OS); “a second organic layer, disposed on the first transparent electrode” ([0098]; Fig. 17, insulating layer 18; also see [0099]: “The insulating layer 18 is, for example, an organic insulating layer colored in black.”), “and being at least partially disposed in the hole” (Fig. 17; note that the insulating layer 18 is disposed entirely within the hole in the insulating layer 15); “and a second transparent electrode, disposed on the second organic layer” ([0049]; Fig. 17, note that a small portion of the third transparent electrode IT3 overlaps the insulating layer 18), “and electrically connected to the first transparent electrode” ([0067]: “A capacitance for holding the aligned state of the liquid crystal layer LC is formed between the second transparent electrode IT2 and the third transparent electrode IT3.”; note that the existence of a capacitive coupling between the second and third transparent electrodes IT2 and IT3 constitutes an electrical connection), “wherein the first transparent electrode has a first width in a first direction, the second transparent electrode has a second width in the first direction, and the first width is less than the second width” (Fig. 16; note that the width of the second transparent electrode IT2 along the X direction is less than that of the third transparent electrode IT3).
Regarding claim 2, Itou further teaches “The electronic device according to claim 1, wherein the first transparent electrode has a third width and the second transparent electrode has a fourth width in a second direction, the second direction is different from the first direction, and the third width is less than the fourth width” (Fig. 16; note that the width of the second transparent electrode IT2 along the Y direction is less than that of the third transparent electrode IT3).
Regarding claim 3, Itou further teaches “The electronic device according to claim 1, wherein an area of the first transparent electrode is less than an area of the second transparent electrode” (Fig. 16; note that the area of the second transparent electrode IT2 is less than that of the third transparent electrode IT3).
Regarding claim 8, Itou further teaches “The electronic device according to claim 1, further comprising: an insulation layer, disposed between the thin film transistor and the first organic layer” ([0062]; Fig. 17, note that the insulating layer 14 is above the transistor G1 and OS and below the insulating layer 15), “and having a hole” (Fig. 17; note that the insulating layer 14 has a hole containing the first transparent electrode IT1 and part of the color filter layer CF); “and a conduction pattern, disposed on the insulation layer and in the hole of the insulation layer” ([0043]; Fig. 17, note that first transparent electrode IT1 is disposed on the insulating layer 14 and inside the hole in said insulating layer), “wherein the first transparent electrode is electrically connected to the thin film transistor through the conduction pattern” (Fig. 17; note that the second transparent electrode IT2 contacts the first transparent electrode IT1, which in turn contacts the semiconducting layer OS).
Regarding claim 9, Itou further teaches “The electronic device according to claim 8, wherein the hole of the insulation layer overlaps the hole of the first organic layer” (Fig. 17; note that the hole in the insulating layer 15 overlaps the hole in the insulating layer 14).
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Fig. 4 of Ozaki, reproduced above with annotations added by the examiner.
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Fig. 5 of Ozaki, reproduced above with annotations added by the examiner.
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Fig. 10 of Ozaki, reproduced above with annotations added by the examiner.
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Fig. 18 of Ozaki, reproduced above with annotations added by the examiner.
Claims 1, 7, and 11-13 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Ozaki et. al., Pub. No. US 2024/0088164, hereafter referred to as Ozaki.
Regarding claim 1, Ozaki teaches all of the limitations of the claim in Figs. 4, 5, 10, and 17, reproduced above with annotations added by the examiner: “An electronic device” ([0002]), “comprising: a substrate” ([0058]; Fig. 4, substrate SUB); “a thin film transistor, disposed on the substrate” ([0059]; Fig. 4, transistor Tr1); “a first organic layer, disposed on the thin film transistor” ([0061]; Fig. 4, note that the insulating layer IL3 is disposed over the transistor Tr1; also see [0111]: “The above organic insulating materials may be used as the gate insulating layers GI1, GI2, and the insulating layers IL1 to IL3, IL5.”), “and having a hole” ([0061]; Fig. 4; opening ZCON); “a first transparent electrode, disposed on the first organic layer” ([0058]; Fig. 4, note that the connecting electrode ZTCO is disposed on the insulating layer IL3; also see [0061]: “The connecting electrode ZTCO is a transparent conductive layer.”), “and being at least partially disposed in the hole” (Fig. 4; note that the connecting electrode ZTCO is disposed inside the opening ZCON), “wherein the first transparent electrode is electrically connected to the thin film transistor through the hole” ([0061]: “The connecting electrode ZTCO is connected to the oxide semiconductor region OS2 via an opening ZCON provided in the insulating layers IL3, IL2, and the gate insulating layer GI1.”); “a second organic layer, disposed on the first transparent electrode” ([0064]; Fig. 4, insulating layer IL4; also see [0083]: “The insulating layer IL4 is formed using an organic insulating material.”), “and being at least partially disposed in the hole” (Fig. 4; note that part of the insulating layer IL4 is disposed inside the opening ZCON); “and a second transparent electrode, disposed on the second organic layer” ([0056]; Fig. 4, note that the pixel electrode PTCO is disposed over the insulating layer IL4; also see [0065]: “The pixel electrode PTCO is a transparent conductive layer.”), “and electrically connected to the first transparent electrode” (Fig. 4, note that the pixel electrode PTCO contacts the connecting electrode ZTCO), “wherein the first transparent electrode has a first width in a first direction, the second transparent electrode has a second width in the first direction, and the first width is less than the second width” (Fig. 18; note that the pixel electrode PTCO is wider than the connecting electrode ZTCO along the direction D1).
Regarding claim 7, Ozaki further teaches “The electronic device according to claim 1, wherein the second organic layer extends along the first direction” ([0095]; Fig. 18; note that the insulating layer IL4 fills all regions not covered by the opening PCON and extends across the entire device along the direction D1).
Regarding claim 11, Ozaki further teaches “The electronic device according to claim 1, further comprising: a light shielding layer, disposed on the substrate and located between the thin film transistor and the substrate” ( [0070]; Figs. 4 and 10, note that the light-shielding layer LS1 and LS2, collectively LS, is disposed on the substrate SUB and below the transistor formed by the oxide semiconductor regions OS1 and OS2 and the gate electrode GL1), “wherein an extending direction of the light shielding layer is parallel to the first direction” (Fig. 10; note that the light-shielding layer LS extends along the direction D1).
Regarding claim 12, Ozaki further teaches “The electronic device according to claim 11, wherein the second organic layer overlaps the light shielding layer” ([0056], [0061], and [0064]; Fig. 4, note that the insulating layer IL4 overlaps the light-shielding layer LS).
Regarding claim 13, Ozaki further teaches “The electronic device according to claim 12, wherein a width of the second organic layer in a second direction is different from a width of the light shielding layer in a second direction” (Fig. 4; note that the light-shielding layer LS is narrower than the insulating layer IL4 along the direction D2) “and the second direction is perpendicular to in the first direction” (Fig. 10; note that the direction D2 is perpendicular to the direction D1).
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Fig. 3 of Chang, reproduced above with annotations added by the examiner.
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Fig. 4G of Chang, reproduced above with annotations added by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Itou in view of Chang et. al., Pub. No. US 2004/0001170, hereafter referred to as Chang.
Regarding claim 4, Itou teaches “The electronic device according to claim 1”, but does not teach “wherein the first transparent electrode has a first portion and a second portion, the first portion extends along a second direction, the second portion extends along the first direction, and the second direction is different from the first direction.”
Chang, on the other hand, does teach “wherein the first transparent electrode has a first portion” (Chang [0040]; Fig. 3, reproduced above with annotations added by the examiner, first portion of the first transparent electrode 126) “and a second portion” (Chang Fig. 3, second portion of the first transparent electrode 126), “the first portion extends along a second direction” (Chang Fig. 3, note that the first portion of the first transparent electrode 126 extends vertically from a plan view), “the second portion extends along the first direction” (Chang Fig. 3, note that the second portion extends horizontally from a plan view), “and the second direction is different from the first direction” (Chang Fig. 3; the vertical and horizontal directions are mutually perpendicular).
The first transparent electrode of Chang can be incorporated into the device of Itou by adding a protruding portion to the second transparent electrode IT2 that extends along the X direction.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to add a protruding portion to the second transparent electrode IT2 of Itou, as taught by Chang, because doing so would allow better separation of the individual subpixels while allowing them to contact the gate and source lines and it would be a simple combination of elements of the two disclosures.
Regarding claim 5, the combination of Itou and Chang described in the discussion of claim 4 further teaches “The electronic device according to claim 4, further comprising: a gate line, disposed on the substrate” (Itou [0041]; Fig. 17, note that the scanning line G1 is disposed over the substrate 10), “wherein an extending direction of the gate line is parallel to the first direction” (Itou Fig. 16; note that the scanning line G1 extends along the X direction).
Regarding claim 6, the combination of Itou and Chang described in the discussion of claim 4 teaches “The electronic device according to claim 5” and “at least a part of the second portion is located between two adjacent second transparent electrodes in the first direction” (Chang Fig. 4G, reproduced above with annotations added by the examiner, note that a small portion of the first transparent electrode 126 is exposed by the second transparent electrode 130 due to the angled walls of the holes), but does not teach “wherein the electronic device comprises a plurality of second transparent electrodes, the plurality of second transparent electrodes are arranged in the first direction”.
Chang, on the other hand, does teach “wherein the electronic device comprises a plurality of second transparent electrodes” (Chang Fig. 3; note that there are multiple second transparent electrodes 130) and “the plurality of second transparent electrodes are arranged in the first direction” (Chang Fig. 3; note that the second transparent electrodes 130 are arranged in the horizontal direction).
The multiple second transparent electrodes can be incorporated into the combined device of Itou and Chang by having multiple such devices arranged in a rectangular array as taught by Chang.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to form a rectangular array of devices as taught by the combination of Itou and Chang described in the discussion of claim 4 because doing so is required to form a display made up of multiple such devices and it would be a simple combination of elements of the two disclosures.
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Figs. 4A-4C of Aoyama, reproduced with annotations added by the examiner.
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Fig. 9 of Aoyama, reproduced above with annotations added by the examiner.
Claims 10 and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Ozaki in view of Aoyama et. al., Pub. No. US 2017/0062528, hereafter referred to as Aoyama.
Regarding claim 10, Ozaki teaches “The electronic device according to claim 1, further comprising: an insulation layer, disposed on the second organic layer and the second transparent electrode” (Ozaki [0067]; Fig. 4, note that the insulating layer IL5 is disposed on top of the insulating layer IL4 and the pixel electrode PTCO); “and a transparent conduction layer, disposed on the insulation layer” (Ozaki [0056]; Fig. 4, common electrode CTCO; also see [0069]: “The common electrode CTCO is a transparent conductive layer.”), but does not teach “and having an opening, wherein an end of the opening is located outside the hole of the first organic layer from a top view of the electronic device.”
Aoyama, on the other hand, teaches a similar conductive layer (Aoyama [0165]; Fig. 9, conductive layer 113). In addition, Aoyama discloses an additional embodiment (Aoyama Fig. 4C) in which there are openings in the conductive layer (Aoyama [0075]; Fig. 4C, note that there is an opening in the EL layer 24 and the conductive layer 25 containing the structure body 11), a feature that is not mutually exclusive with the embodiment of Fig. 9, and such that the edges of the opening do not overlap the opening in the insulating layer 81 (Aoyama [0078]) containing the conductive layer 23 (Aoyama [0071]) connected to the transistor 70 (Aoyama [0078]).
The opening in the conductive layer 113 of Aoyama may be incorporated into the device of Ozaki as a similar opening in the common electrode CTCO of Ozaki arranged such that the opening does not overlap the opening ZCON. The combined device teaches “and having an opening” (Aoyama [0075]; Fig. 4C, note the opening in the EL layer 24 and the conductive layer 25 containing the structure body 11; also note that this feature can be incorporated into the embodiment in Fig. 9), “wherein an end of the opening is located outside the hole of the first organic layer from a top view of the electronic device” (Aoyama [0071] and [0075]; Fig. 4C, note that the opening does not overlap the hole in the insulating layer 81 connected to the transistor 70).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to incorporate openings into the common electrode of Ozaki, as suggested by Aoyama, because doing so would separate the common electrode into individual segments connected to each subpixel of the device, helping to allow them to operate independently, and it would be a simple combination of elements of the two disclosures.
Regarding claim 14, Ozaki teaches “The electronic device according to claim 1, further comprising: a plurality of data lines, disposed on the substrate” (Ozaki [0061]; Fig. 4, wiring W1), “wherein extending directions of the plurality of data lines are parallel to a second direction, and the second direction is different from the first direction” (Ozaki Fig. 5; note that the wirings W1 extend along the direction D2); “an insulation layer, disposed on the second organic layer and the second transparent electrode” (Ozaki [0067]; Fig. 4, insulating layer IL5); “and a conduction layer, disposed on the insulation layer” (Ozaki [0058]; Fig. 4, common auxiliary electrode CMTL), but does not teach “and comprising a plurality of conduction patterns, wherein the plurality of conduction patterns and the plurality of data lines overlap.”
Aoyama, on the other hand, teaches a similar conductive pattern (Aoyama [0165]; Fig. 9, EL (electroluminescent) layer 112 and conductive layer 113; also see [0105]: “In the case where the EL layer 24 is shared with a plurality of pixels as illustrated in FIG. 1B and FIG. 3A, if the EL layer 24 includes a highly conductive layer, current might flow to the light-emitting element 40 in an adjacent pixel through the highly conductive layer.”). In addition, there is a second transistor (Aoyama [0165]; Fig. 9, transistor 202) such that one of the conductive layers connected to it can serve as part of a signal line (Aoyama [0173]: “In the transistor 202, one of the pair of conductive layers 222 that is not electrically connected to the capacitor 203 serves as part of a signal line.”) and is overlapped by the EL layer (Aoyama Fig. 9; note that the EL layer 112 overlaps the transistor 202). Furthermore, Aoyama discloses an additional embodiment (Aoyama Fig. 4C) in which there are openings in the EL layer (Aoyama [0075]; Fig. 4C, note that there is an opening in the EL layer 24 containing the structure body 11), a feature that is not mutually exclusive with the embodiment of Fig. 9, and such that the edges of the openings do not overlap the opening in the insulating layer 81 (Aoyama [0078]) containing the conductive layer 23 (Aoyama [0071]) connected to the transistor 70 (Aoyama [0078]).
The openings in the EL layer 112 of Aoyama can be incorporated into the device of Ozaki as similar openings in the common auxiliary electrode CMTL arranged such that the portions of the common auxiliary electrode so formed each overlap the wirings W1. The combined device teaches “and comprising a plurality of conduction patterns” (Ozaki Fig. 4; Aoyama Figs. 4C and 9; portions of the common auxiliary electrode CMTL formed in the combined device), “wherein the plurality of conduction patterns and the plurality of data lines overlap” (Ozaki Fig. 4; Aoyama Figs. 4C and 9; note that the portions of the common auxiliary electrode CMTL overlap the wirings W1 in the combined device).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to split up the common auxiliary electrode in the device of Ozaki into multiple portions as suggested by Aoyama because doing so would allow for light to more easily pass through the common electrode and it would have been a simple combination of elements of the two disclosures.
Regarding claim 15, the combination of Ozaki and Aoyama described in the discussion of claim 14 further teaches “The electronic device according to claim 14, wherein the plurality of conduction patterns and the plurality of data lines are disposed one-to-one” (Ozaki Fig. 4; Aoyama Figs. 4C and 9; note that each portion of the common auxiliary electrode CMTL in the combined device overlaps one wiring W1), “and each of the plurality of data lines is completely covered by a corresponding conduction pattern” (Ozaki Fig. 4; Aoyama Figs. 4C and 9; note that the portions of the common auxiliary electrode CMTL in the combined device each completely cover a wiring W1).
Regarding claim 16, the combination of Ozaki and Aoyama described in the discussion of claim 14 teaches “The electronic device according to claim 14, further comprising: a transparent conduction layer, disposed on the insulation layer and the conduction layer” (Ozaki [0056]; Fig. 4, common electrode CTCO; also see [0069]), but does not teach “and having an opening, wherein an end of the opening is located outside the hole of the first organic layer from a top view of the electronic device.”
Aoyama, on the other hand, teaches a similar conductive layer (Aoyama [0165]; Fig. 9, conductive layer 113). In addition, Aoyama discloses an additional embodiment (Aoyama Fig. 4C) in which there are openings in the conductive layer (Aoyama [0075]; Fig. 4C, note that there is an opening in the EL layer 24 and the conductive layer 25 containing the structure body 11), a feature that is not mutually exclusive with the embodiment of Fig. 9, and such that the edges of the opening do not overlap the opening in the insulating layer 81 (Aoyama [0078]) containing the conductive layer 23 (Aoyama [0071]) connected to the transistor 70 (Aoyama [0078]).
The openings in the conductive layer of Aoyama can be incorporated into the combined device of Ozaki and Aoyama described in the discussion of claim 14 as similar openings in the common electrode CTCO of said combined device. The combined device just described teaches “and having an opening” (Aoyama Figs. 4C and 9; note that the conductive layer 25 has a series of openings), “wherein an end of the opening is located outside the hole of the first organic layer from a top view of the electronic device” (Aoyama Fig. 4C; note that the opening in the conductive layer 25 does not overlap the hole in the insulating layer 81 within which the conductive layer 23 is disposed).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to incorporate openings into the common electrode of Ozaki, as suggested by Aoyama, because doing so would separate the common electrode into individual segments connected to each subpixel of the device, helping to allow them to operate independently, and it would be a simple combination of elements of the two disclosures.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Robert E Throckmorton whose telephone number is (571) 272-7014. The examiner can normally be reached 7:30 AM - 11:30 AM and 12:30 PM - 4:30 PM ET Monday to Friday.
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/R.E.T./Examiner, Art Unit 2818
/CUONG B NGUYEN/Primary Examiner, Art Unit 2818
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