Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 20, 22-23, 26-27 and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Hangzhou Sulan Microeletronics (CN211791278U) hereinafter Hangzhou in view of Notohamiprodjo (US20240022102) see provisional application (63/368,448).
With respect to claim 20 Hangzhou teaches a chip package of a charging controller chip for a USB charger (see Fig. 3-12, claims 25-26, see USB type A/B/C or micro), the chip package (see QNF package) comprising: a high-side transistor (M11) including a first drain, a first gate and a first source; a low-side transistor (M12) including a second drain, a second gate and a second source, the low-side transistor being connected to the high-side transistor (see connection of shown in for example Fig. 1, 3, 8-9); one or more port transistors (M21-23) corresponding to one or more USB output ports respectively, each port transistor of the one or more port transistors including a third drain, a third gate and a third source (see transistor terminals Fig. 1, 3, 8-9) ; a first chip base (402); and a second chip base (401) electrically insulated from the first chip base; wherein: the one or more port transistors are located on the first chip base (see separation and placement in Fig. 12). Hangzhou does not teach the high-side transistor and the low-side transistor are located on the second chip base (see separation and placement in Fig. 12). Notohamiprodjo teaches a similar USB system the known use of a DC converter (see Fig. 3-4) and the associated transistors (high and low) into a single package (paragraph 0012). It would have been obvious to one of ordinary skill in the art at the time of the invention to modify Hangzhou to include the known placement of the high and low transistors on the first chip base for the benefit of reducing interconnect resistance power loss and improve converter efficiency.
With respect to claim 22 Hangzhou teaches a controller (111) coupled to the high-side transistor, the low-side transistor, and the one or more port transistors.
With respect to claim 23 Hangzhou teaches wherein the controller (Fig. 11 and 12 see claim 6) is located on the second chip base.
With respect to claim 26 and 30 Hangzhou teaches the controller is bonded to the second chip base through an electrically conductive adhesive (see conductive adhesive in description of Fig. 12 of Hangzhou).
With respect to claim 27 Hangzhou teaches the controller is located on the first chip base (see claim 4/6 of Hangzhou, see same island).
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Hangzhou Sulan Microeletronics (CN211791278U) hereinafter Hangzhou in view of Notohamiprodjo (US20240022102) see provisional application (63/368,448) in view of Chang et al. (US 20220385093)
With respect to claim 21 Hangzhou teaches the high-side transistor is a part of a high-side transistor combination (see M11, M13) that is located on the second chip base; the low-side transistor is a part of a low-side transistor combination (M12 and M14) that is located on the second chip base. Hangzhou as modified above describes the known placement of the high and low transistors on the first chip base for the benefit of reducing interconnect resistance power loss and improve converter efficiency. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify Hangzhou to place the combination of transistors on the second base similarly for the benefit of for the benefit of reducing interconnect resistance power loss and improve converter efficiency. Hangzhou as modified above does not teach each port transistor of the one or more port transistors is a part of a port transistor combination that is located on the first chip base. Chang teaches USB charging system including a port transistor combination (Q2-Q4). It would have been obvious to one of ordinary skill in the art at the time of the invention to modify Hangzhou to include a combination of transistors for increase charging speed.
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Hangzhou Sulan Microeletronics (CN211791278U) hereinafter Hangzhou in view of Notohamiprodjo (US20240022102) see provisional application (63/368,448) in view of Liu et al. (US 20090230537)
With respect to claim 24 Hangzhou teaches the port transistor however does not teach a vertically double-diffused metal-oxide-semiconductor field-effect transistor. Liu teaches the known use of vertically double-diffused metal-oxide-semiconductor field-effect transistor (paragraph 0031). It would have been obvious to one of ordinary skill in the art at the time of the invention to modify Hangzhou to include the use of VDMOS for the benefit of increased current capacity during high power charging.
Allowable Subject Matter
Claims 1-19 are allowed. The following is an examiner’s statement of reasons for allowance:
With respect to claim 1 Hangzhou as modified above teaches a chip package and associated transistors however does not teach wherein each port main transistor of the one or more port main transistors is a part of a port transistor combination that further includes a port sensing transistor, the port sensing transistor including a fourth drain, a fourth gate and a fourth source, the fourth drain being connected to the third drain, the fourth gate being connected to the third gate, the fourth source being connected to the third source. At least this further limitation is not taught or rendered obvious by the prior art of record.
Claim 25 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 25 Hangzhou as modified above teaches the high and low transistor however does not teach the high-side transistor is a laterally double-diffused metal-oxide-semiconductor field- effect transistor; and the low-side transistor is a laterally double-diffused metal-oxide-semiconductor field- effect transistor. At least this further limitation is not taught or rendered obvious by the prior art of record.
With respect to claims 28-29 Hangzhou as modified above teaches the port transistors however does not teach each port transistor of the one or more port transistors is a laterally double-diffused metal-oxide-semiconductor field-effect transistor. At least this further limitation is not taught or rendered obvious by the prior art of record.
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Conclusion
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MICHAEL FIN
Primary Examiner
Art Unit 2836
/MICHAEL R. FIN/Primary Examiner, Art Unit 2836
Prosecution Insights