Prosecution Insights
Last updated: April 19, 2026
Application No. 18/405,316

LIGHT-EMITTING DEVICE

Non-Final OA §102§103
Filed
Jan 05, 2024
Examiner
ANYA, IGWE U
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Quanzhou Sanan Semiconductor Technology Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
79%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
795 granted / 938 resolved
+16.8% vs TC avg
Minimal -6% lift
Without
With
+-5.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
18 currently pending
Career history
956
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
46.7%
+6.7% vs TC avg
§102
39.5%
-0.5% vs TC avg
§112
7.6%
-32.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 938 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 11, 13 – 14, 17 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Weng et al. (CN 204289528). PNG media_image1.png 643 499 media_image1.png Greyscale (Claim 1) Weng et al. teach a light-emitting device, comprising: a substrate (101); a light-emitting chip unit formed on said substrate and including multiple chips (paragraph ; an isolation groove extending in a first direction and separating two adjacent ones of said chips, said isolation groove being defined by a bottom and two sidewalls and having a first groove section and a second groove section (top portion of fig. 2) arranged in said first direction (top to bottom), said first groove section (bottom portion of fig. 2) having a width in a width direction (left to right) perpendicular to said first direction that is greater than a width of said second groove section in said width direction (paragraph 10), at said first groove section, one of said sidewalls having a first wall portion that is immediately adjacent to said second groove section and that extends in a second direction (into the screen) which intersects said first direction, a second wall portion that extends in said first direction (top to bottom), and a curved portion (point of inflection) that connects said first wall portion and said second wall portion; and a bridging structure (501) that is formed on said bottom and said sidewalls, that covers said curved portion, and that electrically connects said two adjacent ones of said chips. (Claim 11) Weng et al. teach the light-emitting device, further comprising an insulating dielectric layer (401, paragraph 18) disposed within said isolation groove, said bridging structure (501) formed on said insulating dielectric layer (401). (Claim 13) Weng et al. teach wherein said chips are electrically connected in series (paragraph 3), and said light-emitting chip unit further includes an electrode structure (201, 202) formed on a first one and a last one of said chips (paragraph 22). (Claim 14) Weng et al. teach wherein said electrode structure (201, 202) includes a first electrode (201) and a second electrode (202) that are respectively formed on said last one and said first one of said chips. (Claim 17) Weng et al. teach wherein said first groove section (fig. 2. top portion) of said isolation groove is located at a position that is away from an end of said isolation groove. (Claim 20) Weng et al. teach wherein said first groove section and said second groove section of said isolation groove are continuously connected (connected by the inflection region). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 2 – 9, 15 – 16 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Weng et al. (US 204289528) in view of Wang et al. (CN 209626249). PNG media_image2.png 714 655 media_image2.png Greyscale (Claim 2) Weng et al. teach wherein each of said chips includes a semiconductor laminate formed on said substrate, said semiconductor laminate including a first semiconductor layer (601), an active layer (701), and a second semiconductor layer (901) that are disposed on said substrate in a thickness direction in such order. Weng et al. lack said active layer having a thickness ranging from 6 um to 8 um in the thickness direction. However, where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). MPEP211.05(II). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a thickness range from 6 microns to 8 microns. (Claim 3) Weng et al. teach wherein an angle (a) between said one of said sidewalls and a surface of said substrate ranges from 30 degrees to 70 degrees (Embodiment 1, paragraph 3). Weng et al. lack wherein the angle ranges from 60 degrees to 90 degrees. However, in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). MPEP 2144.05(I). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a range from 60 degrees to 90 degrees. (Claim 4) Weng et al. teach wherein said semiconductor laminate of each of said chips having a first mesa surface that is constituted by said first semiconductor layer (601), and a second mesa surface that is constituted by said second semiconductor layer (901), said first mesa surface (side surface of 601) of one of said two adjacent ones of said chips is adjacent to said second mesa surface (side surface of 901) of the other of said two adjacent ones of said chips, and said bridging structure (501) is formed on said first mesa surface (601) of said one of said two adjacent ones of said chips and said second mesa surface (901) of said the other of said two adjacent ones of said chips. (Claim 5) Weng et al. teach wherein said semiconductor laminate of each of said chips has a connecting surface (side surface of 701) that interconnects said second mesa surface (901) and said first mesa surface (601). Weng et al. lack a connecting surface that is inclined with respect to an imaginary surface that extends from said first mesa surface by an angle ranging from 50 degree to 70 degree. However, Wang et al. teach a connecting surface that is inclined with respect to an imaginary surface that extends from said first mesa surface by an angle ranging from 30 degree to 70 degree for the benefit of retaining more of the luminous area (Embodiment 1, paragraph 5). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the references for the benefit of retaining more of the luminous area. (Claim 6) Weng et al. teach wherein said first groove section (fig. 2, top portion) of said isolation groove is located at an end of said isolation groove. (Claim 7) Weng et al. teach wherein said width of said first groove section ranges from 10 um to 50 um (paragraphs 3, 10). (Claim 8) Weng et al. teach wherein said width of said second groove section ranges from 3 um to 10 um (paragraph 10). (Claim 9) Weng et al. teach wherein said bridging structure includes an electrically conductive metallic layer. Weng et lack wherein electrically conductive metallic layer has a thickness ranging from 0.1 um to 2 um. Wang et al. teach wherein electrically conductive metallic layer has a thickness ranging from 50% to 80 % of the trench depth for the benefit of achieving better coverage and reliability (Embodiment 1, paragraph 5), Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the references for the benefit of achieving better coverage and reliability. (Claim 15) Weng et al. lack the light-emitting device, further comprising an insulating protective layer that is formed on said light-emitting chip unit. However, Wang et al. teach the light-emitting device, further comprising an insulating protective layer (700) that is formed on said light-emitting chip unit for the benefit of protecting the chip from a short circuit. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the references for the benefit of protecting the chip from a short circuit. (Claim 16) Weng et al. lack wherein said insulating protective layer includes SiO2 and Si3N4. However, Wang et al. teach wherein said insulating protective layer (700) includes SiO2 and Si3N4 for the benefit protecting the chip from a short circuit (Summary of the Invention). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the references for the benefit of protecting the chip from a short circuit. (Claim 19) Weng et al. teach wherein an end part of said second wall portion away from said curved portion (inflection region) has an arc shape. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Weng et al. (US 204289528) in view of Wang et al. (CN 209626249) and Li et al. (US 10,930,814). (Claim 12) Weng/Wang et al. lack wherein said light-emitting device is a red light-emitting device. However, Li et al. teach wherein said light-emitting device is a red light-emitting device as rt recognized equivalents. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the references as art recognized equivalents. Allowable Subject Matter Claims 10 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. (Claim 10) wherein a portion of said bridging structure that is located on said one of said sidewalls has a thickness (d1), and a portion of said bridging structure that is located on one of said first mesa surface of said one of said two adjacent ones of said chips and said second mesa surface of said the other of said two adjacent ones of said chips has a thickness (d2), where d1:d2 ranges from 6:10 to 10:10. (Claim 18) wherein at said second groove section, said one of said sidewalls has a rounded portion that connects to said first wall portion at said first groove section, said bridging structure covering said rounded portion. Conclusion Prior art made of record and not relied upon, considered pertinent to applicant's disclosure are listed in PTO – 892 Form. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to IGWE U ANYA whose telephone number is (571)272-1887. The examiner can normally be reached 8:00 AM - 6:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571) 272- 1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /IGWE U ANYA/Primary Examiner, Art Unit 2891 March 6, 2026
Read full office action

Prosecution Timeline

Jan 05, 2024
Application Filed
Mar 06, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
79%
With Interview (-5.9%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 938 resolved cases by this examiner. Grant probability derived from career allow rate.

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