Prosecution Insights
Last updated: April 19, 2026
Application No. 18/406,272

REDUCE READ COMMAND LATENCY IN PARTITION COMMAND SCHEDULING AT A MEMORY DEVICE

Final Rejection §103
Filed
Jan 08, 2024
Examiner
AYASH, MARWAN
Art Unit
2133
Tech Center
2100 — Computer Architecture & Software
Assignee
Micron Technology, Inc.
OA Round
2 (Final)
69%
Grant Probability
Favorable
3-4
OA Rounds
3y 9m
To Grant
95%
With Interview

Examiner Intelligence

Grants 69% — above average
69%
Career Allow Rate
183 granted / 266 resolved
+13.8% vs TC avg
Strong +26% interview lift
Without
With
+26.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 9m
Avg Prosecution
20 currently pending
Career history
286
Total Applications
across all art units

Statute-Specific Performance

§101
8.0%
-32.0% vs TC avg
§103
67.8%
+27.8% vs TC avg
§102
3.1%
-36.9% vs TC avg
§112
13.4%
-26.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 266 resolved cases

Office Action

§103
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Response to Amendment This office action has been issued in response to the response filed 2/13/26. Claims 1-3, 5-10, 12-17, 19-20 are pending in this application. Applicant's arguments have been carefully considered, but are not persuasive in view of the “response to arguments” section below. The examiner appreciates Applicant's effort to distinguish over the cited prior art by presenting arguments/amendments in an attempt to distinguish or clarify the claimed invention, however, upon further consideration and/or search, the claims remain unpatentable over the cited prior art for the reasons articulated in the “response to arguments” section below. All claims pending in the instant application remain rejected and clarification and/or elaboration regarding why the claims are not in condition for allowance will hereafter be provided in order to efficiently further prosecution. Accordingly, this action is made FINAL. Claim interpretation Claim 8 (method) contains several limitations written in the context of ‘in response to’ limitations which are understood to be conditional limitations in accordance with MPEP2111.04. It is suggested that the claim be written to positively recite the limitations rather than using the current conditional language which affects the broadest reasonable interpretation of the claim. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-3, 5-6, 8-10, 12-13, 15-17, 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Wang (US PGPUB # 20200089629) in view of Yu (US PGPUB # 20170177240). With respect to independent claims 1, 8, 15 Wang discloses: 1. A system comprising: one or more memory devices [memory device - Wang fig 1, paragraph 0010]; a sequencer component, operatively coupled to the one or more memory devices [sequencer component - Wang fig 1, paragraph 0023-0026 ], the sequencer component to perform operations comprising: receiving, from a plurality of write partition command queues, a write partition command [partition queues p0, p1, p2 store read/write commands - Wang fig 2, paragraph 0025] [read/write queues – Yu 0015 ]; determining whether a time stamp associated with at least one read partition command from a plurality of read partition command queues exceeds a timeout threshold [an elapsed time, which reads on a timeout threshold, between read operations and write operations is enforced/determined – Wang 0012, 0015, 0031; See also Yu abstract & 0012 teaching timestamps associated with completed events which may be compared to a current time to determine a time threshold pertaining to read/write events]; responsive to determining that the time stamp associated with the at least one read partition command from the plurality of read partition command queues exceeds the timeout threshold, receiving a read partition command to be performed on the memory device [scheduler selects and transmits reads when conditions are met – Wang fig 3, 5] [when time difference exceeds threshold for target partition, controller allows command to proceed, in other words, receiving a read for execution when its partition-level timeout criterion is satisfied - Yu fig 6 blocks 614-620]; responsive to determining that the time stamp associated with each read partition command from the plurality of read partition command queues does not exceed the timeout threshold, perform the write partition command on the memory device [if no reads meet timeout, perform write - Wang fig 3, 5] [if time threshold not yet met for partition - Yu fig 6; ready flag not satisfied – Yu 0015, 0025] wherein the timeout threshold corresponds to a predetermined period of time that a read partition command of the plurality of read partition command queues is permitted to remain pending in a read partition command queue of the plurality of read partition command queues [controller maintains time thresholds 300 for different pairs of event types, e.g., different pairs of read and write types, indicating a time (predetermined) that must elapse between a last completed event command directed to a target addressable location, e.g., die and partition, and a new received event command to the same target addressable location before the new received command can be processed. This enforces timing restrictions in the memory die – Yu 0017; entries for completed events remain on the list, such as a First-In-First-Out (FIFO) buffer, for a predetermined time period before being removed from the list. Each of the completed event entries may indicate a timestamp and a threshold location, such as a partition, including the address to which the completed event was directed. This information is used to determine whether a determined threshold time has elapsed since the indicated completed event was processed at a same threshold location to determine whether to allow a new received event directed to the same threshold location to proceed – Yu 0012; a maximum amount of time = the time threshold 306 may be longer to provide more time for the command to complete, so that the time threshold is commensurate with an expected execution time of the command type – Yu 0025] [in a read mode, all read requests are serviced before switching to write requests – Wang 0014, the maximum duration a read may remain in a queue will depend on read latency and elapsed time between those read commands – Wang 0012. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine Yu’s timestamp/threshold with Wang’s partition queue scheduler because it would be advantageous for improving read latency and ensuring/enforcing device timing constraints - Yu abstract, 0017-0018]. Wang does not explicitly disclose a “timeout threshold” and determining that the timeout threshold criterion pertaining to the plurality of read/write partition command queues is satisfied or not, although a broadest reasonable interpretation of a timeout threshold is disclosed as enforcing a particular time to elapse between operations … Other requirements of the bus protocol can include an amount of elapsed time (i.e., a turnaround) for the data bus when transmitting separate write operations or read operations and an amount of elapsed time between utilizing the data bus to perform read operations at different memory components (e.g., different memory die) - Wang 0012, 0015, 0031. Nevertheless, in the same field of endeavor Yu teaches enforcing timing requirements for a memory device using a time threshold, which reads on a broadest reasonable interpretation of a timeout threshold [Yu abstract in view of fig 6 & paragraph 0017], in addition to determining that the timeout threshold criterion pertaining to a plurality of read/write partition command queues is satisfied or not [Yu 0015, 0025]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use a timeout threshold and determining when the time threshold is and is not satisfied in the invention of Wang as taught by Yu because it would be advantageous for enforcing timing requirements for a memory device (Yu abstract, 0017-0018 teaching at least that “controller 102 maintains time thresholds 300 for different pairs of event types, e.g., different pairs of read and write types, indicating a time that must elapse between a last completed event command directed to a target addressable location, e.g., die and partition, and a new received event command to the same target addressable location before the new received command can be processed. This enforces timing restrictions in the memory die”). With respect to dependent claim 2, 9, 16 Wang/Yu discloses wherein the time stamp represents a time a respective partition command was received in the plurality of read partition command queue from a die command queue of the sequencer component [Yu 0015-0016 in view of 0011; a sequencer component 113 that can be used to issue read operations or write operations – Wang 0023]. With respect to dependent claim 3, 10, 17 Wang/Yu discloses wherein the sequencer component is to perform further operations comprising: responsive to determining that each read partition command from the plurality of read partition command queues does not exceed the timeout threshold and each write partition command from the plurality of write partition command queues does not exceed the timeout threshold, receiving an additional partition command from one of the plurality of write partition command queues [when neither read nor write time threshold is exceeded, continue receiving additional write partition commands - Wang fig 3 step 350[Wingdings font/0xE0] 340 and 350[Wingdings font/0xE0] 360 in view of paragraph 0012, 0015, 0031 further in view of time threshold criterion disclosed in Yu abstract]. With respect to dependent claim 5, 12, 19 Wang/Yu discloses switching to receiving the read partition command to be performed on the memory device comprises updating a read threshold [updating a read threshold disclosed as: a read operation in the partition queue with the most number of read operations on any memory component can be retrieved and transmitted by the data bus – Wang 0015, fig 3-5, and this would update the timestamp of a completed read command and any associated read threshold, in view of Yu abstract; additionally, maintaining a threshold for reads and deciding when to switch to writes, as similarly maintaining a write threshold and managing when to switch back to reads, as such thresholds are evaluated/updated per read/write phase and are system parameters updated as scheduling state changes – Wang fig 3-5]. With respect to dependent claim 6, 13, 20 Wang/Yu discloses wherein the read threshold is one of: (i) a number of remaining read partition commands of the plurality of read partition command queues or (ii) a product of a minimum number of read partition commands of the plurality of read partition command queues to receive and a read transaction ratio [method 400/500 scheduler uses threshold based on counts or partition queues containing writes and selects operations based on most # of read operations or most # of write operations per partition so that count-based thresholds and ratios for determining whether the system should continue in read/write mode (remain in write mode) - Wang 0012, 0015, 0031, fig 3-5]. Claims 7, 14 are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Yu further in view of Teh (US PGPUB # 20190303039). With respect to dependent claim 7, 14 Wang/Yu discloses does not explicitly disclose wherein the read transaction ratio is a value between 0 and 1. Nevertheless in the same field of endeavor Teh teaches means for dynamically changing from read major to write major modes using read/write ratios (Teh title, abstract) such that the combination of Wang/Yu/Teh teaches wherein the read transaction ratio is a value between 0 and 1 [read transaction ratio may be between 0-1 – Teh 0047, fig 6]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use a read transaction ratio between 0 and 1 because it would be advantageous for improving the efficiency of the memory scheduler to handle different memory traffic patterns (Teh 0013). Response to Arguments Applicant's arguments have been fully considered but are not persuasive in view of the prior art. All claims pending in the instant application remain rejected. Please note that any rejections/objection not maintained from the previous Office Action have been rectified either by applicant's amendment and/or persuasive argument(s). Regarding applicant’s arguments on page 7, that amended claims are not taught by the cited art [The examiner respectfully submits that amended grounds of rejection necessitated by amendments to the claims have rendered the remarks moot/unpersuasive, as integrated into the rationale above.] Remaining arguments are understood to be predicated on the previous arguments being persuasive and thus are unpersuasive at least on dependency merits. All remarks are understood to have been addressed herein. If any issues remain which may be clarified by the examiner, the applicant is invited to contact the examiner to set up a telephone interview. When responding to the office action, any new claims and/or limitations should be accompanied by a reference as to where the new claims and/or limitations are supported in the original disclosure. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARWAN AYASH whose telephone number is (571)270-1179. The examiner can normally be reached 9a-730p M-R. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rocio del Mar Perez-Velez can be reached on 571-270-5935. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Marwan Ayash/ - Examiner - Art Unit 2133 /ROCIO DEL MAR PEREZ-VELEZ/Supervisory Patent Examiner, Art Unit 2133
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Prosecution Timeline

Jan 08, 2024
Application Filed
Nov 06, 2025
Non-Final Rejection — §103
Jan 23, 2026
Interview Requested
Feb 05, 2026
Interview Requested
Feb 12, 2026
Examiner Interview Summary
Feb 12, 2026
Applicant Interview (Telephonic)
Feb 13, 2026
Response Filed
Mar 12, 2026
Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
69%
Grant Probability
95%
With Interview (+26.1%)
3y 9m
Median Time to Grant
Moderate
PTA Risk
Based on 266 resolved cases by this examiner. Grant probability derived from career allow rate.

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