DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
Claims 13- rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 13 recites the limitation "first and second resistors" in line 5. There is insufficient antecedent basis for this limitation in the claim.
Claim 13 recites the limitation "third and fourth resistors" in line 10. There is insufficient antecedent basis for this limitation in the claim.
Claim 13 recites the limitation "fifth and sixth" in line 16. There is insufficient antecedent basis for this limitation in the claim.
Claims 14-16 depend from rejected to claim 13 and are therefore also rejected.
Claim 17 recites the limitation "first and second DrMOS" in line 5. There is insufficient antecedent basis for this limitation in the claim.
Claim 17 recites the limitation "first outputs" in line 6. There is insufficient antecedent basis for this limitation in the claim.
Claim 17 recites the limitation "first and second resistors" in line 15. There is insufficient antecedent basis for this limitation in the claim.
Claims 18-20 depend from rejected to claim 17 and are therefore also rejected.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 and 3-5 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Bolus (US PUB 2021/0285989).
With respect to claim 1, Bolus discloses a current sensing circuit (See [100] in figure 1 of Bolus), comprising: a coupled inductor (See [K] in figure 1 of Bolus) comprising: a first winding (See [L1] in figure 1 of Bolus), and a second winding (See [L2] in figure 1 of Bolus); a first resistor (See [R1] in figure 1 of Bolus); a first capacitor (See [C1] in figure 1 of Bolus) comprising: a first side coupled in series with the first resistor (See the side of [C1] connected to node [Vsns1] in figure 1 of Bolus), wherein the first resistor and the first capacitor are coupled in parallel with the first winding (See in figure 1 of Bolus that the series connection of [R1] and [C1] is connected in parallel to [L1]), and a second side (See the side of [C1] connected to ground in figure 1 of Bolus) coupled to a second capacitor (See [C2] in figure 1 of Bolus which is connected to [C1] via the ground node); a second resistor (See [R2] in figure 1 of Bolus); the second capacitor comprising: a first side coupled in series with the second resistor (See the side of [C2] connected to node [Vsns2] in figure 1 of Bolus), wherein the second resistor and the second capacitor are coupled in parallel with the second winding (See that the serious connected [R2] and [C2] are connected in parallel to [L2] in figure 1 of Bolus), and a second side coupled to the first capacitor (See [C2] in figure 1 of Bolus which is connected to [C1] via the ground node); and a third capacitor (See [C3] in figure 1 of Bolus) comprising: a first side coupled between the first resistor and the first capacitor (See the side of [C3] connected to the node [Vsns1] in figure 1 of Bolus), and
a second side coupled between the second resistor and the second capacitor (See the side of [C3] connected to the node [Vsns2] in figure 1 of Bolus), wherein: a first voltage across the first capacitor is indicative of a first current flowing through the first winding, and a second voltage across the second capacitor is indicative of a second current flowing through the second winding (See paragraph [0026] of Bolus).
With respect to claim 3, Bolus discloses the circuit of claim 1, further comprising at least one third resistor (See [Rs1] in figure 1 of Bolus) coupled in parallel with at least one of the first capacitor, the second capacitor, or the third capacitor, wherein the at least one third resistor scales at least one of the first or second voltages (See [C1] in figure 1 of Bolus).
With respect to claim 4, Bolus discloses the circuit of claim 1, further comprising a plurality of switches to control current flows through the first (See [105] in figure 1 of Bolus) and second windings (See [110] in figure 1 of Bolus).
With respect to claim 5, Bolus discloses the circuit of claim 4, wherein: the plurality of switches comprises first (See [HS1] in figure 2 of Bolus) of and second switches (See [LS1] in figure 2 of Bolus) coupled in series and third (See [HS2] in figure 2 of Bolus) and fourth switches coupled in series (See [LS2] in figure 2 of Bolus), the first winding is coupled between the first and second switches (See the first winding [L1] in figure 2 of Bolus), and the second winding is coupled between the third and fourth switches (See the second winding [L2] in figure 2 of Bolus).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bolus as applied to claim 1 above, and further in view of Qiu et al. (US PUB 2009/0146635), hereinafter Qiu.
With respect to claim 2, Bolus discloses the circuit of claim 1, but fails to disclose further comprising a third resistor coupled in series with the third capacitor, wherein the third resistor alters a time constant of the coupled inductor. However, Qiu does disclose a third resistor (See [138] in figure 1 of Qiu) coupled in series with the third capacitor (See [140] in figure 1 of Qiu), wherein the third resistor alters a time constant of the coupled inductor (See paragraph [0024] of Qiu). Furthermore, it would have been obvious to one of ordinary skill in the art before the filing date of the invention to modify the device disclosed by Bolus to include the features disclosed by Qiu because doing so enables precision and adaptable current detection.
Allowable Subject Matter
Claims 6 and 7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 6, the prior art of record neither shows nor suggests the combination of structural elements wherein outputs of the first and second windings are coupled, the circuit further comprising: a third winding, wherein: a first side of the third winding is coupled in series with the coupled outputs of the first and second windings, and a second side of the third winding is coupled between the first and second capacitors.
With respect to claim 7, the prior art of record neither shows nor suggests the combination of structural elements comprising N-2 windings, wherein: N corresponds to a number of phases of the coupled inductor, and each winding of the N-2 windings corresponds to a respective phase and has an output coupled to the coupled outputs of the first and second windings; N-2 phase resistors, each corresponding to a respective phase; N-2 phase capacitors, each corresponding to a respective phase and comprising: a first side coupled in series with a respective one of the N-2 phase resistors, wherein each respective one of the N-2 phase resistors and one of the N-2 phase capacitors are coupled in parallel with a corresponding one of the N-2 windings, and a second side coupled to the coupled outputs of the first and second windings; and (N-1)! 1 coupling capacitors, each one of the (N-1)! -1 coupling capacitors comprising: a first side coupled between a first respective phase resistor and a corresponding first respective phase capacitor, and a second side coupled between a second respective phase resistor and a corresponding second respective phase capacitor.
Claims 8 allowed.
With respect to claim 8, the prior art of record neither shows nor suggests the combination of structural elements wherein the second side is coupled to the coupled outputs of the N windings; N first amplifiers, wherein: a first input to each first amplifier is coupled between a respective first resistor and a respective first capacitor, and a second input to each first amplifier is coupled to the coupled outputs of the N windings; and a second amplifier and N second resistors, wherein: a first input to the second amplifier is coupled to the coupled outputs of the N windings; and a second input to the second amplifier is coupled to a common node, wherein: each input to each respective winding is coupled in series with a respective one of the N second resistors, and each respective one of the N second resistors is further coupled to the common node, and a respective sum of an output voltage of each respective one of the N first amplifiers and an output voltage of the second amplifier is indicative of a respective current flowing through a respective winding of the N windings.
Claims 9-12 depend from allowed claim 8 and are therefore also allowed.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US .
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TEMILADE S RHODES-VIVOUR whose telephone number is (571)270-5814. The examiner can normally be reached M-F (flex schedule).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached at 571-272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/TEMILADE S RHODES-VIVOUR/ Examiner, Art Unit 2858
/HUY Q PHAN/Supervisory Patent Examiner, Art Unit 2858