Prosecution Insights
Last updated: October 25, 2026
Application No. 18/408,555

Generation of Hardware Description Language (HDL) Code Using Machine Learning

Final Rejection §103
Filed
Jan 09, 2024
Priority
Jan 10, 2023 — provisional 63/479,345
Examiner
WANG, RONGFA PHILIP
Art Unit
2199
Tech Center
2100 — Computer Architecture & Software
Assignee
Primis Inc.
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
2m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
469 granted / 554 resolved
+29.7% vs TC avg
Moderate +6% lift
Without
With
+6.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
9 currently pending
Career history
566
Total Applications
across all art units

Statute-Specific Performance

§101
14.9%
-25.1% vs TC avg
§103
35.6%
-4.4% vs TC avg
§102
20.2%
-19.8% vs TC avg
§112
24.2%
-15.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 554 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Detail Action This office action is in response to amendment filed on 7/6/2026. Claims 1-20 are pending. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 3-5, 7-8, 11, 13-14, and 16, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ogilvie (US 2008/0066046 A1) in view of Wang et al. (CN 202111142407 A) and further in view of Turek et al. (US 2019/0325108 A1) Per claim 1, Ogilvie discloses receiving a request which includes a natural-language description for a high-level representation of computer hardware behavior;( [0065], discloses generating HDL code based on user input including parameters to define optimization goal [0014], discloses user input of desired processing latency corresponding to functions desired corresponding to natural language description as disclosed in Applicant’s Specification [0028], “Natural Language Descriptions”…may include desired functions of the hardware behavior” . Also see [0014]) generating code which includes HDL code for a module,(see above) generating a testbench for the code, wherein features of the code and the module generation; ([0129]-[0130] discloses generating testbench to verify functionality corresponding to features of the code using code simulation ) executing a functional simulation of the code using the testbench; (see above, [0129-0130], see verify the functionality of the HDL code) and sending the code to be presented when the function simulation passes tests of the testbench.([0130], discloses testbench verify if the outputs are correct. [0131], discloses generated HDL code as options and presented to user. [0129], discloses generating HDL representation with instrumentation code for debugging and profiling and for production, inherently discloses the HDL code without instrumentation is presented.. ) Ogilvie does not, however Wang discloses Discloses using trained deep neural network to generation function codes from natural language. (see. abstract & pp. 3 discloses using deep neural network to generate code) wherein the request is used as input to the deep neural network (Since the deep neural network is used to generated code, and after combining Ogivlie and Wang, the request is considered used as input to the combination Ogivlie and Wang and therefore as input to the deep neural network) and a module generation request as input into the deep neural network( see similar reason above.) Therefore, it would have been obvious to a person of ordinary skill before the effective filing date of the invention to incorporate the teachings of Wang into the teachings of Ogilvie to include the limitation disclosed by Wang The modification would be obvious to one of ordinary skill in the art to want to improve code correctness by combining neural network as suggested by Wang(see Abstract) Ogilvie/Wang does not, however, Turek discloses Using deep neural network to generate a testbench ([0059]-[0060], using machine learning (neural network) for HDL generator, simulation and evaluation/test and Fig. 2,see 214 performance indicator improved, no, then reject, re-apply machine learning model) Therefore, it would have been obvious to a person of ordinary skill before the effective filing date of the invention to incorporate the teachings of Turek into the teachings of Ogilvie/Wang to include the limitation disclosed by Turek. The modification would be obvious to one of ordinary skill in the art to want to converge to a best configuration via repeated reconfiguration ([0105]) Per claim 3, the rejection of 1 is incorporated. Ogilvie/Wang /Turek discloses wherein sending the code and related HDL code further comprises sending the module to a user interface of a development environment using an API (application programming interface) call. (Ogilvie, [0130], discloses MATLAB corresponding to development environment and functions call corresponding to API call. ) Per claim 4, the rejection of 1 is incorporated. Ogilvie/Wang /Turek discloses wherein the features of the code include at least one of: a number of inputs, a number of outputs, functional keywords, hardware keywords, or memory keywords. (Ogilvie [0065], discloses define optimization goals, [0073-74] discloses latency corresponding to functional keywords) Per claim 5, the rejection of 1 is incorporated. Ogilvie/Wang /Turek discloses wherein in the HDL codes are in Verilog or VHSIC (Very High-Speed Integrated Circuit) Hardware Description Language (VHDL). (Ogilvie [0065], discloses Verilog) Per claim 7, the rejection of 1 is incorporated. Ogilvie/Wang /Turek discloses further comprising writing diagnostic information to temporary files that are processed at the end of the simulation to create a list of issues identified within the code. (Turek, Fig. 2, 216, perform simulation, 218, performance indicators in database, 214/222, at the end of simulation determine if issues arise.) Per claim 8, the rejection of 1 is incorporated. Ogilvie/Wang /Turek discloses wherein the deep neural network is trained on a data set of synthesizable HDL code blocks. (Turek, [0073], discloses training data in database including configuration of parameters as part of HDL code.) Per claims 11 and 13, see rejections of claims 1 and 3. Per claim 14, 19, see rejection of claim 8. Per claims 16, see rejections of claims 1. Claim(s) 2, 12 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ogilvie (US 2008/0066046 A1) in view of Wang et al. (CN 202111142407 A) and further in view of Turek et al. (US 2019/0325108 A1) and further in view of Sharer (CN 1497704A) Per claim 2, the rejection of 1 is incorporated. Ogilvie/Wang /Turek discloses wherein the re-generation (similarly generating) uses the deep neural network and the request as input to the deep neural network (continue from rejection of claim 1) Ogilvie/Wang /Turek does not, however, Sharer discloses further comprising re-generating the module when the functional simulation fails, . (pp. 6, discloses after design, if testing/simulation fails, design must be corrected via repeating the design step. The repeating basically repeats the same generation step. Ogilvie, [0130], discloses verify functionality of HDL code via simulation.) Therefore, it would have been obvious to a person of ordinary skill before the effective filing date of the invention to incorporate the teachings of Sharer into the teachings of Ogilvie/Wang /Turek to include the limitation disclosed by Sharer. The modification would be obvious to one of ordinary skill in the art to want to correct failure by going back to previous design process after simulation fails.) Per claims 12 and 17, see rejection of claim 2. Claim(s) 6 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ogilvie (US 2008/0066046 A1) in view of Wang et al. (CN 202111142407 A) and further in view of Turek et al. (US 2019/0325108 A1) and Nelson et al. (US 20080288234 A1) Per claim 6, the rejection of 1 is incorporated. Ogilvie/Wang /Turek does not, however, Nelson discloses wherein executing a functional simulation further comprises executing a syntactically correct testbench against the code. ([0075], discloses checking HDL code syntactic correctness.) Therefore, it would have been obvious to a person of ordinary skill before the effective filing date of the invention to incorporate the teachings of Nelson into the teachings of Ogilvie/Wang /Turek to include the limitation disclosed by Nelson. The modification would be obvious to one of ordinary skill in the art to want to ensure syntax corrected for further processing. Per claim 18, see rejection of claim 18. Claim(s) 9-10, 15 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ogilvie (US 2008/0066046 A1) in view of Wang et al. (CN 202111142407 A) and further in view of Turek et al. (US 2019/0325108 A1) and Willson et al. (US 20180143965 A1) Per claim 9, the rejection of 1 is incorporated. Ogilvie/Wang /Turek does not, however, Wilson discloses wherein the deep neural network is a language model. ([0021] discloses deep neural network as a language model) Therefore, it would have been obvious to a person of ordinary skill before the effective filing date of the invention to incorporate the teachings of Wilson into the teachings of Ogilvie/Wang /Turek to include the limitation disclosed by Wilson. The modification would be obvious to one of ordinary skill in the art to want to incorporate language model to process user input. Per claim 10, the rejection of claim 9 is incorporated. Ogilvie/Wang /Turek does not, however, Willson discloses wherein the deep neural network neural network that is a transformer, encoder-decoder transformer, a text-to-text transformer or a generative adversarial network (GAN) (Turek, [0051], disclose machine learning model perform transformation corresponding to function of a transformer.). Per claims 15 and 20, see rejection of claim 9. Response to Arguments Per remark, page 3, second paragraph, Applicant argues Ogilvie not disclosing “natural language description” and further argues “natural language” is ambiguous. However, Applicant’s own Specification [0028], specifically discloses desired functionality is considered natural language description. Ogilvie [0014] clearly discloses desired processing latency corresponding to desired functionality. Applicant’s own Specification nor claim has no disclosure of “natural language description” is ambiguous. Per remark page 2, Applicant argues Wang can not teach feeding the features of the code and the original “module generation request” back into DNN to dynamically generate a testbench. There is no original module generation request in claim 1. The limitation “a module generation request” does not automatically refer to any prior limitation. And therefore, such argument is considered out of scope of the claimed limitation. Per remark, page 3, related to the limitation of “sending the code to be presented when he function simulation passed the tests of the best bench” Applicant argues Ogilvie [0130] discloses presenting HDL code, then compiling and tested. However, Ogilvie [0129], discloses debugging and testing instrumented HDL presentation. And inherently, after the debugging and test is passed, a new HDL representation without instrumentation is presented to production. Per remark, page 4, Applicant argues Turek is related to performance optimization of hardware instead of functional simulation as recited. Revised office action is included in this office action reciting new reference. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. It is noted that any citation [[s]] to specific, pages, columns, lines, or figures in the prior art references and any interpretation of the references should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. [[See, MPEP 2123]] Any inquiry concerning this communication or earlier communications from the examiner should be directed to Philip Wang whose telephone number is 571-272-5934. The examiner can normally be reached on Monday – Friday 8:00AM -4:00PM. Any inquiry of general nature or relating to the status of this application should be directed to the TC2100 Group receptionist: 571-272-2100. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lewis Bullock, can be reached at 571-272-3759. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /PHILIP WANG/Primary Examiner, Art Unit 2199
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Prosecution Timeline

Jan 09, 2024
Application Filed
Mar 06, 2026
Non-Final Rejection mailed — §103
Jul 06, 2026
Response Filed
Sep 28, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
91%
With Interview (+6.2%)
3y 0m (~2m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 554 resolved cases by this examiner. Grant probability derived from career allowance rate.

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