DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. JP 2021-119997, filed on 07/20/2021. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/10/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2, 10-11, and 20 is/are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by US 7336127 by Kennan.
Regarding claim 1, Kennan teaches a power amplifier circuit (fig. 2) comprising:
an external input terminal (input coming into #50) and an external output terminal (output coming out of #37);
a first power amplifier connected to the external input terminal (#52);
second and third power amplifiers (#58 and #64);
a first power supply terminal connected to the second power amplifier (connection of V2 to #58); and
a second power supply terminal connected to the third power amplifier (connection of V3 to #64), wherein
the second and third power amplifiers are connected in parallel with each other between the first power amplifier (#52) and the external output terminal (output coming out of #37),
a first power supply voltage (V1) which is variable to multiple discrete first voltage levels (Abstract: V1 is variable) is supplied to the second power amplifier (#58) via the first power supply terminal, and
a second power supply voltage (V2) which is variable to multiple discrete second voltage levels (Abstract: V3 is variable) is supplied to the third power amplifier (#64) via the second power supply terminal, the multiple discrete second voltage levels being different from the multiple discrete first voltage levels.
Regarding claim 2, Kennan teaches the power amplifier circuit according to Claim 1, wherein:
the second power amplifier is a carrier amplifier; and the third power amplifier is a peaking amplifier (Abstract).
Regarding claim 10, Kennan teaches a power amplifier circuit comprising:
an external input terminal (input coming into #50) and an external output terminal (output coming out of #37);
a first power amplifier connected to the external input terminal (#52);
second and third power amplifiers (#58 and #64); and
first and second power supply terminals separately connected to different terminals of a digital tracker (#38; examiner interprets digital tracker to mean any sort of power supply since applicant’s specification par. 24 states that the digital tracker works with analog and digital mode), wherein
the second and third power amplifiers are connected in parallel with each other between the first power amplifier (#52) and the external output terminal (output coming out of #37),
the first power supply terminal (V2) is connected to the second power amplifier (#58), and
the second power supply terminal (V3)is connected to the third power amplifier (#64).
Regarding claim 11, Kennan teaches the power amplifier circuit according to Claim 10, wherein:
the second power amplifier is a carrier amplifier; and the third power amplifier is a peaking amplifier (Abstract).
Regarding claim 20, Kennan teaches a power amplification method for amplifying power of a radio-frequency signal by using second (Fig. 2 #58) and third power amplifiers (#64), the second and third power amplifiers being connected in parallel with each other between a first power amplifier (#52) and an external output terminal (output coming out of #37), the first power amplifier being connected to an external input terminal (#52 is connected to the input signal through #50), comprising:
supplying a first power supply voltage (V2) which is variable to multiple discrete first voltage levels (Abstract: V2 is variable) to the second power amplifier (#58); and
supplying a second power supply voltage (V3) which is variable to multiple discrete second voltage levels (Abstract: V3 is variable) to the third power amplifier (#64), the multiple discrete second voltage levels being different from the multiple discrete first voltage levels.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 10-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20160164466 by Briffa et al. in view of US 7336127 by Kennan,
Regarding claim 10, Briffa teaches a power amplifier circuit (Fig. 1) comprising:
an external input terminal (Input into system of #10) and an external output terminal (#32);
second and third power amplifiers (PA 1 #18 and PA 2 #20); and
first (V1(t)) and second (V2(t)) power supply terminals separately connected to different terminals of a digital tracker (#22, 24; receives control signals from controller #12 which outputs digital signals), wherein
the second and third power amplifiers are connected in parallel with each other (PA 1 and PA 2 are connected in parallel between the power divider #16 and the output #32)
the first power supply terminal (V1(t)) is connected to the second power amplifier (PA 1), and
the second power supply terminal (V2(t)) is connected to the third power amplifier (PA 2).
Briffa fails to teach a first power amplifier connected to the external input terminal, and that the second and third power amplifiers are connected to the first power amplifier, however, input amplifiers (or driver amplifiers) of this sort are known in the art. US 7336127 by Kennan teaches a power amplifier power supply system with driver amplifier input stages. It would be obvious to a person of ordinary skill in the art before the effective filing date of the invention to combine the driver amplifier of Kennan with the power amplifier system of Briffa because both arts are analogous and being used for similar purposes.
Regarding claim 11, Briffa and Kennan teach the power amplifier circuit according to Claim 10, wherein: the second power amplifier is a carrier amplifier; and the third power amplifier is a peaking amplifier (Par. 48).
Allowable Subject Matter
Claims 3-9 and 12-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art fails to teach the different types of average power tracking and digital envelope tracking modes that the dependent claims state in the limitations.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NAREH SHAMIRYAN whose telephone number is (703)756-4616. The examiner can normally be reached M-F: 7:00AM-4:00PM PT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren-Baltzell can be reached at (571) 272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/NAREH SHAMIRYAN/Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843
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