DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed 26 January 2026 has been entered.
Claims 1-4 and 6-14 remain pending in the application, wherein claim 1 has been amended and claims 5 and 15 are newly canceled. The amended limitations were previously recited in claim 5. Accordingly, no new matter has been introduced by these amendments.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 4, 6, and 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Matsumoto (US 2014/0363971, previously cited).
Claim 1: Matsumoto teaches a semiconductor device (i.e. an article) including a multilayer copper wiring (paragraph 0038). A manganese oxide film (MnOx film) is formed on an interlayer insulating film (i.e. a substrate) and on inner walls of a trench and via (paragraph 0049), wherein the interlayer insulating film may be a silicon-containing oxide film which may be SiO2 (paragraph 0042) (i.e. a substrate of SiO2; i.e. a MnOx layer directly contacting the SiO2 substrate). Alternatively, the substrate may be a glass substrate (paragraph 0134). The manganese oxides may include those having multiple valences such as MnO, MnO2, etc. (i.e. oxidation states), represented by MnOx with 1≤x≤2 (paragraph 0050). Matsumoto teaches that annealing the manganese oxide film in a reducing atmosphere can improve adhesivity (paragraph 0087) (i.e. an adhesion layer of MnOx). Furthermore, being substantially identical material, the MnOx layer is considered to be an adhesion layer because substantially identical materials have substantially identical properties and functions. See MPEP § 2112.01. Thereafter, an upper copper wiring layer is formed (paragraph 0085) (i.e. a copper layer deposited on the MnOx layer; i.e. deposited on the adhesive layer). The MnOx layer is annealed in a reducing atmosphere (paragraphs 0084 and 0087). Annealing in a reducing atmosphere would result in formation of an oxygen gradient such that a relatively lower oxidation state would be present nearer the surface (i.e. adjacent to the copper layer) due to being reduced (i.e. based on simple chemistry principles).
While not teaching a singular example of the instantly claimed article (e.g. the relative locations of the different manganese oxides), in view of the limited number of listed oxidation states and of MnOx having 1≤x≤2, it would have been obvious to one of ordinary skill in the art before the effective filing date for the relatively higher oxidation state (i.e. adjacent the substrate) to include MnO2 and for the relatively lower oxidation state (i.e. adjacent the copper layer) to include MnO as these are the highest and lowest oxidation states, respectively, of the listed manganese oxides, and one would have had a reasonable expectation of success.
Claim 4: Matsumoto teaches a manganese oxide film (paragraph 0049), and does not require other materials to be present (i.e. the adhesion layer consists essentially of the manganese oxide).
Claim 6: Matsumoto teaches that the manganese oxide film (i.e. the adhesion layer as outlined above) is formed on inner walls of a trench and via (i.e. on an interior surface of a via hole).
Claims 10-12: Matsumoto teaches that a higher barrier property can be obtained if the thickness of the manganese oxide film (i.e. the adhesion layer as outlined above) is equal to or larger than about 1 nm (paragraph 0093). This range overlaps the instantly claimed ranges and the courts have held that a prima facie case of obviousness exists where claimed ranges overlap, lie inside of, or are close to ranges disclosed in the prior art. See MPEP § 2144.05. It is noted that as of the writing of this Office Action, no demonstration of a criticality to the claimed ranges has been presented.
Claims 2-3 and 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Matsumoto (US 2014/0363971, previously cited) as applied to claim 1 above, and further in view of Miki et al. (US 9,305,470, previously cited) and as evidenced by Corning Incorporated (Material Information, NPL previously cited).
Claims 2-3: The teachings of Matsumoto regarding claim 1 are outlined above. Matsumoto teaches a semiconductor device (paragraph 0038) having a trench and via (paragraph 0041). A manganese oxide film serves as a barrier film (paragraph 0038) and also provides improved adhesion after annealing in a reducing atmosphere (paragraph 0087) and an upper copper wiring layer is formed on the manganese oxide film (paragraphs 0085 and 0135). The manganese oxide film is formed on an interlayer insulating film (i.e. a substrate) and on inner walls of a trench and via (i.e. directly on the substrate at least in the trench and via) (paragraph 0049), wherein the interlayer insulating film may be a silicon-containing oxide film which may be SiO2 (paragraph 0042). Alternatively, the substrate may be a glass substrate (paragraph 0134). However, Matsumoto does not disclose the type of glass that may be used as a substrate.
In a related field of endeavor, Miki teaches a Cu film for a display device (i.e. a semiconductor device) on an oxygen-containing insulator layer that may contain Mn (Col. 4, lines 43-50) (i.e. a manganese oxide). Mn is preferred as an adhesion-improving element because it exhibits strong concentration phenomenon, such as to the interface to the oxygen-containing insulator layer, by heat treatment during or after deposition of the Cu alloy film (Col. 5, lines 56-64). Miki teaches that the substrate may be any used for a display device such as non-alkali glass, high-strain-point glass, soda-lime glass, etc. (Col. 10, lines 3-8). Specific examples were prepared using Eagle 2000 manufactured by Corning Inc. (Col. 13, lines 42-46; Col. 17, line 63 to Col. 18, line 18). Eagle 2000, being a manufactured glass product, is known to be an alkaline earth boro-aluminosilicate glass type (i.e. an aluminoborosilicate glass), as evidenced by Corning Incorporated (p. 1).
As Matsumoto and Miki both teach a semiconductor/display device of a glass substrate that includes a Cu film on an adhesion-improving layer containing manganese and oxygen that is subjected to a heat treatment/annealing, they are analogous. It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the generally disclosed glass substrate of Matsumoto to include where the substrate is a glass substrate of Eagle 2000 (i.e. an aluminoborosilicate glass) as taught by Miki, as this type of glass is conventionally known to afford a device having a manganese-containing adhesion layer and a copper layer (i.e. suitable for the same purpose), and one would have had a reasonable expectation of success.
Claim 13: Matsumoto is silent regarding the thickness of the copper layer. However, Miki teaches that the entire thickness of the Cu alloy film (second layer and first layer) is preferably about 200 nm or more and about 600 nm or less (Col. 7, lines 37-40). However, Miki does not provide a reason for the upper limit of the thickness, and the limitations of instant claim 13 is merely a change in size without an otherwise patentable distinction of the claimed article over the prior art device as no demonstration of a criticality to the claimed ranges has been presented. See MPEP § 2144.04(IV)(A).
Claim 14: The limitations of claim 14 combine limitations recited in claims 1, 3, 4, and 6, which are each taught by or obvious over the teachings of Matsumoto or Matsumoto in view of Miki as evidenced by Corning Incorporated, as outlined above.
Claims 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over Matsumoto (US 2014/0363971, previously cited) as applied to claim 1 above, and further in view of Vandemeer et al. (US 2016/0219704, previously cited).
Claim 7: The teachings of Matsumoto regarding claim 1 are outlined above. Matsumoto teaches a semiconductor device (paragraph 0038) having a trench as a wiring groove and a via as a connection hole (i.e. a first opening on a first surface of the substrate) with the lower copper wiring layer exposed at the bottom of the via (i.e. a second opening on a second surface of the substrate) (paragraph 0041). However, Matsumoto does not teach the specific details of the shape of the vias.
In a related field of endeavor, Vandemeer teaches semiconductor components to form various types of circuits that contain conductive through vias (TVs) (paragraph 0003). The TVs are hermetically sealed by first creating an hourglass TV in the substrate, such that the hourglass TV has a waist opening, and a conductive conformal coating covers at least a portion of an interior wall of an interior wall of the hourglass TV and completely fills the waist opening to provide a hermetic seal between an upper opening (i.e. a first opening) and a lower opening (i.e. a second opening) of the hourglass TV (paragraph 0008). The substrate may be a glass substrate (paragraph 0008), and the thickness of the substrate may be between 20 µm to 300 µm (paragraph 0040). The waist opening has a width that is less than a width of the upper opening and a width of the lower opening (paragraph 0009). The upper opening and lower opening have respective widths W1 and W2 that may be between 20-60 µm and the waist opening has a width W3 of 10-30 µm (paragraph 0041). The waist opening width (i.e. diameter) is less than 100% since it is less than a width (i.e. diameter) of the upper opening or lower opening (i.e. first and second openings, respectively) and the disclosed example width ranges result in the waist opening width being about 16% (calculated as 10 µm divided by 60 µm) to less than 100%, which overlaps the instantly claimed range. The courts have held that a prima facie case of obviousness exists where claimed ranges overlap, lie inside of, or are close to ranges in the prior art. See MPEP § 2144.05. It is noted that as of the writing of this Office Action, no demonstration of a criticality to the claimed ranges has been presented.
As Matsumoto and Vandemeer both teach a semiconductor device/component having a conductive via (i.e. the copper in the via of the device of Matsumoto is conductive based on the nature of metals) connecting a first opening to a second opening, they are analogous. It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the generally disclosed glass substrate and via of Matsumoto to include a glass substrate and vias having the dimensions disclosed by Vandemeer as this is considered conventionally known features of a semiconductor device (i.e. simple substitution of one known element for another to obtain predictable results), and one would have had a reasonable expectation of success.
Claims 8-9: Vandemeer teaches the thickness of the substrate may be between 20 µm to 300 µm (paragraph 0040) and the upper opening and lower opening have respective widths W1 and W2 that may be between 20-60 µm and the waist opening has a width W3 of 10-30 µm (paragraph 0041). The aspect ratio of the via hole is considered to be a thickness of the substrate since the via extends through the substrate to the width (i.e. diameter) of the via, which would be about 1:3 to about 15:1 (calculated as 20:60 to 300:20, using substrate thickness and widths of upper and lower openings), which overlaps the instantly claimed range. See MPEP § 2144.05.
Response to Arguments
Applicant's arguments filed 26 January 2026 have been fully considered but they are not persuasive for the following reasons:
Applicant argues, see p. 6, Matsumoto does not teach that the annealing process in a reducing atmosphere would necessarily have the same oxidation gradient as in instant claim 1 because of differences in the annealing process (i.e. specifically, Matsumoto does not teach the same pre-anneal step). That is, the instant disclosure provides an oxidizing step (understood to result in the higher oxidized state of MnO2 near the substrate) before the reducing step (understood to result in the lower oxidized state of MnO near the surface to be adjacent the layer of copper). However, in spite of not disclosing a pre-anneal step, Matsumoto teaches forming a manganese oxide film by reacting manganese compound gases with an oxygen-containing gas (paragraph 0080), which is analogous to a pre-oxidizing step. The MnOx layer is annealed in a reducing atmosphere (paragraphs 0084 and 0087), and the manganese oxides may include those having multiple valences such as MnO, MnO2, etc. (i.e. oxidation states), represented by MnOx with 1≤x≤2 (paragraph 0050). Specifically having MnOx with 1≤x≤2 (i.e. MnO and MnO2) coupled with the formation of manganese oxide in an oxidizing atmosphere (i.e. due to the oxygen-containing gas) followed by annealing in a reducing atmosphere (i.e. reducing the oxidation state) renders obvious to one of ordinary skill in the art for the highest oxidation state (i.e. where x=2, which results in MnO2) to be closest to the substrate (i.e. due to being furthest from the surface being reduced) and for the lowest oxidation state (i.e. where x=1, which results in MnO) to be closest to the surface being reduced (i.e. closest to the copper layer). Applicant has not provided objective evidence that this method of oxidizing-then-reducing taught by Matsumoto would not result in the instantly claimed gradient other than to point out that the method is different.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIM S HORGER whose telephone number is (571)270-5904. The examiner can normally be reached M-F 9:30 AM - 4:00 PM EST.
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/KIM S. HORGER/Examiner, Art Unit 1784