Prosecution Insights
Last updated: October 25, 2026
Application No. 18/409,545

MULTI-TRAINED SCALABLE PREFETCHER, AND RELATED METHODS

Non-Final OA §103
Filed
Jan 10, 2024
Priority
Jan 11, 2023 — provisional 63/438,358
Examiner
YU, JAE UN
Art Unit
2138
Tech Center
2100 — Computer Architecture & Software
Assignee
Ampere Computing LLC
OA Round
3 (Non-Final)
90%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
677 granted / 753 resolved
+34.9% vs TC avg
Moderate +10% lift
Without
With
+9.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
13 currently pending
Career history
776
Total Applications
across all art units

Statute-Specific Performance

§101
5.3%
-34.7% vs TC avg
§103
51.1%
+11.1% vs TC avg
§102
24.8%
-15.2% vs TC avg
§112
8.8%
-31.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 753 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 1. Claims 1, 2, 3, 11-13, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Manne et al. (US 2011/0072218), “Manne” in view of Kapil et al. (US 2015/0339233), “Kapil”. 2. As per claim 1, Manne disclose a processing circuit [Execution Core 22, figure 1], a cache memory [caches, figure 1]; and a prefetcher circuit [cache prefetchers, figure 1] coupled to the cache memory. Manne does not disclose expressly receive a first memory address of requested data; generate a first plurality of address offsets; and generate a first plurality of prefetch requests directed to one or more prefetch addresses, each of the one or more prefetch addresses based on the first memory address and a corresponding one of the first plurality of address offsets. Kapil disclose receive a first memory address of requested data [a base address, abstract]; generate a first plurality of address offsets [a plurality of offsets, abstract]; and generate a first plurality of prefetch requests directed to one or more prefetch addresses [“prefetching operations”, abstract], each of the one or more prefetch addresses based on the first memory address [a base address, abstract] and a corresponding one of the first plurality of address offsets [a plurality of offsets, abstract]. Manne and Kapil are analogous art because they are from the same field of endeavor of prefetching. Before the effective filing date of the application, it would have been obvious to a person or ordinary skill in the art to modify Manne by including the prefetch addressing system taught by Kapil in the abstract. The motivation for doing so would have been prefetch efficiency improvement as expressly taught by Kapil in paragraph 2. 3. As per claim 2, Kapil discloses the prefetcher further configured to: receive an activity level indicator indicating an activity level of a data interface; and based on the activity level indicator, provide a second plurality of prefetch requests among the first plurality of prefetch requests to a prefetch request buffer [vector-indirect prefetch based on scatter/gather type memory operations, paragraph 5]. 4. As per claim 3, Kapil discloses to determine the second plurality of prefetch requests based on priority levels corresponding to each of the first plurality of address offsets [vector-indirect prefetch based on scatter/gather type memory operations, paragraph 5]. 5. As per claims 11-13 and 21, the examiner direct the applicant’s attention to claims rejection above. Conclusion A. Allowable Subject Matter Claims 4-10 and 14-20 are objected to. The closest prior art of record, “Manne” discloses a prefetch system comprising a prefetcher and a processing core in figure 1. The primary reasons for allowance of claims 4 and 14 in the instant application is the combination with the inclusion in these claims that “a plurality of offset generators configured to generate the first plurality of address offsets, wherein each of the plurality of offset generators employs one of a plurality of algorithms each distinct from the others”. The prior art of record neither anticipates nor renders obvious the above recited combination. As allowable subject matter has been indicated, applicant's response must either comply with all formal requirements or specifically traverse each requirement not complied with. See 37 C.F.R. § 1.111(b) and § 707.07(a) of the MPEP. B. Claims Rejected Claims 1-3, 11-13, and 21 are rejected. C. Direction for Future Remarks Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAE UN YU whose telephone number is (571)272-1133. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tim Vo can be reached on (571)272-3642. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAE U YU/Primary Examiner, Art Unit 2138
Read full office action

Prosecution Timeline

Show 2 earlier events
Dec 09, 2025
Examiner Interview Summary
Dec 09, 2025
Applicant Interview (Telephonic)
Dec 31, 2025
Response Filed
Mar 20, 2026
Final Rejection mailed — §103
May 13, 2026
Response after Non-Final Action
Jun 22, 2026
Request for Continued Examination
Jun 25, 2026
Response after Non-Final Action
Oct 01, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
90%
Grant Probability
99%
With Interview (+9.7%)
2y 6m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 753 resolved cases by this examiner. Grant probability derived from career allowance rate.

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