Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
A series of singular dependent claims is permissible in which a dependent claim refers to a preceding claim which, in turn, refers to another preceding claim.
A claim which depends from a dependent claim should not be separated by any claim which does not also depend from said dependent claim. It should be kept in mind that a dependent claim may refer to any preceding independent claim. In general, applicant's sequence will not be changed. See MPEP § 608.01(n).
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are indicated in the table below, along with corresponding structure and/or lack thereof:
Claim limitation
Claim numbers
Structure (PGPUB citation)
battery signal transmitter unit
1 & 15
Electrical connection between the lithium battery module and battery management system (¶0019)
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Katayama et al. (USPGPN 2019/0023131), in view of Carrier et al. (USPGPN 2005/0077878).
Regarding Claims 1 & 15, Katayama (Fig.7) teaches a low-voltage lithium battery circuitry (50), comprising: a busbar (electrical conductors connecting BL to 52/53/54; Fig.8 teaches the use of the electric storage device 103 as a home power supply, ¶0167: electric power to be used in the house is supplied using the electric storage device 106.; Examiner’s Note: It is known that house electric systems require high current, and Oxford English Dictionary defines busbar as “An electrical conductor or group of conductors that carries a large current, typically between circuits”, therefore the conductors taught by Katayama can be interpreted as busbars), a battery signal transmitter unit (connection between BL, 65, & 68 and 63 & 66), a battery management system (10, 63, 64, 66, 67, 69-73, 80, 81, 85-88b), and a lithium battery module (BL, 65, & 68),
wherein the battery signal transmitter unit is connected to each of the lithium battery module and the battery management system (connection is between BL, 65, & 68 and 63 & 66);
the lithium battery module is connected to the battery management system through a first port of the busbar (61/81) and a third port of the busbar (62/82);
the battery management system is connected to a positive terminal of a battery system through a second port of the busbar (83) and connected to a negative terminal of the battery system through a fourth port of the busbar (84), so as to supply power to an external load that is connected between the positive terminal of the battery system and the negative terminal of the battery system (54);
the lithium battery module is configured to provide energy for the external load and supply power to the battery management system (¶0107: supplied to the load);
the battery signal transmitter unit is configured to transmit electrical parameters acquired in the lithium battery module to the battery management system, wherein the electrical parameters comprise cell voltage signals and battery temperature signals (63 and 65); and
the battery management system is configured to monitor the electrical parameters and, in response to determining that any one of the electrical parameters exceeds a protection threshold range corresponding to the any one of the electrical parameters (¶0137: abnormal voltage or temperature), perform a protection operation (¶0140: charging or discharging is stopped when an abnormality is detected).
Katayama fails to explicitly teach the electrical parameters comprising an internal total voltage signal.
However, Carrier (Fig.3A) teaches a lithium battery circuitry which includes a battery signal transmitter unit which transmits the electrical parameter of an internal total voltage signal (the connections between 115 A/115B and 125 which include a VSTACK voltage).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama with Carrier to include a total voltage measuring circuit and transmit the internal total voltage signal as an electrical parameter. Doing so allows for quicker processing of a total battery stack voltage by measuring the total stack voltage rather than sampling each cell voltage and finding the sum of the values.
Regarding Claim 2, Katayama (Fig.7), as modified, further teaches wherein the lithium battery module comprises:
n lithium-ion cells sequentially connected in series (SMO1-SMO16);
m temperature sampling sensors (65 x16 requires 16 sensors); and
a connection comprising an internal total voltage signal (as modified by Carrier - internal total voltage measurement), n voltage signals (Katayama - 16 voltage signal connections), and m temperature signals (Katayama – 65 x16 requires 16 signal connections), where each of n and m is a positive integer greater than 2,
wherein the internal total voltage signal is connected to a sampling node on a positive terminal of a tail lithium-ion cell of the n lithium-ion cells, to receive the internal total voltage signal of the lithium battery module (Carrier – Fig.3A, 115b connected to the positive terminal of the first cell in stack 105);
the n voltage signals are respectively connected to a sampling node on a negative terminal of a head lithium-ion cell of the n lithium-ion cells and sampling nodes respectively on positive/negative terminals of intermediate lithium-ion cells of the n lithium-ion cells, to receive the cell voltage signals of the head lithium-ion cell and the intermediate lithium- ion cells (Katayama – voltage measurement connections starting at the negative terminal of SMO16 and between each cell);
the m temperature signals are respectively connected to the m temperature sampling sensors, to receive the battery temperature signals respectively acquired by the m temperature sampling sensors (Katayama – 65 x16 requires 16 signal connections); and
each of the intermediate lithium-ion cells is one of the n lithium-ion cells that is located between the tail lithium-ion cell and the head lithium-ion cell (SMO2-SMO15).
Katayama, as modified, discloses the claimed invention except for it does not teach a female sampling connector with terminals for receiving the connections for the battery signals. It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to include a female connector and male connector between the lithium battery module and the battery management system, with enough connection terminals for the measurement signals, to allow for connection/disconnection of the lithium battery module from the battery management system, since it has been held that constructing a formerly integral structure in various elements involves only routine skill in the art. Nerwin v. Erlichman, 168 USPQ 177, 1. Doing so allows for easier replacement of the lithium battery module in the event of a failed cell, inefficient battery module, or failed temperature measuring device, without the need to replace processors and other electronic components of the battery management system.
Regarding Claim 3, Katayama (Fig.7), as modified, further teaches wherein the m temperature sampling sensors comprise:
a head temperature sampling sensor (65 associated with SMO16) arranged around the negative terminal (¶0122: temperature of each cell may be measured; for the temperature measuring part to measure a cell temperature by way of a thermistor, the thermistor must be near the cell and therefore near the negative terminal) of the head lithium-ion cell and configured to acquire a battery temperature signal of the head lithium-ion cell (¶0122: temperature of each cell may be measured);
a plurality of intermediate temperature sampling sensors (65 associated with SMO2-SMO15) respectively arranged around respective negative terminals (¶0122: temperature of each cell may be measured; for the temperature measuring part to measure a cell temperature by way of a thermistor, the thermistor must be near the cell and therefore near the negative terminal) of ones of the intermediate lithium-ion cells and configured to acquire respective battery temperature signals of the ones of the intermediate lithium-ion cells (¶0122: temperature of each cell may be measured); and a
tail temperature sampling sensor (65 associated with SMO1) arranged around the positive terminal (¶0122: temperature of each cell may be measured; for the temperature measuring part to measure a cell temperature by way of a thermistor, the thermistor must be near the cell and therefore near the negative terminal) of the tail lithium-ion cell and configured to acquire a battery temperature signal of the tail lithium-ion cell (¶0122: temperature of each cell may be measured),
wherein each of the intermediate temperature sampling sensors is one of the m temperature sampling sensors that is located between the tail temperature sampling sensor and the head temperature sampling sensor (65 associated with SMO2-SMO15).
Claim(s) 4-6, 16, & 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Katayama, in view of Carrier, as applied to claim 3 above, and further in view of Turner et al. (US Patent 6,249,106 B1 – published 2001), Wang et al. (USPGPN 2006/0139010), and Kessels et al. (USPGPN 2023/0258726).
Regarding Claims 4 & 16, Katayama (Fig.7), as modified, further teaches wherein the battery management system comprises a male sampling connector (as disclosed in the rejection of claim 2, separable connectors), a sampling circuit (67 & 72), a microcontroller unit (MCU) module (80), and a communication device (communication between 80 and 53/54 indicates presence of a communication device) and at least one metal-oxide-semiconductor field effect transistor (MOSFET) (85/86),
wherein the male sampling connector is connected to the female sampling connector, to receive the internal total voltage signal, the cell voltage signals, and the battery temperature signals (as disclosed in the rejection of claim 2, separable connectors);
the sampling circuit is connected to the male sampling connector and configured to: receive the internal total voltage signal, the cell voltage signals, and the battery temperature signals (as disclosed in the rejection of claim 2, separable connectors); acquire a current sampling signal (69/70/71); and transmit the internal total voltage signal, the cell voltage signals, the battery temperature signals, and the current sampling signal to the MCU module after collecting and filtering the internal total voltage signal, the cell voltage signals, the battery temperature signals, and the current sampling signal (¶0139: 67 monitors for abnormalities in the measurements of the voltage, temperature, and current; ¶0140: 72 provides notifications to MCU 80 for charge discharge control);
the MCU module is connected to the sampling circuit and configured to generate a fault alarm signal (¶0140: MCY 80 stops charging/discharging in the event of an abnormality) in response to determining at least one of: any of the cell voltage signals being greater than an overvoltage threshold, the internal total voltage signal being greater than the overvoltage threshold, the internal total voltage signal being less than an undervoltage threshold, any of the cell voltage signals being less than the undervoltage threshold, any of the battery temperature signals being greater than a battery overtemperature threshold (¶0137: temperature larger than the threshold value generates an abnormality), or the current sampling signal being greater than an overcurrent threshold (¶0138: current measurement is larger than the threshold value an abnormality is generated); and
the communication device is configured to establish a bidirectional communication (Fig.7, communication between 80 and 53/54 is shown as bidirectional) connection with each of the MCU module and an electronic control unit of a vehicle (Fig.9, 209) through a communication bus.
Katayama, as modified, fails to explicitly teach the sampling circuit acquiring a total voltage signal and a metal-oxide-semiconductor field effect transistor (MOSFET) temperature signal in the low-voltage lithium battery circuitry, and
the communication device is configured to send the fault alarm signal to the electronic control unit and receive a control signal from the electronic control unit of the vehicle to cause the MCU module to update protection thresholds comprising the overcurrent threshold, the battery overtemperature threshold, the overvoltage threshold, and the undervoltage threshold.
However, Turner teaches a battery management system which acquires a MOSFET temperature signal in the low-voltage lithium battery circuitry (Col.12,lines 15-17: determines if the FET temperature exceeds a temp threshold).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama, in view of Carrier, with Turner to include in the sampling circuit acquiring a MOSFET temperature signal and generating a fault signal when the temperature is exceeded. Doing so assists in protecting and maintaining a charge in a battery, as evidenced by Turner (Technical Field).
Moreover, Wang teaches a sampling circuit which acquires a total voltage signal (Fig.2, 100 connected to 112A & 112B).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama, in view of Carrier, with Wang to include acquiring a total voltage signal. Doing so allows the battery system to detect a failure condition while allowing for a time delay to determine if permanent disconnection is required, as evidenced by Wang (¶0007)
Lastly, Kessels teaches that an electric vehicle is known that communication between a battery management unit and a vehicle electric control unit occurs such that a fault alarm is sent to the electric control unit (¶0024: alerts communicated to the vehicle control unit) and also teaches that it is common in the art for battery protection thresholds to be updated by an external source (¶0050: information may be received to update/adjust the thresholds for alarms or alerting in the battery management system).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama, in view of Carrier, with Kessels to have the communication device configured to send the fault alarm signal to the electronic control unit and receive a control signal from the electronic control unit of the vehicle to cause the MCU module to update protection thresholds. Doing so improves the user experience of an EV by notifying them of a battery fault and allows the battery thresholds to be updated as the battery ages for efficient charging/discharging.
Regarding Claims 5 & 17, Katayama (Fig.7), as modified, further teaches wherein the battery management system further comprises a first switch module (85) and a second switch module (86); and when the lithium battery module is in a charging state, the MCU module is configured to:
in response to determining at least one of: any of the cell voltage signals being greater than the overvoltage threshold, or the total voltage signal being greater than the overvoltage threshold, determine that charging overvoltage has occurred and generate a charging overvoltage alarm signal (¶0137: voltage overcharging; within a vicinity indicates a threshold range which would include a threshold value at the lower end of the range); and
control, based on the charging overvoltage alarm signal, the second switch module to be turned on and the first switch module to be turned off, so that a main loop is turned off and prevented from charging and enters a discharging maintaining state to implement an overcharge protection function (¶0150: overcharging turns off at least switch 85).
Regarding Claim 6, Katayama (Fig.7), as modified, further teaches wherein the battery management system further comprises a first drive module and a second drive module (drive modules controlling 85 and 86);
the second switch module is connected to the positive terminal of the tail lithium-ion cell through the first port of the busbar (86 connected to SMO1 through 61);
the first switch module is connected to the positive terminal of the battery system through the second port of the busbar (85 connected to 53 through 83);
the first drive module is connected to a first switch module control terminal of the MCU module to receive a first control signal generated by the MCU module, and is configured to output a first drive signal based on the first control signal (¶0150: 80 controls 85);
the second drive module is connected to a second switch module control terminal of the MCU module to receive a second control signal generated by the MCU module, and is configured to output a second drive signal based on the second control signal (¶0150: 80 controls 86);
the first switch module is connected to the first drive module, and is configured to control a charging state of a circuit loop based on the first drive signal (¶0150: 85 operates in response to the control signal); and
the second switch module is connected to the second drive module, and is configured to control a discharging state of the circuit loop based on the second drive signal (¶0150: 86 operates in response to the control signal).
Katayama, as modified, discloses the claimed invention except for the drive modules are integral to the MCU instead of separate from it. It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to separate the drive modules from the MCU, since it has been held that constructing a formerly integral structure in various elements involves only routine skill in the art. Nerwin v. Erlichman, 168 USPQ 177, 1. Doing so allows for easier replacement of the drive modules in the event of a part failure.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Katayama, in view of Carrier, Turner, Wang, and Kessels, as applied to claims 6 above, and further in view of Denning (USPGPN 2005/0237028).
Regarding Claim 7, Katayama, as modified, fails to explicitly teach wherein the first switch module comprises a number of primary N-channel MOSFETs connected in parallel, and the second switch module comprises a number of secondary N-channel MOSFETs connected in parallel;
respective drains of the number of primary N-channel MOSFETs in the first switch module are connected together and connected to the positive terminal of the battery system;
respective sources of the number of primary N-channel MOSFETs in the first switch module are connected together and connected to each of respective sources of the number of secondary N- channel MOSFETs connected in parallel in the second switch module;
respective gates of the number of primary N-channel MOSFETs in the first switch module are connected together and connected to the first drive module;
respective drains of the number of secondary N-channel MOSFETs in the second switch module are connected together and connected through the first port of the busbar; and respective gates of the number of secondary N-channel MOSFETs in the second switch module are connected together and connected to the second drive module.
However, Denning (Fig. 2) teaches a battery control system which contains a first switch module comprises a number of primary N-channel MOSFETs connected in parallel (Q1, Q3, & Q5), and the second switch module comprises a number of secondary N-channel MOSFETs connected in parallel (Q2, Q4, & Q6);
respective drains of the number of primary N-channel MOSFETs in the first switch module are connected together and connected to the positive terminal of the battery system (connection between Q1 and 270);
respective sources of the number of primary N-channel MOSFETs in the first switch module are connected together and connected to each of respective sources of the number of secondary N- channel MOSFETs connected in parallel in the second switch module (connections between Q1 & Q2, Q3 & Q4, and Q5 & Q6);
respective gates of the number of primary N-channel MOSFETs in the first switch module are connected together (Q1, Q3, & Q5 connected to 126) and connected to the first drive module (Fig.3, 126 comprises 312);
respective drains of the number of secondary N-channel MOSFETs in the second switch module are connected together and connected through the first port of the busbar (Q2, Q4, & Q6 connected to PACK+); and
respective gates of the number of secondary N-channel MOSFETs in the second switch module are connected together (Q2, Q4, & Q6 connected to 126) and connected to the second drive module (Fig.3, 126 comprises 310).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama, in view of Carrier, Turner, Wang, and Kessels, with Denning to include parallel MOSFET switches in charging and discharging paths, and connecting them as described. Doing so provides additional switches for reducing the power flowing through each switch, therefore reducing the needed power rating, or provides a level of redundancy to account for a switch failing in an open/unconnected state without the need for replacement.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Katayama, in view of Carrier, Turner, Wang, and Kessels, as applied to claims 4 above, and further in view of Mukai et al. (USPGPN 20130181681)
Regarding Claim 8, Katayama, as modified, fails to explicitly teach wherein the battery management system further comprises a first drive module, a second drive module, a first switch module, and a second switch module;
the first switch module comprises a primary N-channel MOSFET and a secondary N-channel MOSFET that are connected in series, and the second switch module comprises a primary N- channel MOSFET and a secondary N-channel MOSFET that are connected in series;
a drain of the primary N-channel MOSFET in the first switch module is connected to a drain of the primary N-channel MOSFET in the second switch module;
a source of the primary N-channel MOSFET in the first switch module is connected to a source of the primary N-channel MOSFET in the second switch module;
a gate of the primary N-channel MOSFET in the first switch module and a gate of the secondary N-channel MOSFET in the first switch module are connected together and connected to the second drive module; and
a gate of the primary N-channel MOSFET in the second switch module and a gate of the secondary N-channel MOSFET in the second switch module are connected together and connected to the first drive module.
However, Mukai (Figs1, 3A, & 3B) teaches a battery system where a battery management system further comprises a first drive module (22 connection to 212), a second drive module (22 connection to 211), a first switch module (211), and a second switch module (212);
the first switch module comprises a primary N-channel MOSFET (211a) and a secondary N-channel MOSFET (211b) that are connected in series, and the second switch module comprises a primary N- channel MOSFET (212a) and a secondary N-channel MOSFET (212b) that are connected in series;
a drain of the primary N-channel MOSFET in the first switch module is connected to a drain of the primary N-channel MOSFET in the second switch module (211a & 211b “D” connected);
a source of the primary N-channel MOSFET in the first switch module is connected to a source of the primary N-channel MOSFET in the second switch module (211a & 212a “S” connected);
a gate of the primary N-channel MOSFET in the first switch module and a gate of the secondary N-channel MOSFET in the first switch module are connected together and connected to the second drive module (Fig.3A, both 211a and 211b receiving “ON”); and
a gate of the primary N-channel MOSFET in the second switch module and a gate of the secondary N-channel MOSFET in the second switch module are connected together and connected to the first drive module (Fig.3B, both 212a and 212b receiving “ON”).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama, in view of Carrier, Turner, Wang, and Kessels, with Mukai to include the drive modules and switch modules as shown. Doing so allows the battery to be protected from excess current states in both charging and discharging states when the charging and discharging currents are different, as evidenced by Mukai (¶0014-0015).
Katayama, as modified, discloses the claimed invention except for the drive modules are a single switch drive unit rather than separate units. It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to separate the drive modules, since it has been held that constructing a formerly integral structure in various elements involves only routine skill in the art. Nerwin v. Erlichman, 168 USPQ 177, 1. Doing so allows for easier replacement of the drive modules in the event of a part failure.
Claim(s) 9 & 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Katayama, in view of Carrier, Turner, Wang, Kessels, and Denning, as applied to claim 7 above, and further in view of Xiao et al. (USPGPN 2007/0257642).
Regarding Claims 9 & 19, Katayama, as modified, fails to explicitly teach the battery management system further comprises a short-circuit protection device;
the first drive module is connected to each of the first switch module control terminal of the MCU module and an output terminal of the short-circuit protection device to receive the first control signal generated by the MCU module and a latch signal output from the short-circuit protection device, and is configured to output a first drive signal based on the first control signal and the latch signal; and
the second drive module is connected to each of the second switch module control terminal of the MCU module and the output terminal of the short-circuit protection device to receive the second control signal generated by the MCU module and the latch signal output from the short- circuit protection device, and is configured to output a second drive signal based on the second control signal and the latch signal.
However, Xiao (Fig.4) teaches a short-circuit protection device (429, 437, & 439) which drives the control of a first switch module and second switch module based through connections to first and second drive modules vi latched signal (¶0056: short circuit alert via 439; ¶0057: open the discharge switch or other power safety measure; ¶0089: short circuit signal is held until an external release method; therefore the short-circuit protection device provides a latched output to the drive modules, through the processor 422, to control the first and second switch modules).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama, in view of Carrier, Turner, Wang, Kessels, and Denning, with Xiao to include a short-circuit protection device connected to the first and second drive modules for controlling the first and second switch modules via a latched output signal. Doing so provides a safer battery pack by reducing the risk of a thermal runaway due to a short circuit.
Claim(s) 10, 11, & 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Katayama, in view of Carrier, Turner, Wang, Kessels, Denning, and Xiao, as applied to claim 9 above, and further in view of Li (USPGPN 2019/0056457)
Regarding Claims 10 & 18, Katayama (Fig.7), as modified, further teaches the battery management system further comprises a shunt (69);
the shunt has a first terminal connected to the negative terminal of the head lithium-ion cell (69 connected to SMO16), and a second terminal connected to the negative terminal of the battery system (69 connected to 84) through the fourth port of the busbar, to output two current differential signals.
the filter has two terminals respectively connected to the first terminal and the second terminal of the shunt, and is configured to filter the two current differential signals to obtain the current sampling signal, and transmit the current sampling signal to a current sampling port of the sampling circuit, so as to determine, by comparing the current sampling signal with the overcurrent threshold, whether overcurrent has occurred.
Katayama, as modified, fails to explicitly teach comprising a filter;
the shunt connected to the negative terminal of the head lithium-ion cell through the third port of the busbar; and
the filter has two terminals respectively connected to the first terminal and the second terminal of the shunt, and is configured to filter the two current differential signals to obtain the current sampling signal, and transmit the current sampling signal to a current sampling port of the sampling circuit, so as to determine, by comparing the current sampling signal with the overcurrent threshold, whether overcurrent has occurred.
Katayama, as modified, discloses the claimed invention except for the shunt is between the third port and the battery cell instead of the third port being between the battery cell and the shunt. It would have been obvious to one having ordinary skill in the art at the time the invention was made to move the shunt to within the controller 52, since it has been held that rearranging parts of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70. Doing so reduces the number of components to be mounted to a circuit board.
Moreover, Li (Figs. 2A) teaches a filter (224) having two terminals connected to the first and second terminals of a shunt (258).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama, in view of Carrier, Turner, Wang, Kessels, Denning, and Xiao, with Li to include a filter connected to the shunt. Doing so provides the well-known benefit of filtering out electrical noise.
Regarding Claim 11, Katayama, as modified (Xiao, Fig.4, 429; supported by NPL-TI INA202 Datasheet – revised 2017, hereinafter referred to as NPL-TI, which discloses a circuit diagram for a short-circuit protection device), further teaches wherein the short- circuit protection device comprises an operational amplifier unit (NPL-TI – Pg.1, Simplified Schematic: “G”), a comparator unit (NPL-TI – Pg.1, Simplified Schematic: “Comparator”), and a signal latch unit (NPL-TI – Pg.1, Simplified Schematic: “RESET” indicates the presence of a latch);
the operational amplifier unit has two input terminals respectively connected to the first terminal and the second terminal of the shunt (NPL-TI – Pg.16, Fig.29: pins 7 & 8 connected to shunt option 3), and is configured to amplify the two current differential signals;
the comparator unit is connected to an output terminal of the operational amplifier unit (NPL-TI – Pg.16, Fig.29: pins 2 and 3 connected ), and is configured to perform comparison based on the amplified two current differential signals to output a comparison result (NPL-TI – Pg.16, Fig.29: CMPOUT); and
the signal latch unit configured to output, from an output terminal as the output terminal of the short-circuit protection device (NPL-TI – Pg.16, Fig.29: CMPOUT is affected by RESET indicating presence of a latch unit), the latch signal based on the comparison result.
Katayama, as modified, discloses the claimed invention except for the latch unit is not taught as a separate component connected to the output of the comparator. It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to separate the latch unit from the comparator and connect it to the output of the comparator, since it has been held that constructing a formerly integral structure in various elements involves only routine skill in the art. Nerwin v. Erlichman, 168 USPQ 177, 1. Doing so would may provide easier replaceability of the latch in the event of a failure.
Claim(s) 12 & 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Katayama, in view of Carrier, Turner, Wang, Kessels, Denning, Xiao, and Li, as applied to claim 11 above, and further in view of NPL-NXP UJA113x Datasheet (published 2016, hereinafter referred to as NPL-NXP).
Regarding Claims 12 & 20, Katayama, as modified, fails to explicitly teach the battery management system further comprises a system basis chip (SBC) power module;
the SBC power module has a power supply input terminal for receiving each of the internal total voltage signal provided by the male sampling connector and an external total voltage signal provided by the positive terminal of the battery system;
the SBC power module has a first power supply terminal connected to a power supply terminal of the MCU module, to provide a first operating power supply for the MCU module;
the SBC power module has a second power supply terminal connected to each of the first drive module and the second drive module, to provide a second operating power supply for each of the first drive module and the second drive module;
the SBC power module has a wake-up input/output (IO) port that is connected to a fault trigger unit of the sampling circuit to receive a fault wake-up signal from the fault trigger unit for waking up the SBC power module and that is further connected to the signal latch unit of the short- circuit protection device to receive the latch signal from the signal latch unit; and
the short-circuit protection device is configured to: during a sleep period of the SBC power module, maintain in an operating state and, upon triggering short-circuit protection, send the latch signal to the wake-up IOport for waking up the SBC power module to enter an operating state.
However, NPL-NXP teaches that it is common to use a system basis chip for powering electrical components in a vehicle control system (Pg.2, 2.1: automotive applications; Pg.3 ,2.3: V1 for selected device and V2 for on-board loads), which is supplied power from a battery (Pg.2, 2.1: two-channel battery monitoring), with multiple connections for wakeup signals (Pg.4, 2.6: 4 wakeup I/Os).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama, in view of Carrier, Turner, Wang, Kessels, Denning, Xiao, and Li, with NPL-NXP to include an SBC power module receiving the power input from the male sampling connector, with power supply terminals to supply power to the MCU module and first and second drive modules, and have the fault signals from the sampling circuit and short-circuit protection device connected to the wake-up I/Os for waking the SBC from a sleep period in the event of a fault. Doing so ensures a regulated power supply for the MCU and drive circuits, while providing the power saving capability of a sleep mode, and ensures that the control system is brought out of the sleep mode in the event of an abnormality for safer operation, which are all well recognized benefits in the art.
Katayama, as modified, discloses the claimed invention except for the SBC power supply input terminal is only connected to the internal total voltage signal and not also an external total voltage signal. It would have been an obvious matter of design choice to connect the power supply input terminal to both the internal and external total voltage signals, since applicant has not disclosed that the connection to both the internal and external total voltage signals solves any stated problem or is for any particular purpose and it appears that the invention would perform equally well with both power supply connections.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Katayama, in view of Carrier, Turner, Wang, Kessels, and Mukai, as applied to claims 8 above, and further in view of NPL-Research Gate Gate Driver Circuit (published 2016, hereinafter referred to as NPL-Research).
Katayama, as modified, fails to explicitly teach the first drive module comprises a first OR gate, a first pull-down switch, a first gate driver, and a first resistor;
the second drive module comprises a second OR gate, a second pull-down switch, a second gate driver, and a second resistor;
the second OR gate has a first input terminal connected to a second switch module control terminal of the MCU module to receive a second control signal, a second input terminal connected to an output terminal of a short-circuit protection device to receive a latch signal, and an output terminal connected to a first terminal of the second pull-down switch;
the second pull-down switch has a second terminal connected to a second operating power supply through the second resistor, and a third terminal grounded;
the second gate driver has an enable control terminal connected to a node between the second terminal of the second pull-down switch and the second resistor to receive a second enable signal, and a power supply terminal for receiving the internal total voltage signal;
the second gate driver has a first control terminal connected to each of the gate of the primary N-channel MOSFET in the first switch module and the gate of the secondary N-channel MOSFET in the first switch module, and a second control terminal connected to each of the source of the primary N-channel MOSFET in the first switch module and a source of the secondary N-channel MOSFET in the first switch module;
the first OR gate has a first input terminal connected to a first switch module control terminal of the MCU module to receive a first control signal, a second input terminal connected to the output terminal of the short-circuit protection device to receive the latch signal, and an output terminal connected to a first terminal of the first pull-down switch;
the first pull-down switch has a second terminal connected to the second operating power supply through the first resistor, and a third terminal grounded;
the first gate driver has an enable control terminal connected to a node between the second terminal of the first pull-down switch and the first resistor to receive a first enable signal, and a power supply terminal for receiving the internal total voltage signal; and
the first gate driver has a first control terminal connected to each of the gate of the primary N-channel MOSFET in the second switch module and the gate of the secondary N-channel MOSFET in the second switch module, and a second control terminal connected to each of the source of the primary N-channel MOSFET in the second switch module and a source of the secondary N-channel MOSFET in the second switch module.
However, NPL-Research (Fig.9) teaches the common usage of a gate driver circuit for controlling MOSFET switches, which use a pull-down switch (switch at Vin), resistor (resistor), and a gate driver (TLP250). The gate driver is connected to a source of the MOSFET switch at one pin and a gate of the MOSFET switch at a second pin, with an enable pin connected between the pull-down switch and the resistor.
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama, in view of Carrier, Turner, Wang, Kessels, and Mukai, with NPL-Research to use the gate driver circuit in place of the first and second drive modules for controlling the first and second switch modules. Doing so provides the high current needed to charge the gate of the MOSFET.
Furthermore, Katayama, as modified, discloses the claimed invention except for the OR gates for the first and second drive modules connected to the pull-down switches. It would have been obvious to one having ordinary skill in the art effective filing date of the invention to include OR gates for triggering the pull-down switches, connected to the MCU control outputs and short-circuit protection device since it was known in the art that OR gates provide the benefit of generating a control output signal when either of two connected input signals are received.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Katayama, in view of Carrier, Turner, Wang, Kessels, Denning, and Xiao, as applied to claim 9 above, and further in view NPL-Research.
Regarding Claim 14, Katayama, as modified, fails to explicitly teach the first drive module comprises a first OR gate, a first pull-down switch, a first gate driver, and a first resistor;
the second drive module comprises a second OR gate, a second pull-down switch, a second gate driver, and a second resistor;
the second OR gate has a first input terminal connected to the second switch module control terminal of the MCU module to receive the second control signal, a second input terminal connected to the output terminal of the short-circuit protection device to receive the latch signal, and an output terminal connected to a first terminal of the second pull-down switch;
the second pull-down switch has a second terminal connected to a second operating power supply through the second resistor, and a third terminal grounded;
the second gate driver has an enable control terminal connected to a node between the second terminal of the second pull-down switch and the second resistor to receive a second enable signal, and a power supply terminal for receiving the internal total voltage signal;
the second gate driver has a first control terminal connected to each of the respective gates of the number of secondary N-channel MOSFETs in the second switch module, and a second control terminal connected to each of the respective sources of the number of secondary N-channel MOSFETs in the second switch module;
the first OR gate has a first input terminal connected to the first switch module control terminal of the MCU module to receive the first control signal, a second input terminal connected to the output terminal of the short-circuit protection device to receive the latch signal, and an output terminal connected to a first terminal of the first pull-down switch;
the first pull-down switch has a second terminal connected to the second operating power supply through the first resistor, and a third terminal grounded;
the first gate driver has an enable control terminal connected to a node between the second terminal of the first pull-down switch and the first resistor to receive a first enable signal, and a power supply terminal for receiving the internal total voltage signal; and
the first gate driver has a first control terminal connected to each of the respective gates of the number of primary N-channel MOSFETs in the first switch module, and a second control terminal connected to each of the respective sources of the number of primary N-channel MOSFETs in the first switch module.
However, NPL-Research (Fig.9) teaches the common usage of a gate driver circuit for controlling MOSFET switches, which use a pull-down switch (switch at Vin), resistor (resistor), and a gate driver (TLP250). The gate driver is connected to a source of the MOSFET switch at one pin and a gate of the MOSFET switch at a second pin, with an enable pin connected between the pull-down switch and the resistor.
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system taught by Katayama, in view of Carrier, Turner, Wang, Kessels, and Mukai, with NPL-Research to use the gate driver circuit in place of the first and second drive modules for controlling the first and second switch modules. Doing so provides the high current needed to charge the gate of the MOSFET.
Furthermore, Katayama, as modified, discloses the claimed invention except for the OR gates for the first and second drive modules connected to the pull-down switches. It would have been obvious to one having ordinary skill in the art effective filing date of the invention to include OR gates for triggering the pull-down switches, connected to the MCU control outputs and short-circuit protection device since it was known in the art that OR gates provide the benefit of generating a control output signal when either of two connected input signals are received.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN P ONDRASIK whose telephone number is (703)756-1963. The examiner can normally be reached Monday - Friday 7:30 a.m. - 5 p.m. ET.
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/JOHN P ONDRASIK/ Examiner, Art Unit 2859
/JULIAN D HUFFMAN/ Supervisory Patent Examiner, Art Unit 2859
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