Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action.
Applicant’s election with traverse of Group I invention claims 1-9 in response/amendment submitted on 6/22/26 is acknowledged. No reason for traverse is cited and thus the requirement is still deemed proper and is therefore made FINAL.
Information Disclosure Statement
The prior art documents submitted by Applicant(s) in the information Disclosure Statement(s) have all been considered and made of record (note the attached copy of form(s) PTO-1449).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim(s) 1-8 and 10 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Goi et al., US 9529151 B2.
Regarding claim 1, Goi teaches a light polarisation converter for a photonic integrated circuit (see figs. 1-30 and abstract), comprising:
a “substrate” (see at least figs. 1-7 top layer/portion: i. e., 16a, 16b, 51 as “substrate” for providing support for the waveguide/core 11c) comprising:
a first surface and a second surface (see item 16a and specification:
a first surface and a second surface (see item 16a and specification):
The core continuously exists with the same height between the core 11c of the first waveguide portion 11 and the core 12c of the thick plate portion 14 and the second waveguide portion 12 of the polarization rotation portion 13. That is, upper surfaces 11a and 12a of the cores 11 and 12c are flush with an upper surface 14a of the thick plate portion 14, and lower surfaces 11b and 12b of the cores 11c and 12c are flush with a lower surface 14b of the thick plate portion 14.
and a waveguide 11c comprising a first waveguide 11c/51r portion in contact with the first surface, and a second waveguide portion in contact with the second surface (see at least figs. 1-7 and/or Figs. 29-30),
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wherein the second surface is offset from the first surface along a first axis and a second axis each perpendicular to a light propagation direction for converting polarisation of the light, such that the second waveguide portion is offset from the first waveguide portion surface (see at least fig. 7, item 11c; wherein the offset is the distance between the tapered gap surfaces between the core/waveguide surfaces with that of the “substrate”).
However, Gu does not explicitly use the term “photonic” in the term “photonic integrated circuit her uses “integrated circuit” with optical waveguide. It is obvious/well-known to an ordinary skill in the art to which the claimed invention pertains before the effective filing date of the claimed invention that an integrated circuits in conjunction with integrated photonics such as optical waveguide is/known as PIC for modifying and routing light beam in particular direction with predictable results.
2. (Original) The light polarisation converter according to claim 1, wherein: the substrate comprises a third surface between the first surface and the second surface, the third surface sloped relative to the first surface (shown in at least fig. 7, with at least three surfaces).
3. (Original) The light polarisation converter according to claim 2, wherein: the third surface is substantially at a 90 degree angle relative to the first surface (shown in at least fig. 7b).
. 4. (Original) The light polarisation converter according to claim 2, wherein: the first axis is substantially parallel to the plane of the first surface; the third surface is at an angle less than 90 degrees relative to the first surface; the second surface is offset from the first surface along the first axis by an amount greater than a width of the first surface along the first axis; and the waveguide comprises an intermediate waveguide portion in contact with the third surface and between the first waveguide portion and the second waveguide portion (shown in at least fig. 7A-7B).
5. (Original) The light polarisation converter according to claim 1, wherein: the light polarisation converter is for converting between a first linear polarisation of a given wavelength of light and a second linear polarisation of the given wavelength of light; and a length of the waveguide in the light propagation direction is substantially equal to an odd integer multiplied by half of a beat length for the given wavelength of light (see col. 7, 5th parag.).
6. (Original) The light polarisation converter according to claim 1, wherein: a length of the waveguide in the light propagation direction is substantially equal to an odd integer multiplied by a quarter of a beat length for the given wavelength of light (see col. 7, 5th parag.).
7. (Original) The light polarisation converter according to claim 1, wherein: the substrate comprises a first substrate layer 16a and a second substrate layer 16b; and the first substrate layer comprises the first surface and the second substrate layer comprises the second surface (shown in at least fig. 7).
8. (Original) The light polarisation converter according to claim 7, wherein: the substrate comprises a third layer between the first substrate layer and the second substrate layer, the first second and third layers are stacked such that the first layer is in contact with the third layer and the third layer is in contact with the second layer, the third layer comprising a material different to that of the first substrate layer and the second substrate layer (shown in at least fig. 7, wherein the second substrate 16b material is different than that 16a material ).
Regarding claim 10, Goi teaches photonic integrated circuit comprising a light polarisation converter (see figs. 1-30 and abstract)comprising:
a “substrate” (see at least figs. 1-7 top layer/portion: i. e., 16a, 16b, 51 as “substrate” for providing support for the waveguide/core 11c) comprising:
a first surface and a second surface a first surface and a second surface (see item 16a and specification:
a first surface and a second surface (see item 16a and specification):
The core continuously exists with the same height between the core 11c of the first waveguide portion 11 and the core 12c of the thick plate portion 14 and the second waveguide portion 12 of the polarization rotation portion 13. That is, upper surfaces 11a and 12a of the cores 11 and 12c are flush with an upper surface 14a of the thick plate portion 14, and lower surfaces 11b and 12b of the cores 11c and 12c are flush with a lower surface 14b of the thick plate portion 14.
and a waveguide 11c comprising a first waveguide portion in contact with the first surface, and a second waveguide portion in contact with the second surface (see at least figs. 1-7, item 11c), wherein the second surface is offset from the first surface along a first axis and a second axis each perpendicular to a light propagation direction for converting polarisation of the light, such that the second waveguide portion is offset from the first waveguide portion (see at least fig. 7, item 11c; wherein the offset is the distance between the tapered gap surfaces between the core/waveguide surfaces with that of the “substrate”).
However, Gu does not explicitly use the term “photonic” in the term “photonic integrated circuit her uses “integrated circuit” with optical waveguide. It is obvious/well-known to an ordinary skill in the art to which the claimed invention pertains before the effective filing date of the claimed invention that an integrated circuits in conjunction with integrated photonics such as optical waveguide is/known as PIC for modifying and routing light beam in particular direction with predictable results.
. Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Citation of Relevant Prior Art
Prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. In accordance with MPEP 707.05 the following references are pertinent in rejection of this application since they provide substantially the same information disclosure as this patent does. These references are:
US 20170075063 A1
US 20120163750 A1
US 20120076465 A1
US 9170373 B2
US 20170199330 A1
US 20190064439 A1
EP 3009869 A1
US 20130322813 A1
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US 20190011800 A1
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US 20140126855 A1
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Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAVEH C KIANNI whose telephone number is (571)272-2417. The examiner can normally be reached on 9-19.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hollweg can be reached on571-270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KAVEH C KIANNI/Primary Examiner, Art Unit 2874
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