Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action.
Applicant’s election with traverse of Group I invention claims 1-13 in response/amendment submitted on6/22/26 is acknowledged. No reason for traverse is cited and thus the requirement is still deemed proper and is therefore made FINAL.
Information Disclosure Statement
The prior art documents submitted by Applicant(s) in the information Disclosure Statement(s) have all been considered and made of record (note the attached copy of form(s) PTO-1449).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1-4, 6, 8-9 and 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Goi et al., US 9529151 B2.
Regarding claim 1, Goi teaches a light polarisation converter for a photonic integrated circuit (see figs. 1-30 and abstract), comprising:
a first layer comprising a first surface and a second surface (see at least figs. 29-30 top layer 61a surface(s): i. e., 61a for providing support for the waveguide/core 61c), the second surface offset from the first surface along a first axis and a second axis, the first axis perpendicular to the first surface, and the second axis parallel to the first surface
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(shown in at least figs. 30 bottom layer surface(s) 61a); a second layer 61b; and a waveguide 61c between, and in contact with each of, the first layer and the second layer (shown in at least figs. 30, the waveguide comprising: a first waveguide portion in contact with the first surface, the first waveguide portion having a first thickness different to a second thickness of the first waveguide portion (shown in at least figs. 30), the first thickness and the second thickness perpendicular the first surface (shown in at least figs. 30), and a second waveguide portion in contact with the second surface (bottom layer surface) , such that the second waveguide portion is offset from the first waveguide portion (shown in at least figs. 30).
the first layer and the second layer (shown in at least figs. 30), the waveguide comprising: a first waveguide portion in contact with the first surface, the first waveguide portion having a first thickness different to a second thickness of the first waveguide portion (shown in at least figs. 30), the first thickness and the second thickness perpendicular the first surface, and a second waveguide portion in contact with the second surface (shown in at least figs. 30), such that the second waveguide portion is offset from the first waveguide portion (shown in at least figs. 30).
However, Gu does not explicitly use the term “photonic” in the term “photonic integrated circuit her uses “integrated circuit” with optical waveguide. It is obvious/well-known to an ordinary skill in the art to which the claimed invention pertains before the effective filing date of the claimed invention that an integrated circuits in conjunction with integrated photonics such as optical waveguide is/known as PIC for modifying and routing light beam in particular direction with predictable results.
2. (Original) The light polarisation converter of claim 1, comprising a region between the first layer and the second layer, the refractive index of the region different from the refractive index of the waveguide/CORE, and the waveguide absent from the region (shown in at least figs. 29-30 the region such as 53a has different ref index and the core highest ref index for guiding light) .
3. (Original) The light polarisation converter of claim 1, the waveguide comprising a third surface, the third surface not in contact with the first layer or the second layer (shown in at least figs. 29, outer layer surface of item 51a).
4. (Original) The light polarisation converter of claim 3, the first surface angled relative to the third surface by an internal angle of 30 to 65 degrees, 30 to 40 degrees, 50 to 65 degrees, 50 to 55 degrees, 55 to 60 degrees or 60 to 65 degrees (see figs. 29-30 meeting one or more these angle ranges).
6. (Original) The light polarisation converter of claim 3, wherein a side of the first layer and a side of the second layer are coplanar in a first plane, the third surface at least partly offset from the first plane (shown in at least figs. 29-30).
8. (Original) The light polarisation converter of claim 1, wherein a length of the waveguide parallel to a light propagationaxis is substantially equal to an odd integer multiplied by a quarter of a beat length for a wavelength of the input light (see col. 7, 5th parag.).
9. (Original) The light polarisation converter of claim 1, wherein a first portion of the first layer comprises the first surface, and a second portion of the first layer comprises the second surface, the first portion of the first layer comprising a different material to the second portion of the first layer (see at least figs. 29-30 the layers have different ref indexes ).
11. (Original) The light polarisation converter of claim 1, comprising a third layer on and in contact with the second layer (sown in at least figs. 29).
Reagrtding claim 12, though Goi does not e wherein the first layer and the second layer each comprise indium phide, and the waveguide comprises indium gallium arsenide phosphide (see at least col. 17, 3rd parag.).
Regarding claim 13, Goi teaches a photonic integrated circuit (see figs. 1-30 and abstract) comprising
a light polarisation converter comprising: a first layer comprising a first surface and a second surface (see at least figs. 29-30 top layer 61a surface(s): i. e., 61a for providing support for the waveguide/core 61c),
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the second surface offset from the first surface along a first axis and a second axis, the first axis perpendicular to the first surface, and the second axis parallel to the first surface; a second layer (shown in at least figs. 30); and a waveguide 61c between, and in contact with each of, the first layer and the second layer (shown in at least figs. 30), the waveguide comprising: a first waveguide portion in contact with the first surface, the first waveguide portion having a first thickness different to a second thickness of the first waveguide portion (shown in at least figs. 30), the first thickness and the second thickness perpendicular the first surface, and a second waveguide portion in contact with the second surface (shown in at least figs. 30), such that the second waveguide portion is offset from the first waveguide portion (shown in at least figs. 30).
However, Gu does not explicitly use the term “photonic” in the term “photonic integrated circuit her uses “integrated circuit” with optical waveguide. It is obvious/well-known to an ordinary skill in the art to which the claimed invention pertains before the effective filing date of the claimed invention that an integrated circuits in conjunction with integrated photonics such as optical waveguide is/known as PIC for modifying and routing light beam in particular direction with predictable results.
. Allowable Subject Matter
Claim 5, 7 and 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Citation of Relevant Prior Art
Prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. In accordance with MPEP 707.05 the following references are pertinent in rejection of this application since they provide substantially the same information disclosure as this patent does. These references are:
US 20170075063 A1
US 20120163750 A1
US 20120076465 A1
US 9170373 B2
US 20170199330 A1
US 20190064439 A1
EP 3009869 A1
US 20130322813 A1
US 5790583 A
US 5878070 A
US 20190011800 A1
US 20220120966 A1
US 20230040355 A1
US 9766404 B1
US 9690043 B2
US 20110019958 A1
US 20140126855 A1
US 20180120504 A1
CN 102483491 A
US 20170104109 A1
US 20170033884 A1
US 11409038 B1
US 20190384135 A1
US 6166372 A
CN 1423163 A
JP 2017525958 A
JP 3441385 B2
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAVEH C KIANNI whose telephone number is (571)272-2417. The examiner can normally be reached on 9-19.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hollweg can be reached on571-270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KAVEH C KIANNI/Primary Examiner, Art Unit 2874
Prosecution Insights